18 Nov, 2024
1 commit
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Running the v4l2-compliance (1.27.0-5208, SHA: af114250d48d) on the m2m
device fails on the MMAP streaming tests, with the following messages:fail: v4l2-test-buffers.cpp(240): g_field() == V4L2_FIELD_ANY
fail: v4l2-test-buffers.cpp(1508): buf.qbuf(node)Apparently, the driver does not properly set the field member of
vb2_v4l2_buffer struct, returning the default V4L2_FIELD_ANY value which
is against the guidelines.Fixes: cf21f328fcaf ("media: nxp: Add i.MX8 ISI driver")
Signed-off-by: Laurentiu Palcu
Reviewed-by: Laurent Pinchart
Tested-by: Guoniu Zhou
Reviewed-by: Robert Chiras
Acked-by: Jason Liu
15 Nov, 2024
1 commit
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It may cause confict between constraint variable read and write if
there is more than one stream running. Move rate constraint function to
probe() can avoid it.Signed-off-by: Chancel Liu
Reviewed-by: Shengjiu Wang
Acked-by: Jason Liu
13 Nov, 2024
2 commits
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Currently, interrogating the controls, before they're set for the first
time, will return all-zero values. To fix this, use the init() callback
in the v4l2_ctrl_type_ops structure to populate the initial control
values.Also, when running the sensor initialization sequence, make sure we
don't cache the settings for the embedded data because they do not
contain register values. They contain ranges. Otherwise we'll end up
with wrong register values in the regmap cache.Signed-off-by: Laurentiu Palcu
Reviewed-by: Robert Chiras
Reviewed-by: Mirela Rabulea
Tested-by: Celine Laurencin
Reviewed-by: Celine Laurencin
Acked-by: Jason Liu -
Currently, the registers returned in the embedded data contain RW
registers for gains and exposure. That affects the way the registers are
updated which does not follow the specifications. Using the RO registers
fixes the problem. Also, move the embedded data initialization sequence
to the end and add a comment to be easier to find it out in the future.Signed-off-by: Laurentiu Palcu
Reviewed-by: Mirela Rabulea
Tested-by: Celine Laurencin
Reviewed-by: Celine Laurencin
Acked-by: Jason Liu
12 Nov, 2024
1 commit
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The imx95 driver requests the necessary mailbox channels during imx-dsp's
probe operation. If WAKEUP domain is shut down during system suspend, MU7A
(used by Linux side) will end up losing its register state. This means that
GI's will end up being masked when the system is resumed (since GIER is set
to 0x0, which means all GI's are masked). As such, SOF will assert the GIP
bits required for triggering an interrupt on Linux side but no interrupt
will be triggered since GI's are masked, thus resulting on a crash on
Linux side as it will assume that the firmware did not boot.This was reproduced using the following steps:
1) Put Linux into suspend-to-RAM state by running:
echo 'mem' > /sys/power/state
2) Put SM into idle mode by running:
idle
3) Resume the system by running:
wakeupsourceWhat seems to happen is that if all CPUs are either in STOP/SLEEP
state and SM is put into idle state it will attempt to system suspend,
during which WAKEUP domain is powered off, thus leading to the
aforementioned register state loss. If SM is not put into idle state,
then WAKEUP domain is not powered off, thus if step 2) is left out then
everything will work as expected.To fix this, make sure the mailbox channels are requested during resume()
and released during suspend(). This way, by requesting the mailbox
channels during resume() we make sure to unmask the GI's used in firmware
communcation.Signed-off-by: Laurentiu Mihalcea
Reviewed-by: Iuliana Prodan
Acked-by: Jason Liu
11 Nov, 2024
2 commits
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Initialized the err variable to fix the coverity issue,
"Uninitialized scalar variable"Signed-off-by: Rahul Kumar Yadav
Reviewed-by: Pankaj Gupta
Acked-by: Jason Liu -
The ipu_task_thread thread ran by kthread_run() could be excuted
before kthread_run() returns especially when 'nosmp' or 'maxcpus=1'
kernel bootup parameters are used. So, in this case, the thread[0]
or thread[1] entries in struct ipu_soc are not yet set before
ipu_task_thread() references them to set thread affinity, hence a
NULL pointer de-referencing issue happens. Fix this by referencing
*current* task in ipu_task_thread() instead of the uninitialized
thread[0] or thread[1] entries.This fixes an old bug introduced by the below commit in linux-imx:
commit 0d36f8226d22 ("ENGR00175724-2 IPU: change ipu_device thread
process mode to interrupt mode.")Signed-off-by: Liu Ying
Reviewed-by: Sandor Yu
Acked-by: Jason Liu
09 Nov, 2024
1 commit
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The following community commit make FSL_IFC config selectable, but the
side effect is disabling the built-in FSL_IFC_NAND drive, add the related
configs back to the lsdk config file to enable this driver by default.Fixes: c22649e21745 ("memory: fsl_ifc: Make FSL_IFC config visible and selectable")
Signed-off-by: Han Xu
Reviewed-by: Frank Li
Acked-by: Jason Liu
08 Nov, 2024
1 commit
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RM has incorrect recommended volume range settings. There's big noise
with high volume values. Constrain the adjustable volume range to 0~7
as a software workaround.Signed-off-by: Chancel Liu
Reviewed-by: Shengjiu Wang
Acked-by: Jason Liu
06 Nov, 2024
1 commit
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When i.MX91 platform use MT9M114 sonsor, the capture image bottom edge
will meet green line for 100%. It caused by the vsync signals of parallel
csi and sensor, they are opposite, so the vsync output to pixel link
need to be inverted.Signed-off-by: Alice Yuan
Reviewed-by: Robby Cai
Acked-by: Jason Liu
05 Nov, 2024
9 commits
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IMX91_CLK_BUS_WAKEUP is not accurate IPG clock,
IMX91_CLK_SPDIF_IPG is the correct clock.Signed-off-by: Shengjiu Wang
Reviewed-by: Jacky Bai
Reviewed-by: Chancel Liu
Acked-by: Jason Liu -
IMX93_CLK_BUS_WAKEUP is not accurate IPG clock,
IMX93_CLK_SPDIF_IPG is the correct clock.Signed-off-by: Shengjiu Wang
Reviewed-by: Jacky Bai
Reviewed-by: Chancel Liu
Acked-by: Jason Liu -
The IMX91_CLK_SPDIF_GATE also controls the gate of IPG clock
and root clock, need to define them separately.
Otherwise disabling IMX91_CLK_SPDIF_GATE in driver will cause
IPG clock is disabled, then register accessing fail.Signed-off-by: Shengjiu Wang
Reviewed-by: Jacky Bai
Reviewed-by: Chancel Liu
Acked-by: Jason Liu -
Add SPDIF IPG clk. The SPDIF IPG clock and root clock share
same clock gate.Signed-off-by: Shengjiu Wang
Reviewed-by: Jacky Bai
Reviewed-by: Chancel Liu
Acked-by: Jason Liu -
The IMX93_CLK_SPDIF_GATE also controls the gate of IPG clock
and root clock, need to define them separately.
Otherwise driver disable IMX93_CLK_SPDIF_GATE will cause
IPG clock is also disabled, then register accessing fail.Signed-off-by: Shengjiu Wang
Reviewed-by: Jacky Bai
Reviewed-by: Chancel Liu
Acked-by: Jason Liu -
Add SPDIF IPG clk. The SPDIF IPG clock and root clock share
same clock gate.Signed-off-by: Shengjiu Wang
Reviewed-by: Jacky Bai
Reviewed-by: Chancel Liu
Acked-by: Jason Liu -
After SoC PoR, The video PLL's frequency setting may not be in the
correct design frequency range & out of spec. According to the
SoC Datasheet, the max output frequency of the video PLL is 594MHz,
so set the default frequency to that value for this PLL in clock
driver init stage.When this video PLL is used as clock source by any device for any
purpose, User can NOT rely on this default frequency of video PLL,
and must set this video PLL frequency explicitly based on the use case.Signed-off-by: Jacky Bai
Reviewed-by: Ye Li
Tested-off-by: Guoniu.zhou
Tested-off-by: Ying Liu
Acked-by: Jason Liu -
After SoC PoR, The video PLL's frequency setting may not be in the
correct design frequency range & out of spec. According to the
SoC Datasheet, the max output frequency of the video PLL is 594MHz,
so set the default frequency to that value for this PLL in clock
driver init stage.When this video PLL is used as clock source by any device for any
purpose, User can NOT rely on this default frequency of video PLL,
and must set this video PLL frequency explicitly based on the use case.Signed-off-by: Jacky Bai
Reviewed-by: Ye Li
Tested-by: Guoniu.zhou
Tested-by: Ying Liu
Acked-by: Jason Liu -
While preparing the firmware, we should not stop neutron as there may
be other tasks running. Otherwise the tasks may fail due to neutron core
has stopped.Signed-off-by: Jiwei.Fu
Reviewed-by: Iuliana Prodan
Acked-by: Jason Liu
31 Oct, 2024
1 commit
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The edma CHn_MUX isn't reset after warm reboot on imx95. If the dma
client request channel is different the last channel, the src id is
unique and can't be written the new edma CHn_MUX on imx95 so that
the transfer fail.This patch writes the CHn_MUX to reserved value 0.
Fixes: 9e34c0115e39 ("LF-10579-02: dmaengine: fsl-edma-v3: add imx95 edma support")
Signed-off-by: Joy Zou
Reviewed-by: Ye Li
Acked-by: Jason Liu
30 Oct, 2024
2 commits
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Generate a dtb for 8QM rev D based on the old version
of 8QM dtb for SOF with cs42888 code and the overlay
for the new board revision.Therefore, for 8QM rev D, one needs to use
imx8qm-mek-revd-sof-cs42888.dtb
for SOF with cs42888 codec.Signed-off-by: Iuliana Prodan
Reviewed-by: Laurentiu Mihalcea
Reviewed-by: Daniel Baluta
Acked-by: Jason Liu -
The for loop check condition should be "i < bc->onecell_data.num_domains".
Using "bc->onecell_data.num_domains" as condition is wrong, it will lead
to kernel panic.Reviewed-by: Jacky Bai
Signed-off-by: Peng Fan
Acked-by: Jason Liu
24 Oct, 2024
3 commits
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As mentioned in reference manual, ISI actual output line
value will be rounded up to an integer. For example, if
the input line value equal to 800 and the output line
value equal to 720, you must set [Y_SCALE] to a value
such that the theoretical output line value (800/[Y_SCALE])
is equal to or less than 720, which means:1. If [Y_SCALE] is set to 1C8h, the theoretical output line
value equal to 719.859375 which will be rounded up to 720.
2. If [Y_SCALE] is set to 1C7h, the theoretical output line
value equal to 720.017578 which will be rounded up to 721.There will be one excessive line in the actual output, So
adjust scale factor to make them equal.Signed-off-by: Guoniu Zhou
Reviewed-by: Robby Cai -
Keep subdev name as v4l2 core set since libcamera camera module
model identification heuristic does not work properly, it will
identify camera modules by parsing the default name.Signed-off-by: Guoniu Zhou
Reviewed-by: Robby Cai -
Add more RGB formats which supported by ISI.
Signed-off-by: Guoniu Zhou
Reviewed-by: Robby Cai
23 Oct, 2024
9 commits
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Add dtb for testing neoisp + dual os08a20 + display
Signed-off-by: Alexi Birlinger
Reviewed-by: Antoine Bouyer -
HDR need clean its infoframe when it is disabled.
Add info frame clean function, transfer all "0" to infoframe slot
to stop the info frame.Signed-off-by: Sandor Yu
Reviewed-by: Robby Cai -
Fix Coverity issue #5483966: Dereference null return value.
Signed-off-by: Sandor Yu
Reviewed-by: Robby Cai -
Fix Coverity issue #250401: Dereference null return value
Signed-off-by: Sandor Yu
Reviewed-by: Robby Cai -
Fix Coverity issue 20812416: Dereferencing iores, which is known to be NULL.
Signed-off-by: Sandor Yu
Reviewed-by: Robby Cai -
Fix Coverity issue 22841530:
variable "audio_rates" was declared but never referencedSigned-off-by: Sandor Yu
Reviewed-by: Robby Cai -
The driver no longer uses the autosuspend function, so remove it.
Signed-off-by: Joy Zou
Reviewed-by: Shengjiu Wang
Reviewed-by: Ye Li -
The fsl_edma3_issue_pending call schedule_work to start edma, but it is
asynchronous. Meet an issue that the dma clients have send request, but
the dma isn't ready. According to the RM Description: "The DMA hardware
request input signal and the enable request bit (ERQ) must be asserted
before a channel's hardware service request is accepted.", so we can't
use schedule_work way.In addition, the execution process of some dma clients like the audio need
to make sure atomic. So the fsl_edma3_issue_pending can't call
pm_runtime_get_sync or pm_runtime_forbid due to might sleep.This patch simplifies the pm_runtime handler that open channel power in
request chan and close power in free chan. Have tested the impact on power
is very small.Signed-off-by: Joy Zou
Reviewed-by: Shengjiu Wang
Reviewed-by: Ye Li -
Runtime PM is disabled when the system call __device_suspend_late()->
__pm_runtime_disable() in suspend process.So remove the unnecessary pm_runtime_get_sync() and
pm_runtime_put_sync_suspend().Signed-off-by: Joy Zou
Reviewed-by: Shengjiu Wang
Reviewed-by: Ye Li
22 Oct, 2024
6 commits
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A CMA leak is observed when interrupting the process abnormally. Before
the process stopped, if another interrupt signal is sent, the process
will be forcefully terminated without cleaning properly. This is
preventing any_buf to be released properly and context to be reset
to default as VIDIOC_STREAMOFF could not be sent.This patch aims to perform cleaning before terminating the process
by using stop_streaming callback to release any_buf and reset context.
This callback is waiting for all buffers to be given back before
terminating, allowing to perform cleaning without being interrupted.
The streamon and streamoff callback will be managed by default video
buffer 2 core framework, while neoisp implementation will be performed
in start_streaming and stop_streaming callback.Signed-off-by: Alexi Birlinger
Reviewed-by: Aymen Sghaier -
Adds dump methods to get isp memory status for Lookup tables.
The Vignetting, Global and Local DRC tonemap tables could be now dumped
using debugfs.Signed-off-by: Alexi Birlinger
Reviewed-by: Aymen Sghaier -
Secure-enclave FW drivers enhanced to publish the FW abort
indication with an error print.Signed-off-by: Pankaj Gupta
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Enhance drive strength and slew rate of SPDIF in/out pads. It can
improve signal performance at 96k and 192k sample rates of SPDIF.Signed-off-by: Chancel Liu
Reviewed-by: Shengjiu Wang -
Fix issue: CID 5486100: Dereference null return value (NULL_RETURNS)
Signed-off-by: Robby Cai
Reviewed-by: Guoniu Zhou -
Fix "Dereference null return value" Coverity issues of following CID:
21634744, 21634846, 21634870, 21634979, 21635089Signed-off-by: Robby Cai
Reviewed-by: Guoniu Zhou
