31 Mar, 2020

1 commit

  • Pull perf updates from Ingo Molnar:
    "The main changes in this cycle were:

    Kernel side changes:

    - A couple of x86/cpu cleanups and changes were grandfathered in due
    to patch dependencies. These clean up the set of CPU model/family
    matching macros with a consistent namespace and C99 initializer
    style.

    - A bunch of updates to various low level PMU drivers:
    * AMD Family 19h L3 uncore PMU
    * Intel Tiger Lake uncore support
    * misc fixes to LBR TOS sampling

    - optprobe fixes

    - perf/cgroup: optimize cgroup event sched-in processing

    - misc cleanups and fixes

    Tooling side changes are to:

    - perf {annotate,expr,record,report,stat,test}

    - perl scripting

    - libapi, libperf and libtraceevent

    - vendor events on Intel and S390, ARM cs-etm

    - Intel PT updates

    - Documentation changes and updates to core facilities

    - misc cleanups, fixes and other enhancements"

    * 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (89 commits)
    cpufreq/intel_pstate: Fix wrong macro conversion
    x86/cpu: Cleanup the now unused CPU match macros
    hwrng: via_rng: Convert to new X86 CPU match macros
    crypto: Convert to new CPU match macros
    ASoC: Intel: Convert to new X86 CPU match macros
    powercap/intel_rapl: Convert to new X86 CPU match macros
    PCI: intel-mid: Convert to new X86 CPU match macros
    mmc: sdhci-acpi: Convert to new X86 CPU match macros
    intel_idle: Convert to new X86 CPU match macros
    extcon: axp288: Convert to new X86 CPU match macros
    thermal: Convert to new X86 CPU match macros
    hwmon: Convert to new X86 CPU match macros
    platform/x86: Convert to new CPU match macros
    EDAC: Convert to new X86 CPU match macros
    cpufreq: Convert to new X86 CPU match macros
    ACPI: Convert to new X86 CPU match macros
    x86/platform: Convert to new CPU match macros
    x86/kernel: Convert to new CPU match macros
    x86/kvm: Convert to new CPU match macros
    x86/perf/events: Convert to new CPU match macros
    ...

    Linus Torvalds
     

30 Mar, 2020

1 commit


25 Mar, 2020

2 commits


18 Mar, 2020

1 commit


17 Mar, 2020

1 commit

  • On the ZynqMP platform, zynqmp_get_error_info() is used to read out
    error information. In this function, the pinf->col parameter is not
    used (it is only used by the Zynq platform's zynq_get_error_info()). So
    there's no need to print pinf->col on ZynqMP.

    In order to differentiate on which platform handle_error() is executed,
    use DDR_ECC_INTR_SUPPORT as the check condition to distinguish between
    Zynq and ZynqMP platforms.

    [ bp: Massage. ]

    Fixes: b500b4a029d57 ("EDAC, synopsys: Add ECC support for ZynqMP DDR controller")
    Signed-off-by: Sherry Sun
    Signed-off-by: Borislav Petkov
    Reviewed-by: Manish Narani
    Link: https://lkml.kernel.org/r/1584365679-27443-1-git-send-email-sherry.sun@nxp.com

    Sherry Sun
     

27 Feb, 2020

1 commit

  • handle_error() currently calls snprintf() a couple of times in
    succession to output the message for a CE/UE, therefore overwriting each
    part of the message which was formatted with the previous snprintf()
    call. As a result, only the part of the message from the last snprintf()
    call will be printed.

    The simplest and most effective way to fix this problem is to combine
    the whole string into one which to supply to a single snprintf() call.

    [ bp: Massage. ]

    Fixes: b500b4a029d57 ("EDAC, synopsys: Add ECC support for ZynqMP DDR controller")
    Signed-off-by: Sherry Sun
    Signed-off-by: Borislav Petkov
    Reviewed-by: James Morse
    Cc: Manish Narani
    Link: https://lkml.kernel.org/r/1582792452-32575-1-git-send-email-sherry.sun@nxp.com

    Sherry Sun
     

20 Feb, 2020

1 commit

  • The driver supports error detection and correction on devices with an
    ARM DMC-520 memory controller.

    Signed-off-by: Lei Wang
    Signed-off-by: Shiping Ji
    Signed-off-by: Borislav Petkov
    Reviewed-by: James Morse
    Link: https://lkml.kernel.org/r/83b48c70-dc06-d0d4-cae9-a2187fca628b@gmail.com

    Lei Wang
     

19 Feb, 2020

1 commit


17 Feb, 2020

11 commits

  • Looking at how mci->{ue,ce}_per_layer[EDAC_MAX_LAYERS] is used, it
    turns out that only the leaves in the memory hierarchy are consumed
    (in sysfs), but not the intermediate layers, e.g.:

    count = dimm->mci->ce_per_layer[dimm->mci->n_layers-1][dimm->idx];

    These unused counters only add complexity, remove them. The error
    counter values are directly stored in struct dimm_info now.

    Signed-off-by: Robert Richter
    Signed-off-by: Borislav Petkov
    Acked-by: Aristeu Rozanski
    Link: https://lkml.kernel.org/r/20200123090210.26933-11-rrichter@marvell.com

    Robert Richter
     
  • The error descriptor is passed to the error reporting functions, so
    the error details can be directly generated there. Move string
    generation from edac_raw_mc_handle_error() to edac_ce_error() and
    edac_ue_error(). The intermediate detail[] string can be removed then.

    Also, cleanup the string generation by switching to a single variant
    only using the ternary operator.

    [ bp: put ternary operators on a separate line for better readability
    and use the short-form "inline if" in edac_mc_handle_error(). ]

    Signed-off-by: Robert Richter
    Signed-off-by: Borislav Petkov
    Acked-by: Aristeu Rozanski
    Link: https://lkml.kernel.org/r/20200123090210.26933-10-rrichter@marvell.com

    Robert Richter
     
  • Most arguments of error reporting functions are already stored in the
    struct edac_raw_error_desc error descriptor. Pass the error descriptor
    to the functions and reduce the functions' argument list.

    [ bp: Sort function args in reverse fir tree order. ]

    Signed-off-by: Robert Richter
    Signed-off-by: Borislav Petkov
    Acked-by: Aristeu Rozanski
    Link: https://lkml.kernel.org/r/20200123090210.26933-9-rrichter@marvell.com

    Robert Richter
     
  • Many functions carry the enable_per_layer_report argument. This is a
    bool value indicating the error information contains some location
    data where the error occurred. This can easily being determined by
    checking the pos[] array for values. Negative values indicate there is
    no location available. So if the top layer is negative, the error
    location is unknown.

    Just check if the top layer is negative and remove
    enable_per_layer_report as function argument and also from struct
    edac_raw_error_desc.

    [ bp: Reflow comments to 80 columns, while at it. ]

    Signed-off-by: Robert Richter
    Signed-off-by: Borislav Petkov
    Acked-by: Aristeu Rozanski
    Link: https://lkml.kernel.org/r/20200123090210.26933-8-rrichter@marvell.com

    Robert Richter
     
  • There is a limitation to report only EDAC_MAX_LABELS in e->label of
    the error descriptor. This is to prevent a potential string overflow.

    The current implementation falls back to "any memory" in this case and
    also stops all further processing to find a unique row and channel of
    the possible error location.

    Reporting "any memory" is wrong as the memory controller reported an
    error location for one of the layers. Instead, report "unknown memory"
    and also do not break early in the loop to further check row and channel
    for uniqueness.

    [ bp: Massage commit message. ]

    Signed-off-by: Robert Richter
    Signed-off-by: Borislav Petkov
    Acked-by: Aristeu Rozanski
    Link: https://lkml.kernel.org/r/20200123090210.26933-7-rrichter@marvell.com

    Robert Richter
     
  • Carve out the error_count increment into a separate function
    edac_inc_csrow(). This better separates code and reduces the indentation
    level.

    Implementation note: The function edac_inc_csrow() counts the same
    as before, ->ce_count is only incremented if row >= 0. This is esp.
    true for the case of (!e->enable_per_layer_report). Here, a DIMM was
    not found, variable row still has a value of -1 and ->ce_count is not
    incremented.

    [ bp: Massage commit message. ]

    Signed-off-by: Robert Richter
    Signed-off-by: Borislav Petkov
    Reviewed-by: Mauro Carvalho Chehab
    Acked-by: Aristeu Rozanski
    Link: https://lkml.kernel.org/r/20200214141757.8976-1-rrichter@marvell.com

    Robert Richter
     
  • Each struct mci has its own error descriptor. Create a function
    error_desc_to_mci() to determine the corresponding mci from an
    error descriptor. This removes @mci from the parameter list of
    edac_raw_mc_handle_error() as the mci pointer does not need to be passed
    any longer.

    [ bp: Massage commit message. ]

    Signed-off-by: Robert Richter
    Signed-off-by: Borislav Petkov
    Reviewed-by: Mauro Carvalho Chehab
    Acked-by: Aristeu Rozanski
    Link: https://lkml.kernel.org/r/20200123090210.26933-5-rrichter@marvell.com

    Robert Richter
     
  • Store the error type in struct edac_raw_error_desc. This makes the
    type parameter of edac_raw_mc_handle_error() obsolete.

    [ kernel-doc typo ]
    Reported-by: kbuild test robot
    Signed-off-by: Robert Richter
    Signed-off-by: Borislav Petkov
    Reviewed-by: Mauro Carvalho Chehab
    Acked-by: Aristeu Rozanski
    Link: https://lkml.kernel.org/r/20200123090210.26933-4-rrichter@marvell.com

    Robert Richter
     
  • Reorder the new created functions edac_mc_alloc_csrows() and
    edac_mc_alloc_dimms() and move them before edac_mc_alloc(). No further
    code changes.

    Signed-off-by: Robert Richter
    Signed-off-by: Borislav Petkov
    Reviewed-by: Mauro Carvalho Chehab
    Acked-by: Aristeu Rozanski
    Link: https://lkml.kernel.org/r/20200123090210.26933-3-rrichter@marvell.com

    Robert Richter
     
  • edac_mc_alloc() is huge. Factor out code by moving it to the two new
    functions edac_mc_alloc_csrows() and edac_mc_alloc_dimms(). Do not
    move code yet for better review.

    [ bp: sort local args in reversed fir tree order. ]

    Signed-off-by: Robert Richter
    Signed-off-by: Borislav Petkov
    Reviewed-by: Mauro Carvalho Chehab
    Acked-by: Aristeu Rozanski
    Link: https://lkml.kernel.org/r/20200123090210.26933-2-rrichter@marvell.com

    Robert Richter
     
  • There are dimm and csrow devices linked to the mci device esp. to show
    up in sysfs. It must be granted that children devices are removed before
    its mci parent. Thus, the release functions must be called in the
    correct order and may not miss any child before releasing its parent. In
    the current implementation this is only granted by the correct order of
    release functions.

    A much better approach is to use put_device() that releases the device
    only after all users are gone. It is the recommended way to release a
    device and free its memory. The function uses the device's refcount and
    only frees it if there are no users of it anymore such as children.

    So implement a mci_release() function to remove mci devices, use
    put_device() to free them and early initialize the mci device right
    after its struct has been allocated.

    Change the release function so that it can be universally used no
    matter if the device is registered or not. Since subsequent dimm
    and csrow sysfs links are implemented as children devices, their
    refcounts will keep the parent mci device from being removed as long
    as sysfs entries exist and until all users have been unregistered in
    edac_remove_sysfs_mci_device().

    Remove edac_unregister_sysfs() and merge mci sysfs removal into
    edac_remove_sysfs_mci_device(). There is only a single instance now that
    removes the sysfs entries. The function can now be used in the error
    paths for cleanup.

    Also, create device release functions for all involved devices
    (dev->release), remove device_type release functions (dev_type->
    release) and also use dev->init_name instead of dev_set_name().

    [ bp: Massage commit message and comments. ]

    Signed-off-by: Robert Richter
    Signed-off-by: Borislav Petkov
    Acked-by: Aristeu Rozanski
    Link: https://lkml.kernel.org/r/20200212120340.4764-5-rrichter@marvell.com

    Robert Richter
     

13 Feb, 2020

2 commits

  • All created csrow objects must be removed in the error path of
    edac_create_csrow_objects(). The objects have been added as devices.

    They need to be removed by doing a device_del() *and* put_device() call
    to also free their memory. The missing put_device() leaves a memory
    leak. Use device_unregister() instead of device_del() which properly
    unregisters the device doing both.

    Fixes: 7adc05d2dc3a ("EDAC/sysfs: Drop device references properly")
    Signed-off-by: Robert Richter
    Signed-off-by: Borislav Petkov
    Tested-by: John Garry
    Cc:
    Link: https://lkml.kernel.org/r/20200212120340.4764-4-rrichter@marvell.com

    Robert Richter
     
  • A test kernel with the options DEBUG_TEST_DRIVER_REMOVE, KASAN and
    DEBUG_KMEMLEAK set, revealed several issues when removing an mci device:

    1) Use-after-free:

    On 27.11.19 17:07:33, John Garry wrote:
    > [ 22.104498] BUG: KASAN: use-after-free in
    > edac_remove_sysfs_mci_device+0x148/0x180

    The use-after-free is caused by the mci_for_each_dimm() macro called in
    edac_remove_sysfs_mci_device(). The iterator was introduced with

    c498afaf7df8 ("EDAC: Introduce an mci_for_each_dimm() iterator").

    The iterator loop calls device_unregister(&dimm->dev), which removes
    the sysfs entry of the device, but also frees the dimm struct in
    dimm_attr_release(). When incrementing the loop in mci_for_each_dimm(),
    the dimm struct is accessed again, after having been freed already.

    The fix is to free all the mci device's subsequent dimm and csrow
    objects at a later point, in _edac_mc_free(), when the mci device itself
    is being freed.

    This keeps the data structures intact and the mci device can be
    fully used until its removal. The change allows the safe usage of
    mci_for_each_dimm() to release dimm devices from sysfs.

    2) Memory leaks:

    Following memory leaks have been detected:

    # grep edac /sys/kernel/debug/kmemleak | sort | uniq -c
    1 [] edac_mc_alloc+0x3bc/0x9d0 # mci->csrows
    16 [] edac_mc_alloc+0x49c/0x9d0 # csr->channels
    16 [] edac_mc_alloc+0x518/0x9d0 # csr->channels[chn]
    1 [] edac_mc_alloc+0x5c8/0x9d0 # mci->dimms
    34 [] ghes_edac_register+0x1c8/0x3f8 # see edac_mc_alloc()

    All leaks are from memory allocated by edac_mc_alloc().

    Note: The test above shows that edac_mc_alloc() was called here from
    ghes_edac_register(), thus both functions show up in the stack trace
    but the module causing the leaks is edac_mc. The comments with the data
    structures involved were made manually by analyzing the objdump.

    The data structures listed above and created by edac_mc_alloc() are
    not properly removed during device removal, which is done in
    edac_mc_free().

    There are two paths implemented to remove the device depending on device
    registration, _edac_mc_free() is called if the device is not registered
    and edac_unregister_sysfs() otherwise.

    The implemenations differ. For the sysfs case, the mci device removal
    lacks the removal of subsequent data structures (csrows, channels,
    dimms). This causes the memory leaks (see mci_attr_release()).

    [ bp: Massage commit message. ]

    Fixes: c498afaf7df8 ("EDAC: Introduce an mci_for_each_dimm() iterator")
    Fixes: faa2ad09c01c ("edac_mc: edac_mc_free() cannot assume mem_ctl_info is registered in sysfs.")
    Fixes: 7a623c039075 ("edac: rewrite the sysfs code to use struct device")
    Reported-by: John Garry
    Signed-off-by: Robert Richter
    Signed-off-by: Borislav Petkov
    Tested-by: John Garry
    Cc:
    Link: https://lkml.kernel.org/r/20200212120340.4764-3-rrichter@marvell.com

    Robert Richter
     

28 Jan, 2020

3 commits

  • Pull ioremap updates from Christoph Hellwig:
    "Remove the ioremap_nocache API (plus wrappers) that are always
    identical to ioremap"

    * tag 'ioremap-5.6' of git://git.infradead.org/users/hch/ioremap:
    remove ioremap_nocache and devm_ioremap_nocache
    MIPS: define ioremap_nocache to ioremap

    Linus Torvalds
     
  • Pull RAS updates from Borislav Petkov:

    - Misc fixes to the MCE code all over the place, by Jan H. Schönherr.

    - Initial support for AMD F19h and other cleanups to amd64_edac, by
    Yazen Ghannam.

    - Other small cleanups.

    * 'ras-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
    EDAC/mce_amd: Make fam_ops static global
    EDAC/amd64: Drop some family checks for newer systems
    EDAC/amd64: Add family ops for Family 19h Models 00h-0Fh
    x86/amd_nb: Add Family 19h PCI IDs
    EDAC/mce_amd: Always load on SMCA systems
    x86/MCE/AMD, EDAC/mce_amd: Add new Load Store unit McaType
    x86/mce: Fix use of uninitialized MCE message string
    x86/mce: Fix mce=nobootlog
    x86/mce: Take action on UCNA/Deferred errors again
    x86/mce: Remove mce_inject_log() in favor of mce_log()
    x86/mce: Pass MCE message to mce_panic() on failed kernel recovery
    x86/mce/therm_throt: Mark throttle_active_work() as __maybe_unused

    Linus Torvalds
     
  • Pull EDAC updates from Borislav Petkov:
    "A totally boring branch this time around: a garden variety of small
    fixes all over the place"

    * tag 'edac_for_5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
    EDAC/amd64: Do not warn when removing instances
    EDAC/sifive: Fix return value check in ecc_register()
    EDAC/aspeed: Remove unneeded semicolon
    EDAC: remove set but not used variable 'ecc_loc'
    EDAC: skx_common: downgrade message importance on missing PCI device
    EDAC/Kconfig: Fix Kconfig indentation

    Linus Torvalds
     

17 Jan, 2020

7 commits

  • On machines which do not populate all nodes with DIMMs, the driver
    doesn't initialize an instance there. However, the instance removal
    remove_one_instance() path will warn unconditionally, which is wrong.

    Remove the WARN_ON() even if the warning is innocent because it causes a
    splat in dmesg.

    Signed-off-by: Borislav Petkov
    Link: https://lkml.kernel.org/r/20200117115939.5524-1-bp@alien8.de

    Borislav Petkov
     
  • In case of error, the function edac_device_alloc_ctl_info() returns a
    NULL pointer, not ERR_PTR(). Replace the IS_ERR() test in the return
    value check with a NULL test.

    Fixes: 91abaeaaff35 ("EDAC/sifive: Add EDAC platform driver for SiFive SoCs")
    Signed-off-by: Wei Yongjun
    Signed-off-by: Borislav Petkov
    Link: https://lkml.kernel.org/r/20200115150303.112627-1-weiyongjun1@huawei.com

    Wei Yongjun
     
  • ... and do not kmalloc a three-pointer struct. Which simplifies
    mce_amd_init() a bit.

    No functional changes.

    Signed-off-by: Borislav Petkov
    Link: https://lkml.kernel.org/r/20200116163403.GF27148@zn.tnic

    Borislav Petkov
     
  • In general, "pvt->umc != NULL" is used to check if the system is Family
    17h+. However, there are a few places that are using direct family
    checks.

    Replace the remaining family checks with a check for "pvt->umc != NULL".

    Signed-off-by: Yazen Ghannam
    Signed-off-by: Borislav Petkov
    Link: https://lkml.kernel.org/r/20200110015651.14887-6-Yazen.Ghannam@amd.com

    Yazen Ghannam
     
  • Add family ops to support AMD Family 19h systems. Existing Family 17h
    functions can be used. Also, add Family 19h to the list of families to
    automatically load the module.

    Signed-off-by: Yazen Ghannam
    Signed-off-by: Borislav Petkov
    Link: https://lkml.kernel.org/r/20200110015651.14887-5-Yazen.Ghannam@amd.com

    Yazen Ghannam
     
  • MCA error decoding on SMCA systems is not dependent on family. Return
    success early if the system supports the SMCA feature.

    Signed-off-by: Yazen Ghannam
    Signed-off-by: Borislav Petkov
    Link: https://lkml.kernel.org/r/20200110015651.14887-3-Yazen.Ghannam@amd.com

    Yazen Ghannam
     
  • Add support for a new version of the Load Store unit bank type as
    indicated by its McaType value, which will be present in future SMCA
    systems.

    Add the new (HWID, MCATYPE) tuple. Reuse the same name, since this is
    logically the same to the user.

    Also, add the new error descriptions to edac_mce_amd.

    Signed-off-by: Yazen Ghannam
    Signed-off-by: Borislav Petkov
    Link: https://lkml.kernel.org/r/20200110015651.14887-2-Yazen.Ghannam@amd.com

    Yazen Ghannam
     

13 Jan, 2020

1 commit

  • The commit 9209fb51896f ("riscv: move sifive_l2_cache.c to drivers/soc")
    moves the sifive L2 cache driver to driver/soc. It did not move the
    header file along with the driver. Therefore this patch moves the header
    file to driver/soc

    Signed-off-by: Yash Shah
    Reviewed-by: Anup Patel
    [paul.walmsley@sifive.com: updated to fix the include guard]
    Fixes: 9209fb51896f ("riscv: move sifive_l2_cache.c to drivers/soc")
    Signed-off-by: Paul Walmsley

    Yash Shah
     

06 Jan, 2020

1 commit


20 Dec, 2019

1 commit

  • The sifive_l2_cache.c is in no way related to RISC-V architecture
    memory management. It is a little stub driver working around the fact
    that the EDAC maintainers prefer their drivers to be structured in a
    certain way that doesn't fit the SiFive SOCs.

    Move the file to drivers/soc and add a Kconfig option for it, as well
    as the whole drivers/soc boilerplate for CONFIG_SOC_SIFIVE.

    Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs")
    Signed-off-by: Christoph Hellwig
    Reviewed-by: Borislav Petkov
    [paul.walmsley@sifive.com: keep the MAINTAINERS change specific to the L2$ controller code]
    Signed-off-by: Paul Walmsley

    Christoph Hellwig
     

19 Dec, 2019

1 commit

  • Remove unneeded semicolon reported by coccinelle.

    Signed-off-by: Xu Wang
    Signed-off-by: Borislav Petkov
    Acked-by: Andrew Jeffery
    Cc: James Morse
    Cc: Joel Stanley
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-aspeed@lists.ozlabs.org
    Cc: linux-edac
    Cc: Mauro Carvalho Chehab
    Cc: Robert Richter
    Cc: Stefan Schaeckeler
    Cc: Tony Luck
    Link: https://lkml.kernel.org/r/1576648806-1114-1-git-send-email-vulab@iscas.ac.cn

    Xu Wang
     

17 Dec, 2019

1 commit

  • Fixes gcc '-Wunused-but-set-variable' warning:

    drivers/edac/i5100_edac.c: In function ‘i5100_read_log’:
    drivers/edac/i5100_edac.c:489:11: warning: variable ‘ecc_loc’
    set but not used [-Wunused-but-set-variable]

    It is never used, and so can be removed.
    Signed-off-by: yu kuai
    Reviewed-by: Mauro Carvalho Chehab
    Signed-off-by: Tony Luck
    Link: https://lore.kernel.org/r/20191216110121.46698-1-yukuai3@huawei.com

    yu kuai
     

11 Dec, 2019

1 commit

  • Both skx_edac and i10nm_edac drivers are loaded based on the matching CPU being
    available which leads the module to be automatically loaded in virtual machines
    as well. That will fail due the missing PCI devices. In both drivers the first
    function to make use of the PCI devices is skx_get_hi_lo() will simply print

    EDAC skx: Can't get tolm/tohm

    for each CPU core, which is noisy. This patch makes it a debug message.

    Signed-off-by: Aristeu Rozanski
    Signed-off-by: Tony Luck
    Link: https://lore.kernel.org/r/20191204212325.c4k47p5hrnn3vpb5@redhat.com

    Aristeu Rozanski
     

10 Dec, 2019

1 commit

  • Adjust indentation from spaces to tab (+optional two spaces) as in
    coding style with a command like:

    $ sed -e 's/^ /\t/' -i */Kconfig

    [ bp: make it a single line. ]

    Signed-off-by: Krzysztof Kozlowski
    Signed-off-by: Borislav Petkov
    Cc: James Morse
    Cc: linux-edac
    Cc: Mauro Carvalho Chehab
    Cc: Robert Richter
    Cc: Tony Luck
    Link: https://lkml.kernel.org/r/20191120134206.15588-1-krzk@kernel.org

    Krzysztof Kozlowski
     

22 Nov, 2019

1 commit

  • Simplify by using the Altera System Manager driver that abstracts the
    differences between ARM32 and ARM64. Also allows the removal of the
    Arria10 test function since this is handled by the System Manager
    driver.

    Signed-off-by: Thor Thayer
    Signed-off-by: Borislav Petkov
    Cc: James Morse
    Cc: linux-edac
    Cc: Mauro Carvalho Chehab
    Cc: Meng.Li@windriver.com
    Cc: Robert Richter
    Cc: Tony Luck
    Link: https://lkml.kernel.org/r/1574361048-17572-4-git-send-email-thor.thayer@linux.intel.com

    Thor Thayer