02 Nov, 2017
1 commit
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Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.By default all files without license information are under the default
license of the kernel, which is GPL version 2.Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if
Reviewed-by: Philippe Ombredanne
Reviewed-by: Thomas Gleixner
Signed-off-by: Greg Kroah-Hartman
28 Jul, 2017
1 commit
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sirfsoc_init_late is called by each of the three individual
SoC definitions, but in a randconfig build, we can encounter
a situation where they are all disabled:arch/arm/mach-prima2/common.c:18:123: warning: 'sirfsoc_init_late' defined but not used [-Wunused-function]
While that is not a useful configuration, the warning also
doesn't help, so this patch marks the function as __maybe_unused
to let the compiler know it is there intentionally.Signed-off-by: Arnd Bergmann
19 Jun, 2017
1 commit
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, Barry Song ,
linux-kernel@vger.kernel.orgARCH_ATLAS7 resides in "if ARCH_SIRF ... end", and ARCH_SIRF depends
on ARCH_MULTI_V7, which selects CPU_V7.Signed-off-by: Masahiro Yamada
Signed-off-by: Olof Johansson
28 Feb, 2017
1 commit
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All low-level PM/SMP code using virt_to_phys() should actually use
__pa_symbol() against kernel symbols. Update code where relevant to move
away from virt_to_phys().Acked-by: Russell King
Reviewed-by: Laura Abbott
Signed-off-by: Florian Fainelli
Signed-off-by: Russell King
02 Aug, 2016
1 commit
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Pull ARM SoC cleanups from Olof Johansson:
"The cleanup branch keeps going down in size as we've completed a lot
of the major legacy platform removals and conversions.A handful of changes this time around, some of the themes or larger
sets are:- A bunch of i.MX cleanups around platform detection, init call cleanups
- Misc fixes of missing/implicit includes
- Removal of ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB"* tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (40 commits)
ARM: mps2: fix typo
ARM: s3c64xx: avoid warning about 'struct device_node'
bus: mvebu-mbus: make mvebu_mbus_syscore_ops static
bus: mvebu-mbus: fix __iomem on register pointers
ARM: tegra: Remove board_init_funcs array
ARM: iop: Fix indentation
ARM: imx: remove cpu_is_mx*()
ARM: imx: remove last call to cpu_is_mx5*
ARM: imx: rework mx27_pm_init() call
ARM: imx: deconstruct mx3_idle
ARM: imx: deconstruct mxc_rnga initialization
ARM: imx: remove cpu_is_mx1 check
ARM: i.MX: Do not explicitly call l2x0_of_init()
ARM: i.MX: system.c: Tweak prefetch settings for performance
ARM: i.MX: system.c: Replace magic numbers
ARM: i.MX: system.c: Remove redundant errata 752271 code
ARM: i.MX: system.c: Convert goto to if statement
ARM: Kirkwood: fix kirkwood_pm_init() declaration/type
ARM: Kirkwood: make kirkwood_disable_mbus_error_propagation() static
ARM: orion5x: make orion5x_legacy_handle_irq static
...
28 Jun, 2016
2 commits
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Change the Kconfig option logic to fullfil with the current approach.
A new Kconfig option is added, CONFIG_PRIMA2_TIMER and is selected by the
platform. Then the clocksource's Kconfig is changed to make this option
selectable by the user if the COMPILE_TEST option is set. Otherwise, it is
up to the platform's Kconfig to select the timer.Signed-off-by: Daniel Lezcano
-
Change the Kconfig option logic to fullfil with the current approach.
A new Kconfig option is added, CONFIG_ATLAS7_TIMER and is selected by the
platform. Then the clocksource's Kconfig is changed to make this option
selectable by the user if the COMPILE_TEST option is set. Otherwise, it is
up to the platform's Kconfig to select the timer.Signed-off-by: Daniel Lezcano
04 Jun, 2016
1 commit
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This replaces:
- "select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB" as this can
now be selected directly.- "select ARCH_WANT_OPTIONAL_GPIOLIB" with no dependency: GPIOLIB
is now selectable by everyone, so we need not declare our
intent to select it.When ordering the symbols the following rationale was used:
if the selects were in alphabetical order, I moved select GPIOLIB
to be in alphabetical order, but if the selects were not
maintained in alphabetical order, I just replaced
"select ARCH_REQUIRE_GPIOLIB" with "select GPIOLIB".Cc: Michael Büsch
Cc: arm@kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Linus Walleij
Signed-off-by: Olof Johansson
21 Mar, 2016
1 commit
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Pull ARM SoC cleanups from Arnd Bergmann:
"A few simple cleanups across multiple platforms, not much standing
out:- lpc32xx removes its private implementation of the clk API, after
generic code was merged in 4.5
- all unused Makefile.boot files get removed
- a number of simplifications for shmobile
- asm/clkdev.h gets replaced with the asm-generic version after all
mach/clkdev.h implementations are gone"* tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: shmobile: Kconfig: Get rid of old comment
ARM: shmobile: Consolidate SCU mapping code
arm: lpc32xx: remove direct control of GPIOs from shared mach file
arm: lpc32xx: remove selected HAVE_IDE
arm: lpc32xx: switch to common clock framework
ARM: Use generic clkdev.h header
ARM: plat-versatile: Remove unused clock.c file
ARM: netx: remove redundant "depends on ARCH_NETX"
ARM: integrator: remove redundant select in Kconfig
ARM: drop unused Makefile.boot of Multiplatform SoCs
ARM: mvebu: add missing of_node_put()
ARM: shmobile: r8a7779: Remove remainings of removed SCU boot setup code
ARM: shmobile: Typo s/MIPDR/MPIDR/
ARM: shmobile: Add includes providing forward declarations
ARM: shmobile: rcar-gen2: Make rcar_gen2_dma_contiguous static
ARM: mv78xx0: use "depends on" instead of "if" after prompt
27 Feb, 2016
1 commit
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The atlas7 clock controller driver registers a reset controller
for itself, which causes a link error when the subsystem is
disabled:drivers/built-in.o: In function `atlas7_clk_init':
drivers/clk/sirf/clk-atlas7.c:1681: undefined reference to `reset_controller_register'As the clk driver does not have a Kconfig symbol for itself
but it always built-in when the platform is enabled, we have
to ensure that the reset controller subsystem is also built-in
in this case.Signed-off-by: Arnd Bergmann
Acked-by: Philipp Zabel
Fixes: 301c5d29402e ("clk: sirf: add CSR atlas7 clk and reset support")
09 Feb, 2016
1 commit
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The variable "MACHINE" is empty if CONFIG_ARCH_MULTIPLATFORM=y,
so these Makefile.boot files are never included.Signed-off-by: Masahiro Yamada
Acked-by: Michal Simek (for Zynq)
Acked-by: Tony Lindgren
Signed-off-by: Olof Johansson
02 Dec, 2015
2 commits
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Many ARM sub-architectures use prompts followed by "if" conditional,
but it is wrong.Please notice the difference between
config ARCH_FOO
bool "Foo SoCs" if ARCH_MULTI_V7and
config ARCH_FOO
bool "Foo SoCs"
depends on ARCH_MULTI_V7These two are *not* equivalent!
In the former statement, it is not ARCH_FOO, but its prompt that
depends on ARCH_MULTI_V7. So, it is completely valid that ARCH_FOO
is selected by another, but ARCH_MULTI_V7 is still disabled. As it is
not unmet dependency, Kconfig never warns. This is probably not what
you want.The former should be used only when you need to do so, and you really
understand what you are doing. (In most cases, it should be wrong!)For enabling/disabling sub-architectures, the latter is always correct.
As a good side effect, this commit fixes some entries over 80 columns
(mach-imx, mach-integrator, mach-mbevu).[Arnd: I note that there is not really a bug here, according to
the discussion that followed, but I can see value in being consistent
and in making the lines shorter]Signed-off-by: Masahiro Yamada
Acked-by: Maxime Ripard
Acked-by: Nicolas Ferre
Acked-by: Heiko Stuebner
Acked-by: Patrice Chotard
Acked-by: Liviu Dudau
Acked-by: Krzysztof Kozlowski
Acked-by: Jun Nie
Acked-by: Matthias Brugger
Acked-by: Simon Horman
Acked-by: Gregory CLEMENT
Acked-by: Shawn Guo
Acked-by: Sebastian Hesselbarth
Acked-by: Thierry Reding
Acked-by: Krzysztof Halasa
Acked-by: Maxime Coquelin
Signed-off-by: Arnd Bergmann -
These smp_operations structures are not over-written, so add "const"
qualifier and replace __initdata with __initconst.Also, add "static" where it is possible.
Signed-off-by: Masahiro Yamada
Acked-by: Krzysztof Kozlowski
Acked-by: Maxime Ripard
Acked-by: Moritz Fischer
Acked-by: Stephen Boyd # qcom part
Acked-by: Viresh Kumar
Acked-by: Patrice Chotard
Acked-by: Heiko Stuebner
Acked-by: Wei Xu
Acked-by: Florian Fainelli
Acked-by: Sebastian Hesselbarth
Acked-by: Gregory CLEMENT
Acked-by: Shawn Guo
Acked-by: Matthias Brugger
Acked-by: Thierry Reding
Acked-by: Nicolas Pitre
Acked-by: Liviu Dudau
Acked-by: Linus Walleij
Signed-off-by: Arnd Bergmann
23 Oct, 2015
1 commit
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Now that __cpuinit has been removed, the __ref markings on these
functions are useless. Remove them. This also reduces the size of
the multi_v7_defconfig image:$ size before after
text data bss dec hex filename
12683578 1470996 348904 14503478 dd4e36 before
12683274 1470996 348904 14503174 dd4d06 afterpresumably because now we don't have to jump to code in the
.ref.text section and/or the noinline marking is removed.Cc: Shiraz Hashim
Cc: Stephen Warren
Cc: Alexandre Courbot
Cc: Lorenzo Pieralisi
Cc: Will Deacon
Cc:
Cc:
Cc:
Cc:
Acked-by: Tony Lindgren
Acked-by: Barry Song
Acked-by: Andy Gross
Acked-by: Viresh Kumar
Acked-by: Thierry Reding
Acked-by: Linus Walleij
Acked-by: Sudeep Holla
Acked-by: Mark Rutland
Signed-off-by: Stephen Boyd
Signed-off-by: Olof Johansson
03 Sep, 2015
1 commit
25 Jul, 2015
1 commit
-
The existing memory barrier macro causes a significant amount of code
to be inserted inline at every call site. For example, in
gpio_set_irq_type(), we have this for mb():c0344c08: f57ff04e dsb st
c0344c0c: e59f8190 ldr r8, [pc, #400] ; c0344da4
c0344c10: e3590004 cmp r9, #4
c0344c14: e5983014 ldr r3, [r8, #20]
c0344c18: 0a000054 beq c0344d70
c0344c1c: e3530000 cmp r3, #0
c0344c20: 0a000004 beq c0344c38
c0344c24: e50b2030 str r2, [fp, #-48] ; 0xffffffd0
c0344c28: e50bc034 str ip, [fp, #-52] ; 0xffffffcc
c0344c2c: e12fff33 blx r3
c0344c30: e51bc034 ldr ip, [fp, #-52] ; 0xffffffcc
c0344c34: e51b2030 ldr r2, [fp, #-48] ; 0xffffffd0
c0344c38: e5963004 ldr r3, [r6, #4]Moving the outer_cache_sync() call out of line reduces the impact of
the barrier:c0344968: f57ff04e dsb st
c034496c: e35a0004 cmp sl, #4
c0344970: e50b2030 str r2, [fp, #-48] ; 0xffffffd0
c0344974: 0a000044 beq c0344a8c
c0344978: ebf363dd bl c001d8f4
c034497c: e5953004 ldr r3, [r5, #4]This should reduce the cache footprint of this code. Overall, this
results in a reduction of around 20K in the kernel size:text data bss dec hex filename
10773970 667392 10369656 21811018 14ccf4a ../build/imx6/vmlinux-old
10754219 667392 10369656 21791267 14c8223 ../build/imx6/vmlinux-newAnother advantage to this approach is that we can finally resolve the
issue of SoCs which have their own memory barrier requirements within
multiplatform kernels (such as OMAP.) Here, the bus interconnects
need additional handling to ensure that writes become visible in the
correct order (eg, between dma_map() operations, writes to DMA
coherent memory, and MMIO accesses.)Acked-by: Tony Lindgren
Acked-by: Richard Woodruff
Signed-off-by: Russell King
09 Jul, 2015
1 commit
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…el/git/baohua/linux into fixes
Merge "CSR SiRFSoC rtc iobrg move to regmap for 4.2" from Barry Song:
move CSR rtc iobrg read/write API to be regmap
this moves to general APIs, and all drivers will be changed based
on it.* tag 'sirf-iobrg2regmap-for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
ARM: prima2: move to use REGMAP APIs for rtciobrg
10 Jun, 2015
1 commit
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all devices behind rtciobrg needs a special way to access. currently they
are using a platform-specific API.
this patch moves to REGMAP, then clients can use regmap APIs to read/write.
for the moment, old APIs are still kept, once all clients move to regmap,
old APIs will be dropped.this patch also does minor clean for comments, authors statement.
Signed-off-by: Guo Zeng
Signed-off-by: Barry Song
01 Jun, 2015
1 commit
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All ARMv5 and older CPUs invalidate their caches in the early assembly
setup function, prior to enabling the MMU. This is because the L1
cache should not contain any data relevant to the execution of the
kernel at this point; all data should have been flushed out to memory.This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
these typically do not search their caches when caching is disabled (as
it needs to be when the MMU is disabled) so this change should be safe.ARMv7 allows there to be CPUs which search their caches while caching is
disabled, and it's permitted that the cache is uninitialised at boot;
for these, the architecture reference manual requires that an
implementation specific code sequence is used immediately after reset
to ensure that the cache is placed into a sane state. Such
functionality is definitely outside the remit of the Linux kernel, and
must be done by the SoC's firmware before _any_ CPU gets to the Linux
kernel.Changing the data cache clean+invalidate to a mere invalidate allows us
to get rid of a lot of platform specific hacks around this issue for
their secondary CPU bringup paths - some of which were buggy.Reviewed-by: Florian Fainelli
Tested-by: Florian Fainelli
Tested-by: Heiko Stuebner
Tested-by: Dinh Nguyen
Acked-by: Sebastian Hesselbarth
Tested-by: Sebastian Hesselbarth
Acked-by: Shawn Guo
Tested-by: Thierry Reding
Acked-by: Thierry Reding
Tested-by: Geert Uytterhoeven
Tested-by: Michal Simek
Tested-by: Wei Xu
Signed-off-by: Russell King
19 Feb, 2015
2 commits
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of_device_ids (i.e. compatible strings and the respective data) are not
supposed to change at runtime. All functions working with of_device_ids
provided by work with const of_device_ids. So mark the
non-const structs in arch/arm as const, too.While at it also add some __initconst annotations.
Acked-by: Jason Cooper
Signed-off-by: Uwe Kleine-König
Signed-off-by: Arnd Bergmann -
The definition
static const char *axxia_dt_match[] __initconst = {
...defines a changable array of constant strings. That is you must not do:
*axxia_dt_match[0] = 'k';
but
axxia_dt_match[0] = "different string";
is fine. So the annotation __initconst is wrong and yields a compiler
error when other really const variables are added with __initconst.As the struct machine_desc member dt_compat is declared as
const char *const *dt_compat;
making the arrays const is the better alternative over changing all
annotations to __initdata.Signed-off-by: Uwe Kleine-König
Signed-off-by: Arnd Bergmann
18 Feb, 2015
2 commits
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The new Atlas7 platform implicitly selects 'CONFIG_SMP_ON_UP',
which leads to problems if we enable building the platform without
MMU, as that combination is not allowed and causes a link error:arch/arm/kernel/built-in.o: In function `c_show':
:(.text+0x1872): undefined reference to `smp_on_up'
:(.text+0x1876): undefined reference to `smp_on_up'
arch/arm/kernel/built-in.o: In function `arch_irq_work_raise':
:(.text+0x3d48): undefined reference to `smp_on_up'
:(.text+0x3d4c): undefined reference to `smp_on_up'
arch/arm/kernel/built-in.o: In function `smp_setup_processor_id':
:(.init.text+0x180): undefined reference to `smp_on_up'This removes the 'select' statement.
Signed-off-by: Arnd Bergmann
Fixes: 4cba058526a7 ("ARM: sirf: add Atlas7 machine support")
Acked-by: Barry Song
Cc: Zhiwu Song -
Pull ARM SoC platform changes from Olof Johansson:
"New and updated SoC support. Also included are some cleanups where
the platform maintainers hadn't separated cleanups from new developent
in separate branches.Some of the larger things worth pointing out:
- A large set of changes from Alexandre Belloni and Nicolas Ferre
preparing at91 platforms for multiplatform and cleaning up quite a
bit in the process.- Removal of CSR's "Marco" SoC platform that never made it out to the
market. We love seeing these since it means the vendor published
support before product was out, which is exactly what we want!New platforms this release are:
- Conexant Digicolor (CX92755 SoC)
- Hisilicon HiP01 SoC
- CSR/sirf Atlas7 SoC
- ST STiH418 SoC
- Common code changes for Nvidia Tegra132 (64-bit SoC)We're seeing more and more platforms having a harder time labelling
changes as cleanups vs new development -- which is a good sign that
we've come quite far on the cleanup effort. So over time we might
start combining the cleanup and new-development branches more"* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (124 commits)
ARM: at91/trivial: unify functions and machine names
ARM: at91: remove at91_dt_initialize and machine init_early()
ARM: at91: change board files into SoC files
ARM: at91: remove at91_boot_soc
ARM: at91: move alternative initial mapping to board-dt-sama5.c
ARM: at91: merge all SOC_AT91SAM9xxx
ARM: at91: at91rm9200: set idle and restart from rm9200_dt_device_init()
ARM: digicolor: select syscon and timer
ARM: zynq: Simplify SLCR initialization
ARM: zynq: PM: Fixed simple typo.
ARM: zynq: Setup default gpio number for Xilinx Zynq
ARM: digicolor: add low level debug support
ARM: initial support for Conexant Digicolor CX92755 SoC
ARM: OMAP2+: Add dm816x hwmod support
ARM: OMAP2+: Add clock domain support for dm816x
ARM: OMAP2+: Add board-generic.c entry for ti81xx
ARM: at91: pm: remove warning to remove SOC_AT91SAM9263 usage
ARM: at91: remove unused mach/system_rev.h
ARM: at91: stop using HAVE_AT91_DBGUx
ARM: at91: fix ordering of SRAM and PM initialization
...
06 Feb, 2015
1 commit
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with the patchset to add CSR atlas7 support, the below stuff
has no user now:
SIRFSOC_VA
sirfsoc_map_lluart
sirfsoc_map_scuthe related patches missed to drop them.
Signed-off-by: Barry Song
Signed-off-by: Olof Johansson
20 Jan, 2015
5 commits
-
CSRatlas7 is next-gen auto SoC from CSR.
It could bring to customers most integrated SoC solution:
- World leading Bluetooth 4.0 and GNSS baseband
- Audio processing, analog CODEC and ADC by DSP
- Analog video input
- SDR accelerators
- CAN bus support by Cortex-M3Signed-off-by: Zhiwu Song
Signed-off-by: Barry Song
Acked-by: Arnd Bergmann -
This patch moves to debug_ll_io_init(), then finally drops CSR map_io()
machine callbacks.Signed-off-by: Barry Song
Acked-by: Arnd Bergmann -
This patch breaks Marco SMP support, but Marco project has been dropped.
So it corrects cpu1 jump/flag address for Atlas7 and removes scu related
logic as scu doesn't expose in cortex-a7.Signed-off-by: Zhiwu Song
Signed-off-by: Barry Song
Acked-by: Arnd Bergmann -
Marco will not be supported any more. it has been replaced by CSR
Atlas7.Signed-off-by: Barry Song
Acked-by: Arnd Bergmann -
Marco will not be supported any more. It has been replaced by CSR
Atlas7.Signed-off-by: Barry Song
Acked-by: Arnd Bergmann
14 Jan, 2015
1 commit
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Marco will not be supported any more. it has been replaced by CSR
Atlas7.Signed-off-by: Barry Song
Acked-by: Arnd Bergmann
20 Oct, 2014
1 commit
-
A platform_driver does not need to set an owner, it will be populated by the
driver core.Signed-off-by: Wolfram Sang
17 Jun, 2014
1 commit
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The System Type menu is getting quite long with platforms and is
inconsistent in handling of sub-arch specific options. Tidy up the menu
by making platform options a menuconfig entry containing any platform
specific config items.[arnd: change OMAP part according to suggestion from
Tony Lindgren ]Signed-off-by: Rob Herring
Signed-off-by: Arnd Bergmann
06 Jun, 2014
1 commit
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Pull ARM updates from Russell King:
- Major clean-up of the L2 cache support code. The existing mess was
becoming rather unmaintainable through all the additions that others
have done over time. This turns it into a much nicer structure, and
implements a few performance improvements as well.- Clean up some of the CP15 control register tweaks for alignment
support, moving some code and data into alignment.c- DMA properties for ARM, from Santosh and reviewed by DT people. This
adds DT properties to specify bus translations we can't discover
automatically, and to indicate whether devices are coherent.- Hibernation support for ARM
- Make ftrace work with read-only text in modules
- add suspend support for PJ4B CPUs
- rework interrupt masking for undefined instruction handling, which
allows us to enable interrupts earlier in the handling of these
exceptions.- support for big endian page tables
- fix stacktrace support to exclude stacktrace functions from the
trace, and add save_stack_trace_regs() implementation so that kprobes
can record stack traces.- Add support for the Cortex-A17 CPU.
- Remove last vestiges of ARM710 support.
- Removal of ARM "meminfo" structure, finally converting us solely to
memblock to handle the early memory initialisation.* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits)
ARM: ensure C page table setup code follows assembly code (part II)
ARM: ensure C page table setup code follows assembly code
ARM: consolidate last remaining open-coded alignment trap enable
ARM: remove global cr_no_alignment
ARM: remove CPU_CP15 conditional from alignment.c
ARM: remove unused adjust_cr() function
ARM: move "noalign" command line option to alignment.c
ARM: provide common method to clear bits in CPU control register
ARM: 8025/1: Get rid of meminfo
ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type
ARM: 8066/1: correction for ARM patch 8031/2
ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation
ARM: 8065/1: remove last use of CONFIG_CPU_ARM710
ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction
ARM: 8047/1: rwsem: use asm-generic rwsem implementation
ARM: l2c: trial at enabling some Cortex-A9 optimisations
ARM: l2c: add warnings for stuff modifying aux_ctrl register values
ARM: l2c: print a warning with L2C-310 caches if the cache size is modified
ARM: l2c: remove old .set_debug method
ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this
...
30 May, 2014
3 commits
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Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead. Along with this change, we can delete l2x0.c
from prima2.Signed-off-by: Russell King
-
The cache size should already be present in the L2 cache auxiliary
control register: it is part of the integration process to configure
the hardware IP. Most platforms get this right, yet still many
cargo-cult program, and assume that they always need specifying to
the L2 cache code. Remove them so we can find out which really need
this.Signed-off-by: Russell King
-
We have a mixture of different devices with different register layouts,
but we group all the bits together in an opaque mess. Split them out
into those which are L2C-310 specific and ones which refer to earlier
devices. Provide full auxiliary control register definitions.Acked-by: Tony Lindgren
Acked-by: Linus Walleij
Acked-by: Shawn Guo
Acked-by: Stephen Warren
Signed-off-by: Russell King
22 May, 2014
1 commit
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outer_disable() is defined to safely turn the L2 cache off without data
loss: this means that outer_flush_all() should never be called unless
you need to implement some special L2 cache disabling, and even then
only from your replacement L2 cache disable function.Acked-by: Barry Song
Signed-off-by: Russell King
12 May, 2014
1 commit
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this patch fixes the below minor issues:
WARNING: line over 80 characters
39: FILE: arch/arm/mach-prima2/rstc.c:39:
+ * Writing 1 to this bit resets corresponding block. Writing 0 to thisWARNING: line over 80 characters
41: FILE: arch/arm/mach-prima2/rstc.c:41:
+ * datasheet doesn't require explicit delay between the set and clearWARNING: line over 80 characters
44: FILE: arch/arm/mach-prima2/rstc.c:44:
+ writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) | (1 << reset_bit),WARNING: msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt
46: FILE: arch/arm/mach-prima2/rstc.c:46:
+ msleep(10);WARNING: line over 80 characters
47: FILE: arch/arm/mach-prima2/rstc.c:47:
+ writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) & ~(1 << reset_bit),WARNING: line over 80 characters
52: FILE: arch/arm/mach-prima2/rstc.c:52:
+ * Writing 1 to SET register resets corresponding block. Writing 1 to CLEARWARNING: line over 80 characters
54: FILE: arch/arm/mach-prima2/rstc.c:54:
+ * datasheet doesn't require explicit delay between the set and clearWARNING: line over 80 characters
57: FILE: arch/arm/mach-prima2/rstc.c:57:
+ writel(1 << reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8);WARNING: msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt
58: FILE: arch/arm/mach-prima2/rstc.c:58:
+ msleep(10);WARNING: line over 80 characters
59: FILE: arch/arm/mach-prima2/rstc.c:59:
+ writel(1 << reset_bit, sirfsoc_rstc_base + (reset_bit / 32) * 8 + 4);total: 0 errors, 10 warnings, 120 lines checked
Signed-off-by: Xianglong Du
Signed-off-by: Barry Song
08 Apr, 2014
1 commit
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If the renamed symbol is defined lib/iomap.c implements ioport_map and
ioport_unmap and currently (nearly) all platforms define the port
accessor functions outb/inb and friend unconditionally. So
HAS_IOPORT_MAP is the better name for this.Consequently NO_IOPORT is renamed to NO_IOPORT_MAP.
The motivation for this change is to reintroduce a symbol HAS_IOPORT
that signals if outb/int et al are available. I will address that at
least one merge window later though to keep surprises to a minimum and
catch new introductions of (HAS|NO)_IOPORT.The changes in this commit were done using:
$ git grep -l -E '(NO|HAS)_IOPORT' | xargs perl -p -i -e 's/\b((?:CONFIG_)?(?:NO|HAS)_IOPORT)\b/$1_MAP/'
Signed-off-by: Uwe Kleine-König
Acked-by: Arnd Bergmann
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
18 Mar, 2014
1 commit
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The prima2 platform code currently depends on the rstc
implementation and that in turn depends on the reset
controller framework. This removes the platform dependency
by letting the driver access arm_pm_restart directly
to turn the driver into a standalone entity, and also
removes the dependency on the reset controller framework
by using "if (IS_ENABLED(CONFIG_RESET_CONTROLLER))". This
will cause all code that is used for the reset controller
to be dropped by the compiler if the framework is disabled.Signed-off-by: Arnd Bergmann