16 Aug, 2012
2 commits
-
Commit dbf0e4c (PCI: EHCI: fix crash during suspend on ASUS
computers) added a workaround for an ASUS suspend issue related to
USB EHCI and a bug in a number of ASUS BIOSes that attempt to shut
down the EHCI controller during system suspend if its PCI command
register doesn't contain 0 at that time.It turns out that the same workaround is necessary in the analogous
hibernation code path, so add it.References: https://bugzilla.kernel.org/show_bug.cgi?id=45811
Reported-and-tested-by: Oleksij Rempel
Signed-off-by: Rafael J. Wysocki
Signed-off-by: Bjorn Helgaas
Cc: stable@vger.kernel.org -
If a PCI device is put into D3_cold by acpi_bus_set_power(),
the message printed by acpi_pci_set_power_state() says that its
power state has been changed to D4, which doesn't make sense.
In turn, if the device is put into D3_hot, the message simply
says "D3" without specifying the variant of the D3 state.Fix this by using the pci_power_name() macro for printing the state
name instead of building it from the numeric value corresponding to
the given state directly.Signed-off-by: Rafael J. Wysocki
Signed-off-by: Bjorn Helgaas
25 Jul, 2012
2 commits
-
Pull PCI changes from Bjorn Helgaas:
"Host bridge hotplug:
- Add MMCONFIG support for hot-added host bridges (Jiang Liu)
Device hotplug:
- Move fixups from __init to __devinit (Sebastian Andrzej Siewior)
- Call FINAL fixups for hot-added devices, too (Myron Stowe)
- Factor out generic code for P2P bridge hot-add (Yinghai Lu)
- Remove all functions in a slot, not just those with _EJx (Amos
Kong)
Dynamic resource management:
- Track bus number allocation (struct resource tree per domain)
(Yinghai Lu)
- Make P2P bridge 1K I/O windows work with resource reassignment
(Bjorn Helgaas, Yinghai Lu)
- Disable decoding while updating 64-bit BARs (Bjorn Helgaas)
Power management:
- Add PCIe runtime D3cold support (Huang Ying)
Virtualization:
- Add VFIO infrastructure (ACS, DMA source ID quirks) (Alex
Williamson)
- Add quirks for devices with broken INTx masking (Jan Kiszka)
Miscellaneous:
- Fix some PCI Express capability version issues (Myron Stowe)
- Factor out some arch code with a weak, generic, pcibios_setup()
(Myron Stowe)"* tag 'for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (122 commits)
PCI: hotplug: ensure a consistent return value in error case
PCI: fix undefined reference to 'pci_fixup_final_inited'
PCI: build resource code for M68K architecture
PCI: pciehp: remove unused pciehp_get_max_lnk_width(), pciehp_get_cur_lnk_width()
PCI: reorder __pci_assign_resource() (no change)
PCI: fix truncation of resource size to 32 bits
PCI: acpiphp: merge acpiphp_debug and debug
PCI: acpiphp: remove unused res_lock
sparc/PCI: replace pci_cfg_fake_ranges() with pci_read_bridge_bases()
PCI: call final fixups hot-added devices
PCI: move final fixups from __init to __devinit
x86/PCI: move final fixups from __init to __devinit
MIPS/PCI: move final fixups from __init to __devinit
PCI: support sizing P2P bridge I/O windows with 1K granularity
PCI: reimplement P2P bridge 1K I/O windows (Intel P64H2)
PCI: disable MEM decoding while updating 64-bit MEM BARs
PCI: leave MEM and IO decoding disabled during 64-bit BAR sizing, too
PCI: never discard enable/suspend/resume_early/resume fixups
PCI: release temporary reference in __nv_msi_ht_cap_quirk()
PCI: restructure 'pci_do_fixups()'
... -
Pull trivial tree from Jiri Kosina:
"Trivial updates all over the place as usual."* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (29 commits)
Fix typo in include/linux/clk.h .
pci: hotplug: Fix typo in pci
iommu: Fix typo in iommu
video: Fix typo in drivers/video
Documentation: Add newline at end-of-file to files lacking one
arm,unicore32: Remove obsolete "select MISC_DEVICES"
module.c: spelling s/postition/position/g
cpufreq: Fix typo in cpufreq driver
trivial: typo in comment in mksysmap
mach-omap2: Fix typo in debug message and comment
scsi: aha152x: Fix sparse warning and make printing pointer address more portable.
Change email address for Steve Glendinning
Btrfs: fix typo in convert_extent_bit
via: Remove bogus if check
netprio_cgroup.c: fix comment typo
backlight: fix memory leak on obscure error path
Documentation: asus-laptop.txt references an obsolete Kconfig item
Documentation: ManagementStyle: fixed typo
mm/vmscan: cleanup comment error in balance_pgdat
mm: cleanup on the comments of zone_reclaim_stat
...
24 Jul, 2012
2 commits
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Correct spelling typo in drivers/pci/hotplug.
Signed-off-by: Masanari Iida
Signed-off-by: Jiri Kosina -
Pull arch/tile updates from Chris Metcalf:
"These changes provide support for PCIe root complex and USB host mode
for tilegx's on-chip I/Os.In addition, this pull provides the required underpinning for the
on-chip networking support that was pulled into 3.5. The changes have
all been through LKML (with several rounds for PCIe RC) and on
linux-next."* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:
tile: updates to pci root complex from community feedback
bounce: allow use of bounce pool via config option
usb: add host support for the tilegx architecture
arch/tile: provide kernel support for the tilegx USB shim
tile pci: enable IOMMU to support DMA for legacy devices
arch/tile: enable ZONE_DMA for tilegx
tilegx pci: support I/O to arbitrarily-cached pages
tile: remove unused header
arch/tile: tilegx PCI root complex support
arch/tile: provide kernel support for the tilegx TRIO shim
arch/tile: break out the "csum a long" function to
arch/tile: provide kernel support for the tilegx mPIPE shim
arch/tile: common DMA code for the GXIO IORPC subsystem
arch/tile: support MMIO-based readb/writeb etc.
arch/tile: introduce GXIO IORPC framework for tilegx
19 Jul, 2012
3 commits
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This change implements PCIe root complex support for tilegx using
the kernel support layer for accessing the TRIO hardware shim.Reviewed-by: Bjorn Helgaas [changes in 07487f3]
Signed-off-by: Chris Metcalf -
* pci/yinghai-pciehp-unused:
PCI: pciehp: remove unused pciehp_get_max_lnk_width(), pciehp_get_cur_lnk_width() -
* pci/nikhil-big-bar-fixes:
PCI: reorder __pci_assign_resource() (no change)
PCI: fix truncation of resource size to 32 bits
16 Jul, 2012
4 commits
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* pci/julia-return-values:
PCI: hotplug: ensure a consistent return value in error case -
Typically, the return value desired for the failure of a function with an
integer return value is a negative integer. In these cases, the return
value is sometimes a negative integer and sometimes 0, due to a subsequent
initialization of the return variable within the loop.A simplified version of the semantic match that finds this problem is:
(http://coccinelle.lip6.fr/)//
@r exists@
identifier ret;
position p;
constant C;
expression e1,e3,e4;
statement S;
@@ret = -C
... when != ret = e3
when any
if@p (...) S
... when any
if (\(ret != 0\|ret < 0\|ret > 0\) || ...) { ... return ...; }
... when != ret = e3
when any
*if@p (...)
{
... when != ret = e4
return ret;
}
//[bhelgaas: squashed into one patch]
Signed-off-by: Julia Lawall
Signed-off-by: Bjorn Helgaas -
* pci/myron-final-fixups-v2:
PCI: fix undefined reference to 'pci_fixup_final_inited' -
My "PCI: Integrate 'pci_fixup_final' quirks into hot-plug paths" patch
introduced an undefined reference to 'pci_fixup_final_inited' when
CONFIG_PCI_QUIRKS is not enabled (on x86_64):
drivers/built-in.o: In function `pci_bus_add_device':
(.text+0x4f62): undefined reference to `pci_fixup_final_inited'This patch removes the external reference ending up with a result closer
to what we ultimately want when the boot path issues described in the
original patch are resolved.References:
https://lkml.org/lkml/2012/7/9/542 Original, offending, patch
https://lkml.org/lkml/2012/7/12/338 Randy's catchReported-by: Randy Dunlap
Signed-off-by: Myron Stowe
Signed-off-by: Bjorn Helgaas
Acked-by: Randy Dunlap
13 Jul, 2012
3 commits
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* pci/greg-m68k:
PCI: build resource code for M68K architecture -
The ColdFire M54xx family of CPU cores (supported by the m68k arch code)
have PCI bus hardware. We want to be able to use this and will need the
setup-bus.c and setup-irq.c helper functions. So when CONFIG_M68K is
enabled add them to the objs build list.Signed-off-by: Greg Ungerer
Signed-off-by: Bjorn Helgaas -
Signed-off-by: Yinghai Lu
Signed-off-by: Bjorn Helgaas
Cc: Kenji Kaneshige
12 Jul, 2012
3 commits
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Reorder functions so __pci_assign_resource(), _pci_assign_resource(),
and pci_assign_resource() are closer together. No code change.Signed-off-by: Bjorn Helgaas
-
_pci_assign_resource() took an int "size" argument, which meant that
sizes larger than 4GB were truncated. Change type to resource_size_t.[bhelgaas: changelog]
Signed-off-by: Nikhil P Rao
Signed-off-by: Bjorn Helgaas -
* pci/yinghai-hotplug-cleanup:
PCI: acpiphp: merge acpiphp_debug and debug
PCI: acpiphp: remove unused res_lock
11 Jul, 2012
3 commits
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Should not have two, just remove debug, and use module_param_named
instead.Also change acpiphp_debug to bool.
Signed-off-by: Yinghai Lu
Signed-off-by: Bjorn Helgaas -
res_lock is never used, so remove it.
Signed-off-by: Yinghai Lu
Signed-off-by: Bjorn Helgaas -
Quite a few ASUS computers experience a nasty problem, related to the
EHCI controllers, when going into system suspend. It was observed
that the problem didn't occur if the controllers were not put into the
D3 power state before starting the suspend, and commit
151b61284776be2d6f02d48c23c3625678960b97 (USB: EHCI: fix crash during
suspend on ASUS computers) was created to do this.It turned out this approach messed up other computers that didn't have
the problem -- it prevented USB wakeup from working. Consequently
commit c2fb8a3fa25513de8fedb38509b1f15a5bbee47b (USB: add
NO_D3_DURING_SLEEP flag and revert 151b61284776be2) was merged; it
reverted the earlier commit and added a whitelist of known good board
names.Now we know the actual cause of the problem. Thanks to AceLan Kao for
tracking it down.According to him, an engineer at ASUS explained that some of their
BIOSes contain a bug that was added in an attempt to work around a
problem in early versions of Windows. When the computer goes into S3
suspend, the BIOS tries to verify that the EHCI controllers were first
quiesced by the OS. Nothing's wrong with this, but the BIOS does it
by checking that the PCI COMMAND registers contain 0 without checking
the controllers' power state. If the register isn't 0, the BIOS
assumes the controller needs to be quiesced and tries to do so. This
involves making various MMIO accesses to the controller, which don't
work very well if the controller is already in D3. The end result is
a system hang or memory corruption.Since the value in the PCI COMMAND register doesn't matter once the
controller has been suspended, and since the value will be restored
anyway when the controller is resumed, we can work around the BIOS bug
simply by setting the register to 0 during system suspend. This patch
(as1590) does so and also reverts the second commit mentioned above,
which is now unnecessary.In theory we could do this for every PCI device. However to avoid
introducing new problems, the patch restricts itself to EHCI host
controllers.Finally the affected systems can suspend with USB wakeup working
properly.Reference: https://bugzilla.kernel.org/show_bug.cgi?id=37632
Reference: https://bugzilla.kernel.org/show_bug.cgi?id=42728
Based-on-patch-by: AceLan Kao
Signed-off-by: Alan Stern
Tested-by: Dâniel Fraga
Tested-by: Javier Marcet
Tested-by: Andrey Rahmatullin
Tested-by: Oleksij Rempel
Tested-by: Pavel Pisa
Cc: stable
Acked-by: Bjorn Helgaas
Acked-by: Rafael J. Wysocki
Signed-off-by: Greg Kroah-Hartman
10 Jul, 2012
13 commits
-
* pci/bjorn-p2p-bridge-windows:
sparc/PCI: replace pci_cfg_fake_ranges() with pci_read_bridge_bases()
PCI: support sizing P2P bridge I/O windows with 1K granularity
PCI: reimplement P2P bridge 1K I/O windows (Intel P64H2)
PCI: allow P2P bridge windows starting at PCI bus address zeroConflicts:
drivers/pci/probe.c
include/linux/pci.h -
* pci/bjorn-disable-decode:
PCI: disable MEM decoding while updating 64-bit MEM BARs
PCI: leave MEM and IO decoding disabled during 64-bit BAR sizing, too -
* pci/myron-final-fixups-v2:
PCI: call final fixups hot-added devices
PCI: move final fixups from __init to __devinit
x86/PCI: move final fixups from __init to __devinit
MIPS/PCI: move final fixups from __init to __devinit
PCI: never discard enable/suspend/resume_early/resume fixups
PCI: release temporary reference in __nv_msi_ht_cap_quirk()
PCI: restructure 'pci_do_fixups()' -
Final fixups are currently applied only at boot-time by
pci_apply_final_quirks(), which is an fs_initcall(). Hot-added devices
don't get these fixups, so they may not be completely initialized.This patch makes us run final fixups for hot-added devices in
pci_bus_add_device() just before the new device becomes eligible for driver
binding.This patch keeps the fs_initcall() for devices present at boot because we
do resource assignment between pci_bus_add_device and the fs_initcall(),
and we don't want to break any fixups that depend on that assignment. This
is a design issue that may be addressed in the future -- any resource
assignment should be done *before* device_add().[bhelgaas: changelog]
Signed-off-by: Myron Stowe
Signed-off-by: Bjorn Helgaas -
Final fixups are executed during device enumeration. If we support
hotplug, this may be after boot, so final fixups cannot be __init.[bhelgaas: changelog]
Signed-off-by: Myron Stowe
Signed-off-by: Bjorn Helgaas -
Some bridges support I/O windows with 1K alignment, not just the 4K
alignment defined by the PCI spec. For example, see the IOBL_ADR register
and the EN1K bit in the CNF register in the Intel 82870P2 (P64H2).This patch adds support for sizing the window in 1K increments based
on the requirements of downstream devices.[bhelgaas: changelog, comment]
Signed-off-by: Yinghai Lu
Signed-off-by: Bjorn Helgaas -
9d265124d051 and 15a260d53f7c added quirks for P2P bridges that support
I/O windows that start/end at 1K boundaries, not just the 4K boundaries
defined by the PCI spec. For details, see the IOBL_ADR register and the
EN1K bit in the CNF register in the Intel 82870P2 (P64H2).These quirks complicate the code that reads P2P bridge windows
(pci_read_bridge_io() and pci_cfg_fake_ranges()) because the bridge
I/O resource is updated in the HEADER quirk, in pci_read_bridge_io(),
in pci_setup_bridge(), and again in the FINAL quirk. This is confusing
and makes it impossible to reassign the bridge windows after FINAL
quirks are run.This patch adds support for 1K windows in the generic paths, so the
HEADER quirk only has to enable this support. The FINAL quirk, which
used to undo damage done by pci_setup_bridge(), is no longer needed.This removes "if (!res->start) res->start = ..." from pci_read_bridge_io();
that was part of 9d265124d051 to avoid overwriting the resource filled in
by the quirk. Since pci_read_bridge_io() itself now knows about
granularity, the quirk no longer updates the resource and this test is no
longer needed.Signed-off-by: Bjorn Helgaas
-
When we update 64-bit BARs, we have to perform two config writes. Between
the writes, the half-written BAR value could match a MEM access intended
for another device. This could result in corruption of this device (for
writes) or an unexpected response machine check (for reads).To prevent this, disable MEM decoding while updating such BARs. This uses
the same safety test as 253d2e5498, which disables both MEM and IO while
sizing BARs, namely, we don't disable decoding for host bridge devices.Signed-off-by: Bjorn Helgaas
-
After 253d2e5498, we disable MEM and IO decoding for most devices while we
size 32-bit BARs. However, we restore the original COMMAND register before
we size the upper 32 bits of 64-bit BARs, so we can still cause a conflict.This patch waits to restore the original COMMAND register until we're
completely finished sizing the BAR.Reference: https://lkml.org/lkml/2007/8/25/154
Acked-by: Jacob Pan
Signed-off-by: Bjorn Helgaas -
The enable/suspend/resume_early/resume fixups can be called at any time, so
they can't be __init or __devinit.[bhelgaas: changelog]
Signed-off-by: Myron Stowe
Signed-off-by: Bjorn Helgaas -
__nv_msi_ht_cap_quirk() acquires a temporary reference via
'pci_get_bus_and_slot()' that is never released.This patch releases the temporary reference.
Signed-off-by: Myron Stowe
Signed-off-by: Bjorn Helgaas -
This patch restructures pci_do_fixups()'s quirk invocations in the style
of initcall_debug_start() and initcall_debug_report(), so we have only
one call site for the quirk.[bhelgaas: changelog]
Signed-off-by: Myron Stowe
Signed-off-by: Bjorn Helgaas -
cd81e1ea1a4c added checks that prevent us from using P2P bridge windows
that start at PCI bus address zero. The reason was to "prevent us from
overwriting resources that are unassigned."But generic code should allow address zero in both BARs and bridge
windows, so I think that commit was a mistake.Windows at bus address zero are legal and likely to exist on machines with
an offset between bus addresses and CPU addresses. For example, in the
following hypothetical scenario, the bridge at 00:01.0 has a window at bus
address zero and the device at 01:00.0 has a BAR at bus address zero, and
I think both are perfectly valid:PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [mem 0x100000000-0x1ffffffff] (bus address [0x00000000-0xffffffff])
pci 0000:00:01.0: PCI bridge to [bus 01]
pci 0000:00:01.0: bridge window [mem 0x100000000-0x100ffffff]
pci 0000:01:00.0: reg 10: [mem 0x100000000-0x100ffffff]Acked-by: Yinghai Lu
Signed-off-by: Bjorn Helgaas
06 Jul, 2012
3 commits
-
* pci/rafael-pci_set_power_state-rebase:
PCI / PM: restore the original behavior of pci_set_power_state() -
* pci/myron-pcibios_setup:
xtensa/PCI: factor out pcibios_setup()
x86/PCI: adjust section annotations for pcibios_setup()
unicore32/PCI: adjust section annotations for pcibios_setup()
tile/PCI: factor out pcibios_setup()
sparc/PCI: factor out pcibios_setup()
sh/PCI: adjust section annotations for pcibios_setup()
sh/PCI: factor out pcibios_setup()
powerpc/PCI: factor out pcibios_setup()
parisc/PCI: factor out pcibios_setup()
MIPS/PCI: adjust section annotations for pcibios_setup()
MIPS/PCI: factor out pcibios_setup()
microblaze/PCI: factor out pcibios_setup()
ia64/PCI: factor out pcibios_setup()
cris/PCI: factor out pcibios_setup()
alpha/PCI: factor out pcibios_setup()
PCI: pull pcibios_setup() up into core -
Commit cc2893b6 (PCI: Ensure we re-enable devices on resume)
addressed the problem with USB not being powered after resume on
recent Lenovo machines, but it did that in a suboptimal way.
Namely, it should have changed the relevant code paths only,
which are pci_pm_resume_noirq() and pci_pm_restore_noirq() supposed
to restore the device's power and standard configuration registers
after system resume from suspend or hibernation. Instead, however,
it modified pci_set_power_state() which is executed in several
other situations too. That resulted in some undesirable effects,
like attempting to change a device's power state in the same way
multiple times in a row (up to as many as 4 times in a row in the
snd_hda_intel driver).Fix the bug addressed by commit cc2893b6 in an alternative way,
by forcibly powering up all devices in pci_pm_default_resume_early(),
which is called by pci_pm_resume_noirq() and pci_pm_restore_noirq()
to restore the device's power and standard configuration registers,
and modifying pci_pm_runtime_resume() to avoid the forcible power-up
if not necessary. Then, revert the changes made by commit cc2893b6
to make the confusion introduced by it go away.Acked-by: Matthew Garrett
Signed-off-by: Rafael J. Wysocki
Signed-off-by: Bjorn Helgaas
26 Jun, 2012
1 commit
-
Currently, all of the architectures implement their own pcibios_setup()
routine. Most of the implementations do nothing so this patch introduces
a generic (__weak) routine in the core that can be used by all
architectures as a default. If necessary, it can be overridden by
architecture-specific code.Signed-off-by: Myron Stowe
Signed-off-by: Bjorn Helgaas
24 Jun, 2012
1 commit
-
* topic/huang-d3cold-v7:
PCI/PM: add PCIe runtime D3cold support
PCI: do not call pci_set_power_state with PCI_D3cold
PCI/PM: add runtime PM support to PCIe port
ACPI/PM: specify lowest allowed state for device sleep state