03 May, 2007
2 commits
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This patch is based on Rusty's recent cleanup of the EFLAGS-related
macros; it extends the same kind of cleanup to control registers and
MSRs.It also unifies these between i386 and x86-64; at least with regards
to MSRs, the two had definitely gotten out of sync.Signed-off-by: H. Peter Anvin
Signed-off-by: Andi Kleen -
paravirt.c used to implement native versions of all low-level
functions. Far cleaner is to have the native versions exposed in the
headers and as inline native_XXX, and if !CONFIG_PARAVIRT, then simply
#define XXX native_XXX.There are several nice side effects:
1) write_dt_entry() now takes the correct "struct Xgt_desc_struct *"
not "void *".2) load_TLS is reintroduced to the for loop, not manually unrolled
with a #error in case the bounds ever change.3) Macros become inlines, with type checking.
4) Access to the native versions is trivial for KVM, lguest, Xen and
others who might want it.Signed-off-by: Jeremy Fitzhardinge
Signed-off-by: Rusty Russell
Signed-off-by: Andi Kleen
Cc: Andi Kleen
Cc: Avi Kivity
Signed-off-by: Andrew Morton
02 Apr, 2007
1 commit
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AMD dual core laptops with C1E do not run the APIC timer correctly
when they go idle. Previously the code assumed this only happened
on C2 or deeper. But not all of these systems report support C2.Use a AMD supplied snippet to detect C1E being enabled and then disable
local apic timer use.This supercedes an earlier workaround using DMI detection of specific systems.
Thanks to Mark Langsdorf for the detection snippet.
Signed-off-by: Andi Kleen
27 Feb, 2007
1 commit
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* master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq:
[CPUFREQ] constify some data tables.
[CPUFREQ] constify cpufreq_driver where possible.
{rd,wr}msr_on_cpu SMP=n optimization
[CPUFREQ] cpufreq_ondemand.c: don't use _WORK_NAR
rdmsr_on_cpu, wrmsr_on_cpu
[CPUFREQ] Revert default on deprecated config X86_SPEEDSTEP_CENTRINO_ACPI
21 Feb, 2007
2 commits
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Let's save a few bytes in the CONFIG_SMP=n case.
Signed-off-by: Adrian Bunk
Signed-off-by: Dave Jones -
There was OpenVZ specific bug rendering some cpufreq drivers unusable on SMP.
In short, when cpufreq code thinks it confined itself to needed cpu by means
of set_cpus_allowed() to execute rdmsr, some "virtual cpu" feature can migrate
process to anywhere. This triggers bugons and does wrong things in general.This got fixed by introducing rdmsr_on_cpu and wrmsr_on_cpu executing rdmsr
and wrmsr on given physical cpu by means of smp_call_function_single().Dave Jones mentioned cpufreq might be not only user of rdmsr_on_cpu() and
wrmsr_on_cpu(), so I'm putting them into arch/{i386,x86_64}/lib/ .Signed-off-by: Alexey Dobriyan
Cc: Andi Kleen
Signed-off-by: Andrew Morton
Signed-off-by: Dave Jones
17 Feb, 2007
1 commit
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The Geode can safely use the TSC for highres, since:
1) Does not support frequency scaling,
2) The TSC _does_ count when the CPU is halted. Furthermore, the Geode
supports a mode called "suspension on halt", where Suspend mode (which
interacts with the power management states) is entered. TSC counting
during suspend mode is controlled by bit 8 of the Bus Controller
Configuration Register #0 (thanks Tom!).3) no SMP :)
Check if "RTSC counts during suspension" and remove the requirement for
verification, so the clocksource code can safely select it as an timesource
for the highres timers subsystem.Signed-off-by: Marcelo Tosatti
Signed-off-by: Thomas Gleixner
Signed-off-by: Ingo Molnar
Cc: john stultz
Cc: Roman Zippel
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
13 Dec, 2006
1 commit
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Conflicts:
drivers/cpufreq/cpufreq.c
07 Dec, 2006
2 commits
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Create a paravirt.h header for all the critical operations which need to be
replaced with hypervisor calls, and include that instead of defining native
operations, when CONFIG_PARAVIRT.This patch does the dumbest possible replacement of paravirtualized
instructions: calls through a "paravirt_ops" structure. Currently these are
function implementations of native hardware: hypervisors will override the ops
structure with their own variants.All the pv-ops functions are declared "fastcall" so that a specific
register-based ABI is used, to make inlining assember easier.And:
+From: Andy Whitcroft
The paravirt ops introduce a 'weak' attribute onto memory_setup().
Code ordering leads to the following warnings on x86:arch/i386/kernel/setup.c:651: warning: weak declaration of
`memory_setup' after first use results in unspecified behaviorMove memory_setup() to avoid this.
Signed-off-by: Rusty Russell
Signed-off-by: Chris Wright
Signed-off-by: Andi Kleen
Cc: Jeremy Fitzhardinge
Cc: Zachary Amsden
Signed-off-by: Andrew Morton
Signed-off-by: Andy Whitcroft -
- add Intel Precise-Event Based sampling (PEBS) related MSR
- add Intel Data Save (DS) Area related MSR
- add Intel Core microarchitecure performance counter MSRsSigned-off-by: stephane eranian
Signed-off-by: Andi Kleen
07 Nov, 2006
1 commit
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Several more Intel CPUs are now capable using the p4-clockmod cpufreq
driver. As it is of limited use most of the time, print a big bold warning
if a better cpufreq driver might be available.Signed-off-by: Dominik Brodowski
Signed-off-by: Dave Jones
16 Oct, 2006
1 commit
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Enable ondemand governor and acpi-cpufreq to use IA32_APERF and IA32_MPERF MSR
to get active frequency feedback for the last sampling interval. This will
make ondemand take right frequency decisions when hardware coordination of
frequency is going on.Without APERF/MPERF, ondemand can take wrong decision at times due
to underlying hardware coordination or TM2.
Example:
* CPU 0 and CPU 1 are hardware cooridnated.
* CPU 1 running at highest frequency.
* CPU 0 was running at highest freq. Now ondemand reduces it to
some intermediate frequency based on utilization.
* Due to underlying hardware coordination with other CPU 1, CPU 0 continues to
run at highest frequency (as long as other CPU is at highest).
* When ondemand samples CPU 0 again next time, without actual frequency
feedback from APERF/MPERF, it will think that previous frequency change
was successful and can go to wrong target frequency. This is because it
thinks that utilization it has got this sampling interval is when running at
intermediate frequency, rather than actual highest frequency.More information about IA32_APERF IA32_MPERF MSR:
Refer to IA-32 Intel® Architecture Software Developer's Manual at
http://developer.intel.comSigned-off-by: Venkatesh Pallipadi
Signed-off-by: Dave Jones
05 Sep, 2005
1 commit
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Some more assembler cleanups I noticed along the way.
Signed-off-by: Zachary Amsden
Cc: "H. Peter Anvin"
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
17 Apr, 2005
1 commit
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Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.Let it rip!
