03 Oct, 2011

6 commits

  • libsas handles:
    1/ limiting ata scanning to lun0
    2/ changes to /sys/block//device/queue_depth for ata devices

    libata handles turning off ncq globally via kernel command line
    (libata.force=noncq) or sysfs (echo 1 >
    /sys/block//device/queue_depth). A lldd specific compile option is
    not necessary.

    Cc: Jack Wang
    Signed-off-by: Dan Williams
    Signed-off-by: James Bottomley

    Dan Williams
     
  • libsas now handles:
    1/ limiting ata scanning to lun0
    2/ maximizing the queue_depth of sas devices (up to 256, mvsas only
    supports 64)
    3/ changes to /sys/block//device/queue_depth for ata devices

    Acked-by: Xiangliang Yu
    Signed-off-by: Dan Williams
    Signed-off-by: James Bottomley

    Dan Williams
     
  • The queue-depth for libsas-attached devices initializes to 32 and can
    only be increased manually via sysfs to a max of 64, while mpt2sas
    attached devices initialize to 254 and dynamically float via the
    midlayer ->change_queue_depth interface.

    No performance regression was observed with this change on the isci
    driver.

    Tested-by: Dave Jiang
    Signed-off-by: Dan Williams
    Signed-off-by: James Bottomley

    Dan Williams
     
  • Pass queue_depth change requests to libata, and prevent queue_type
    changes for ATA devices.

    Otherwise:
    1/ we do not honor the libata specific restrictions on the queue depth
    2/ libsas drivers that do not set sdev->tagged_supported are unable to
    change the queue_depth of ata devices via sysfs

    Signed-off-by: Dan Williams
    Acked-by: Jeff Garzik
    Signed-off-by: James Bottomley

    Dan Williams
     
  • Currently mvsas and pm8001 have custom ->slave_alloc implementations to
    achieve this. Uplevel it for all libsas drivers as isci encounters problems
    with atapi devices when scanning past lun0.

    Just do what Darrick suggested [1], and limit the scan for ata devices.

    [1] http://marc.info/?l=linux-scsi&m=116604101119861&w=2

    Signed-off-by: Dan Williams
    Signed-off-by: James Bottomley

    Dan Williams
     
  • Allow expander table-to-table attachments for
    expanders that support it.

    Signed-off-by: Luben Tuikov
    Signed-off-by: James Bottomley

    Luben Tuikov
     

22 Sep, 2011

14 commits

  • When the ipr driver decides to dump the adapter, it changes the
    sdt_state to GET_DUMP, then prepares the adapter so that the dump
    can be read. However, if the ipr worker thread wakes up for some
    reason before the driver has put the adapter in a state where it
    can succesfully dump the adapter, the driver will start dumping
    the adapter too early, which can potentially trigger a BUG check
    in the pci config blocking API. Fix this by adding a new
    sdt_state to differentiate between the ipr driver wanting to dump
    the adapter in the near future and wanting to dump the adapter now.

    Signed-off-by: Brian King
    Signed-off-by: James Bottomley

    Brian King
     
  • Signed-off-by: Vijay Chauhan
    Reviewed-by: Bob Stankey
    Reviewed-by: Babu Moger
    Acked-by: Chandra Seetharaman
    Signed-off-by: James Bottomley

    Chauhan, Vijay
     
  • Signed-off-by: Bhanu Prakash Gollapudi
    Signed-off-by: James Bottomley

    Bhanu Prakash Gollapudi
     
  • Gracefully handle bnx2fc_map_sg failure, so that queuecommand returns host busy
    and SCSI-ml can retry the IO.

    Signed-off-by: Bhanu Prakash Gollapudi
    Signed-off-by: James Bottomley

    Bhanu Prakash Gollapudi
     
  • scsi_dma_map doesn't work for NPIV since vport dev isn't fully initialized.

    For more details: http://marc.info/?l=linux-scsi&m=118312448030633&w=2 and
    commit - c59fd9ebc46da8d48b76955d4d48e3597f8c8726.

    Signed-off-by: Nithin Sujir
    Signed-off-by: Bhanu Prakash Gollapudi
    Signed-off-by: James Bottomley

    Bhanu Prakash Gollapudi
     
  • When READ_16 command is issued, the setting of SILI Bit in CDB is confirmed
    and if SILI bit is off, the processing of relavent Errata is executed.

    Added code for checking SILI bit for READ_16 as described in "SSC-4".

    Signed-off-by: Nagalakshmi Nandigama
    Signed-off-by: James Bottomley

    nagalakshmi.nandigama@lsi.com
     
  • Sizeof a pointer-typed expression returns the size of the pointer, not that
    of the pointed data.

    The semantic patch that fixes this problem is as follows:
    (http://coccinelle.lip6.fr/)

    //
    @@
    expression *e;
    type T;
    identifier f;
    @@

    f(...,(T)e,...,
    -sizeof(e)
    +sizeof(*e)
    ,...)
    //

    Signed-off-by: Julia Lawall
    Signed-off-by: James Bottomley

    Julia Lawall
     
  • Mutual exclusion is redundant here because all the paths in the call graph
    leading to esp_driver_ops.send_dma_cmd() happen under spin_lock_irqsave/
    spin_lock_irqrestore. Remove it.

    Tested on a Mac Quadra 660av and a Mac LC 630.

    Signed-off-by: Finn Thain
    Signed-off-by: James Bottomley

    Finn Thain
     
  • Signed-off-by: Nagalakshmi Nandigama
    Signed-off-by: James Bottomley

    nagalakshmi.nandigama@lsi.com
     
  • Support added for controllers capable of multi reply queues.

    The following are the modifications to the driver to support NUMA.

    1) Create the new structure adapter_reply_queue to contain the reply queue
    info for every msix vector. This object will contain a
    reply_post_host_index, reply_post_free for each instance, msix_index, among
    other parameters. We will track all the reply queues on a link list called
    ioc->reply_queue_list. Each reply queue is aligned with each IRQ, and is
    passed to the interrupt via the bus_id parameter.

    (2) The driver will figure out the msix_vector_count from the PCIe MSIX
    capabilities register instead of the IOC Facts->MaxMSIxVectors. This is
    because the firmware is not filling in this field until the driver has
    already registered MSIX support.

    (3) If the ioc_facts reports that the controller is MSIX compatible in the
    capabilities, then the driver will request for multiple irqs. This count
    is calculated based on the minimum between the online cpus available and
    the ioc->msix_vector_count. This count is reported to firmware in the
    ioc_init request.

    (4) New routines were added _base_free_irq and _base_request_irq, so
    registering and freeing msix vectors were done thru simple function API.

    (5) The new routine _base_assign_reply_queues was added to align the msix
    indexes across cpus. This will initialize the array called
    ioc->cpu_msix_table. This array is looked up on every MPI request so the
    MSIxIndex is set appropriately.

    (6) A new shost sysfs attribute was added to report the reply_queue_count.

    (7) User needs to set the affinity cpu mask, so the interrupts occur on the
    same cpu that sent the original request.

    Signed-off-by: Nagalakshmi Nandigama
    Signed-off-by: James Bottomley

    nagalakshmi.nandigama@lsi.com
     
  • This patch adds couple more Vendor/Product IDs for RDAC.. There are no
    functional changes.

    Signed-off-by: Babu Moger
    Signed-off-by: James Bottomley

    Moger, Babu
     
  • Basic support to initialize the gpio unit, accept an incomming
    SAS_GPIO_REG_TX_GP bitstream, and translate it to the ODx.n fields in
    the hardware registers. If register indexes outside the supported range
    are specified in the SMP frame we simply accept the write and return how
    many registers (SFF-8485) were written (libsas reports this as residue
    in the request).

    Signed-off-by: Dan Williams
    Signed-off-by: James Bottomley

    Dan Williams
     
  • output_data_select registers are off by one u32

    delete the macros we will never use.

    Reported-by: Artur Wojcik
    Signed-off-by: Dan Williams
    Signed-off-by: James Bottomley

    Dan Williams
     
  • Add SFF-8485 v0.7 / SAS-1 smp-write-gpio register support to libsas.
    Defer SAS-2 support unless/until it defines an sgpio interface.

    Minimum implementation needed to get the lights blinking.
    try_test_sas_gpio_gp_bit() provides a common method to parse the
    incoming write data (raw bitstream), and the to_sas_gpio_gp_bit() helper
    routine can be used as a basis for the set/clear operations for the
    'read' implementation. Host implementations parse as many bits
    (ODx.[012]) as are locally supported and report the number of registers
    successfully written. If the submitted data overruns the internal
    number of registers available report the write as a success with the
    number of bytes remaining reported in ->resid_len.

    Example (assuming an active backplane) set the "identify" pattern for
    the first 21 devices:

    smp_write_gpio --count=2 --data=92,49,24,92,24,92,49,24 -t 4 --index=1 /dev/bsg/sas_hostX

    Signed-off-by: Dan Williams
    Signed-off-by: James Bottomley

    Dan Williams
     

18 Sep, 2011

3 commits


17 Sep, 2011

6 commits


31 Aug, 2011

10 commits


29 Aug, 2011

1 commit