02 Jul, 2018

1 commit


24 May, 2018

1 commit

  • The new challenge is to remove VLAs from the kernel
    (see https://lkml.org/lkml/2018/3/7/621)

    The number of GPIOs on the supported chips is fairly small
    so stack allocate to a known upper bound and spit out a warning
    if any new chips have more gpios.

    Signed-off-by: Laura Abbott
    Reviewed-by: Phil Reid
    Reviewed-by: Kees Cook
    Signed-off-by: Linus Walleij

    Laura Abbott
     

17 Jan, 2018

5 commits

  • The local variable "irq" will eventually be set to an appropriate value
    a bit later. Thus omit the explicit initialisation at the beginning.

    Signed-off-by: Markus Elfring
    Signed-off-by: Linus Walleij

    Markus Elfring
     
  • Move the assignment for the local variable "irq" so that its setting
    will only be performed directly before it is checked by this function.

    Signed-off-by: Markus Elfring
    Signed-off-by: Linus Walleij

    Markus Elfring
     
  • Replace the specification of a data structure by a pointer dereference
    as the parameter for the operator "sizeof" to make the corresponding size
    determination a bit safer according to the Linux coding style convention.

    This issue was detected by using the Coccinelle software.

    Signed-off-by: Markus Elfring
    Signed-off-by: Linus Walleij

    Markus Elfring
     
  • A single character (line break) should be put into a sequence.
    Thus use the corresponding function "seq_putc".

    This issue was detected by using the Coccinelle software.

    Signed-off-by: Markus Elfring
    Signed-off-by: Linus Walleij

    Markus Elfring
     
  • Move the workaround from stmpe_gpio_irq_unmask() which is executed
    in atomic context to stmpe_gpio_irq_sync_unlock() which is not.

    It fixes the following issue:

    [ 1.500000] BUG: scheduling while atomic: swapper/1/0x00000002
    [ 1.500000] CPU: 0 PID: 1 Comm: swapper Not tainted 4.15.0-rc2-00020-gbd4301f-dirty #28
    [ 1.520000] Hardware name: STM32 (Device Tree Support)
    [ 1.520000] [] (unwind_backtrace) from [] (show_stack+0xb/0xc)
    [ 1.530000] [] (show_stack) from [] (__schedule_bug+0x39/0x58)
    [ 1.530000] [] (__schedule_bug) from [] (__schedule+0x23/0x2b2)
    [ 1.550000] [] (__schedule) from [] (schedule+0x57/0x64)
    [ 1.550000] [] (schedule) from [] (schedule_timeout+0x137/0x164)
    [ 1.550000] [] (schedule_timeout) from [] (wait_for_common+0x8d/0xfc)
    [ 1.570000] [] (wait_for_common) from [] (stm32f4_i2c_xfer+0xe9/0xfe)
    [ 1.580000] [] (stm32f4_i2c_xfer) from [] (__i2c_transfer+0x111/0x148)
    [ 1.590000] [] (__i2c_transfer) from [] (i2c_transfer+0x53/0x70)
    [ 1.590000] [] (i2c_transfer) from [] (i2c_smbus_xfer+0x12f/0x36e)
    [ 1.600000] [] (i2c_smbus_xfer) from [] (i2c_smbus_read_byte_data+0x1f/0x2a)
    [ 1.610000] [] (i2c_smbus_read_byte_data) from [] (__stmpe_reg_read+0xd/0x24)
    [ 1.620000] [] (__stmpe_reg_read) from [] (stmpe_reg_read+0x19/0x24)
    [ 1.630000] [] (stmpe_reg_read) from [] (unmask_irq+0x17/0x22)
    [ 1.640000] [] (unmask_irq) from [] (irq_startup+0x6f/0x78)
    [ 1.650000] [] (irq_startup) from [] (__setup_irq+0x319/0x47c)
    [ 1.650000] [] (__setup_irq) from [] (request_threaded_irq+0x6b/0xe8)
    [ 1.660000] [] (request_threaded_irq) from [] (devm_request_threaded_irq+0x3b/0x6a)
    [ 1.670000] [] (devm_request_threaded_irq) from [] (mmc_gpiod_request_cd_irq+0x49/0x8a)
    [ 1.680000] [] (mmc_gpiod_request_cd_irq) from [] (mmc_start_host+0x49/0x60)
    [ 1.690000] [] (mmc_start_host) from [] (mmc_add_host+0x3b/0x54)
    [ 1.700000] [] (mmc_add_host) from [] (mmci_probe+0x4d1/0x60c)
    [ 1.710000] [] (mmci_probe) from [] (amba_probe+0x7b/0xbe)
    [ 1.720000] [] (amba_probe) from [] (driver_probe_device+0x169/0x1f8)
    [ 1.730000] [] (driver_probe_device) from [] (__driver_attach+0x43/0x5c)
    [ 1.740000] [] (__driver_attach) from [] (bus_for_each_dev+0x3d/0x46)
    [ 1.740000] [] (bus_for_each_dev) from [] (bus_add_driver+0xcd/0x124)
    [ 1.740000] [] (bus_add_driver) from [] (driver_register+0x4d/0x7a)
    [ 1.760000] [] (driver_register) from [] (do_one_initcall+0xbd/0xe8)
    [ 1.770000] [] (do_one_initcall) from [] (kernel_init_freeable+0xfb/0x134)
    [ 1.780000] [] (kernel_init_freeable) from [] (kernel_init+0x7/0x9c)
    [ 1.790000] [] (kernel_init) from [] (ret_from_fork+0x11/0x2c)

    Cc: stable@vger.kernel.org
    Signed-off-by: Alexandre TORGUE
    Signed-off-by: Patrice Chotard
    Signed-off-by: Linus Walleij

    Patrice Chotard
     

03 Dec, 2017

1 commit

  • Don't populate the read-only arrays edge_det_values, rise_values and
    fall_values on the stack but instead make them static and constify them.
    Makes the object code smaller by over 240 bytes:

    Before:
    text data bss dec hex filename
    9525 2520 192 12237 2fcd drivers/gpio/gpio-stmpe.o

    After:
    text data bss dec hex filename
    9025 2776 192 11993 2ed9 drivers/gpio/gpio-stmpe.o

    (gcc version 7.2.0 x86_64)

    Signed-off-by: Colin Ian King
    Signed-off-by: Linus Walleij

    Colin Ian King
     

08 Nov, 2017

2 commits


20 Oct, 2017

1 commit


13 Dec, 2016

1 commit

  • Pull GPIO updates from Luinus Walleij:
    "Bulk GPIO changes for the v4.10 kernel cycle:

    Core changes:

    - Simplify threaded interrupt handling: instead of passing numbed
    parameters to gpiochip_irqchip_add_chained() we create a new call:
    gpiochip_irqchip_add_nested() so the two types are clearly
    semantically different. Also make sure that all nested chips call
    gpiochip_set_nested_irqchip() which is necessary for IRQ resend to
    work properly if it happens.

    - Return error on seek operations for the chardev.

    - Clamp values set as part of gpio[d]_direction_output() so that
    anything != 0 will be send down to the driver as "1" not the value
    passed in.

    - ACPI can now support naming of GPIO lines, hogs and holes in the
    GPIO lists.

    New drivers:

    - The SX150x driver was deemed unfit for the GPIO subsystem and was
    moved over to a combined GPIO+pinctrl driver in the pinctrl
    subsystem.

    New features:

    - Various cleanups to various drivers"

    * tag 'gpio-v4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (49 commits)
    gpio: merrifield: Implement gpio_get_direction callback
    gpio: merrifield: Add support for hardware debouncer
    gpio: chardev: Return error for seek operations
    gpio: arizona: Tidy up probe error path
    gpio: arizona: Remove pointless set of platform drvdata
    gpio: pl061: delete platform data handling
    gpio: pl061: move platform data into driver
    gpio: pl061: rename variable from chip to pl061
    gpio: pl061: rename state container struct
    gpio: pl061: use local state for parent IRQ storage
    gpio: set explicit nesting on drivers
    gpio: simplify adding threaded interrupts
    gpio: vf610: use builtin_platform_driver
    gpio: axp209: use correct register for GPIO input status
    gpio: stmpe: fix interrupt handling bug
    gpio: em: depnd on ARCH_SHMOBILE
    gpio: zx: depend on ARCH_ZX
    gpio: x86: update config dependencies for x86 specific hardware
    gpio: mb86s7x: use builtin_platform_driver
    gpio: etraxfs: use builtin_platform_driver
    ...

    Linus Torvalds
     

07 Dec, 2016

1 commit


25 Nov, 2016

1 commit

  • This tries to simplify the use of CONFIG_GPIOLIB_IRQCHIP when
    using threaded interrupts: add a new call
    gpiochip_irqchip_add_nested() to indicate that we're dealing
    with a nested rather than a chained irqchip, then create a
    separate gpiochip_set_nested_irqchip() to mirror
    the gpiochip_set_chained_irqchip() call to connect the
    parent and child interrupts.

    In the nested case gpiochip_set_nested_irqchip() does nothing
    more than call irq_set_parent() on each valid child interrupt,
    which has little semantic effect in the kernel, but this is
    probably still formally correct.

    Update all drivers using nested interrupts to use
    gpiochip_irqchip_add_nested() so we can now see clearly
    which these users are.

    The DLN2 driver can drop its specific hack with
    .irq_not_threaded as we now recognize whether a chip is
    threaded or not from its use of gpiochip_irqchip_add_nested()
    signature rather than from inspecting .can_sleep.

    We rename the .irq_parent to .irq_chained_parent since this
    parent IRQ is only really kept around for the chained
    interrupt handlers.

    Cc: Lars Poeschel
    Cc: Octavian Purdila
    Cc: Daniel Baluta
    Cc: Bin Gao
    Cc: Mika Westerberg
    Cc: Ajay Thomas
    Cc: Semen Protsenko
    Cc: Alexander Stein
    Cc: Phil Reid
    Cc: Bartosz Golaszewski
    Cc: Patrice Chotard
    Signed-off-by: Linus Walleij

    Linus Walleij
     

24 Nov, 2016

1 commit

  • commit 43db289d00c6 ("gpio: stmpe: Rework registers access")
    reworked the STMPE register access so as to use
    [STMPE_IDX_*_LSB + i] to access the 8bit register for a
    certain bank, assuming the CSB and MSB will follow after
    the enumerator. For this to work the index needs to go from
    (size-1) to 0 not 0 to (size-1).

    However for the GPIO IRQ handler, the status registers we read
    register MSB + 3 bytes ahead for the 24 bit GPIOs and index
    registers from MSB upwards and run an index i over the
    registers UNLESS we are STMPE1600.

    This is not working when we get to clearing the interrupt
    EDGE status register STMPE_IDX_GPEDR_[LCM]SB: it is indexed
    like all other registers [STMPE_IDX_*_LSB + i] but in this
    loop we index from 0 to get the right bank index for the
    calculations, and we need to just add i to the MSB.

    Before this, interrupts on the STMPE2401 were broken, this
    patch fixes it so it works again.

    Cc: stable@vger.kernel.org
    Cc: Patrice Chotard
    Fixes: 43db289d00c6 ("gpio: stmpe: Rework registers access")
    Signed-off-by: Linus Walleij

    Linus Walleij
     

20 Oct, 2016

1 commit

  • && was obviously intended here.

    Fixes: 6936e1f88d23 ('gpio: stmpe: Write int status register only when needed')
    Signed-off-by: Dan Carpenter
    Acked-by: Patrice Chotard
    Signed-off-by: Linus Walleij

    Dan Carpenter
     

01 Oct, 2016

2 commits


13 Sep, 2016

1 commit

  • These structures are only used to copy into other structures, so declare
    them as const.

    The semantic patch that makes this change is as follows:
    (http://coccinelle.lip6.fr/)

    //
    @r disable optional_qualifier@
    identifier i;
    position p;
    @@
    static struct gpio_chip i@p = { ... };

    @ok@
    identifier r.i;
    expression e;
    position p;
    @@
    e = i@p;

    @bad@
    position p != {r.p,ok.p};
    identifier r.i;
    struct gpio_chip e;
    @@
    e@i@p

    @depends on !bad disable optional_qualifier@
    identifier r.i;
    @@
    static
    +const
    struct gpio_chip i = { ... };
    //

    Signed-off-by: Julia Lawall
    Acked-by: Joachim Eastwood
    Signed-off-by: Linus Walleij

    Julia Lawall
     

10 Aug, 2016

4 commits

  • The particularities of this variant are:
    - GPIO_XXX_LSB and GPIO_XXX_MSB memory locations are inverted compared
    to other variants.
    - There is no Edge detection, Rising Edge and Falling Edge registers.
    - IRQ flags are cleared when read, no need to write in Status register.

    Signed-off-by: Amelie DELAUNAY
    Signed-off-by: Patrice Chotard
    Reviewed-by: Linus Walleij
    Signed-off-by: Lee Jones

    Patrice Chotard
     
  • This update allows to use registers map as following :
    regs[reg_index + offset] instead of
    regs[reg_index] + offset

    This makes code clearer and will facilitate the addition of STMPE1600
    on which LSB and MSB registers are respectively located at addr and addr + 1.
    Despite for all others STMPE variant, LSB and MSB registers are respectively
    located in reverse order at addr + 1 and addr.

    For variant which have 3 registers's bank, we use LSB,CSB and MSB indexes
    which contains respectively LSB (or LOW), CSB (or MID) and MSB (or HIGH)
    register addresses (STMPE1801/STMPE24xx).
    For variant which have 2 registers's bank, we use LSB and CSB indexes only.
    In this case the CSB index contains the MSB regs address (STMPE 1601).

    Signed-off-by: Patrice Chotard
    Reviewed-by: Linus Walleij
    Signed-off-by: Lee Jones

    Patrice Chotard
     
  • On STMPE801/1801 datasheets, it's mentionned writing
    in interrupt status register has no effect, bits are
    cleared when reading.

    Signed-off-by: Amelie DELAUNAY
    Signed-off-by: Patrice Chotard
    Reviewed-by: Linus Walleij
    Signed-off-by: Lee Jones

    Patrice Chotard
     
  • By cross-checking STMPE 610/801/811/1601/2401/2403 datasheets,
    it appears that edge detection and rising/falling edge detection
    is not supported by all STMPE variant:

    GPIO GPIO
    Edge detection rising/falling
    edge detection
    610 | X | X |
    801 | | |
    811 | X | X |
    1600 | | |
    1601 | X | X |
    1801 | | X |
    2401 | X | X |
    2403 | X | X |

    Rework stmpe_dbg_show_one() and stmpe_gpio_irq to correctly
    take these cases into account.

    Signed-off-by: Patrice Chotard
    Reviewed-by: Linus Walleij
    Signed-off-by: Lee Jones

    Patrice Chotard
     

07 Jun, 2016

2 commits


11 May, 2016

1 commit

  • The Kconfig currently controlling compilation of this code is:

    drivers/gpio/Kconfig:config GPIO_STMPE
    drivers/gpio/Kconfig: bool "STMPE GPIOs"

    ...meaning that it currently is not being built as a module by anyone.

    Lets remove the modular code that is essentially orphaned, so that
    when reading the driver there is no doubt it is builtin-only.

    We explicitly disallow a driver unbind, since that doesn't have a
    sensible use case anyway, and it allows us to drop the ".remove"
    code for non-modular drivers.

    Curiously, this driver was using subsys_initcall since day one, so
    we don't have the "normal" module_init replacement in this change
    like we've done in other similar driver updates.

    We also delete the MODULE_LICENSE tag etc. since all that information
    is already contained at the top of the file in the comments.

    Cc: Linus Walleij
    Cc: Alexandre Courbot
    Cc: Rabin Vincent
    Cc: linux-gpio@vger.kernel.org
    Signed-off-by: Paul Gortmaker
    Signed-off-by: Linus Walleij

    Paul Gortmaker
     

05 Jan, 2016

1 commit


19 Nov, 2015

1 commit

  • The name .dev in a struct is normally reserved for a struct device
    that is let us say a superclass to the thing described by the struct.
    struct gpio_chip stands out by confusingly using a struct device *dev
    to point to the parent device (such as a platform_device) that
    represents the hardware. As we want to give gpio_chip:s real devices,
    this is not working. We need to rename this member to parent.

    This was done by two coccinelle scripts, I guess it is possible to
    combine them into one, but I don't know such stuff. They look like
    this:

    @@
    struct gpio_chip *var;
    @@
    -var->dev
    +var->parent

    and:

    @@
    struct gpio_chip var;
    @@
    -var.dev
    +var.parent

    and:

    @@
    struct bgpio_chip *var;
    @@
    -var->gc.dev
    +var->gc.parent

    Plus a few instances of bgpio that I couldn't figure out how
    to teach Coccinelle to rewrite.

    This patch hits all over the place, but I *strongly* prefer this
    solution to any piecemal approaches that just exercise patch
    mechanics all over the place. It mainly hits drivers/gpio and
    drivers/pinctrl which is my own backyard anyway.

    Cc: Haavard Skinnemoen
    Cc: Rafał Miłecki
    Cc: Richard Purdie
    Cc: Mauro Carvalho Chehab
    Cc: Alek Du
    Cc: Jaroslav Kysela
    Cc: Takashi Iwai
    Acked-by: Dmitry Torokhov
    Acked-by: Greg Kroah-Hartman
    Acked-by: Lee Jones
    Acked-by: Jiri Kosina
    Acked-by: Hans-Christian Egtvedt
    Acked-by: Jacek Anaszewski
    Signed-off-by: Linus Walleij

    Linus Walleij
     

20 Jan, 2015

1 commit


02 Oct, 2014

2 commits

  • To troubleshoot the STMPE GPIO driver, some more detailed
    debug information giving the exact info on how each pin is
    used will be helpful.

    Signed-off-by: Linus Walleij

    Linus Walleij
     
  • The STMPE driver assumes that the passed in IRQ type is
    for rising or falling IRQs, not both, even though the
    hardware actually supports this perfectly well. Likewise
    the check for level IRQs is done against just high or low
    level types, not for the case where it is combined with
    other IRQs.

    Signed-off-by: Linus Walleij

    Linus Walleij
     

26 Sep, 2014

1 commit

  • To unify how we connect cascaded IRQ chips to parent IRQs, if
    NULL us passed as handler to the gpiochip_set_chained_irqchip()
    function, assume the chips is nested rather than chained, and
    we still get the parent set up correctly by way of this function
    call.

    Alter the drivers for tc3589x and stmpe to use this to set up
    their chained handlers as a demonstration of the usage.

    Signed-off-by: Linus Walleij

    Linus Walleij
     

22 Jul, 2014

1 commit


19 Jun, 2014

1 commit


23 May, 2014

1 commit


04 Dec, 2013

1 commit

  • This switches the two members of struct gpio_chip that were
    defined as unsigned foo:1 to bool, because that is indeed what
    they are. Switch all users in the gpio and pinctrl subsystems
    to assign these values with true/false instead of 0/1. The
    users outside these subsystems will survive since true/false
    is 1/0, atleast we set some kind of more strict typing example.

    Signed-off-by: Linus Walleij

    Linus Walleij
     

16 Oct, 2013

1 commit

  • Rename the argument "virq" to just "irq", this IRQ isn't any
    more "virtual" than any other Linux IRQ number, we use "hwirq"
    for the actual hw-numbers, "virq" is just bogus.

    When doing this I see that the hwirq argument is used
    for mapping rather than the Linux IRQ in the map function.
    This doesn't look right. Use the Linux IRQ instead.

    I cannot test this patch so I don't know if the mapping change
    is correct, however since absolutely every other driver does
    it the other way around this doesn't look sound at all. Please
    help out with review.

    Cc: Vipul Kumar Samar
    Cc: Lee Jones
    Cc: Gabriel Fernandez
    Cc: Jean-Nicolas Graux
    Signed-off-by: Linus Walleij

    Linus Walleij
     

31 May, 2013

2 commits


27 Mar, 2013

1 commit