20 Jun, 2017

1 commit


14 Jun, 2017

2 commits


01 Feb, 2017

1 commit

  • Mediatek SPI DMA only works when tx and rx buffer addresses are 4-byte
    aligned.

    Unaligned DMA transactions appeared to work previously, since we the
    spi core was incorrectly using the spi_master device for dma, which
    had a 0 dma_mask, and therefore the swiotlb dma map operations were
    falling back to using bounce buffers. Since each DMA transaction would
    use its own buffer, the mapped starting address of each transaction was
    always aligned. When doing real DMA, the mapped address will share the
    alignment of the raw tx/rx buffer provided by the SPI user, which may or
    may not be aligned.

    If a buffer is not aligned, we cannot use DMA, and must use FIFO based
    transaction instead.

    So, this patch implements a scheme that allows using the FIFO for
    arbitrary length transactions (larger than the 32-byte FIFO size) by
    reloading the FIFO in the interrupt handler.

    Signed-off-by: Daniel Kurtz
    Cc: Leilk Liu
    Signed-off-by: Mark Brown

    Daniel Kurtz
     

28 Jul, 2016

1 commit


12 Jan, 2016

2 commits


01 Jan, 2016

2 commits


31 Dec, 2015

1 commit

  • In the case where transfer length is not a multiple of 4, KASAN
    reports 2 out-of-bounds memory accesses:
    - mtk_spi_interrupt: ioread32_rep writes past the end of
    trans->rx_buf.
    - mtk_spi_fifo_transfer: iowrite32_rep reads past the end of
    xfer->tx_buf.

    Fix this by using memcpy on the remainder of the bytes.

    Signed-off-by: Nicolas Boichat
    Signed-off-by: Mark Brown

    Nicolas Boichat
     

25 Nov, 2015

2 commits


21 Nov, 2015

1 commit


17 Nov, 2015

1 commit

  • When only one device is present, it is not necessary to specify
    cs_gpios, as the CS line can be controlled by the hardware
    module.

    Without this patch, older device tree bindings used before
    37457607 "spi: mediatek: mt8173 spi multiple devices support"
    would cause a panic on boot. This fixes the crash, and
    re-introduces backward compatibility.

    Signed-off-by: Nicolas Boichat
    Acked-by: Leilk Liu
    Signed-off-by: Mark Brown

    Nicolas Boichat
     

27 Oct, 2015

3 commits


23 Sep, 2015

1 commit


17 Sep, 2015

1 commit


08 Sep, 2015

1 commit

  • Mediatek spi HW can't set cs inactive(keep cs high) directly.
    Instead, it supplies pause mode to do it indirectly. If driver
    unsets SPI_CMD_PAUSE_MODE in CMD_REG, it also needs to reset
    internal state machine to let cs inactive at once.

    Signed-off-by: Leilk Liu
    Signed-off-by: Mark Brown

    Leilk Liu
     

31 Aug, 2015

2 commits


28 Aug, 2015

1 commit


26 Aug, 2015

4 commits


21 Aug, 2015

3 commits


20 Aug, 2015

1 commit


13 Aug, 2015

1 commit


12 Aug, 2015

1 commit

  • This patch fixes endian warnings detected by sparse:
    - sparse: incorrect type in argument 1 (different base types)
    expected unsigned int [unsigned] val
    got restricted __le32 [usertype]
    - sparse: incorrect type in argument 1 (different base types)
    expected unsigned int [unsigned] val
    got restricted __le32 [usertype]

    Signed-off-by: Leilk Liu
    Signed-off-by: Mark Brown

    Leilk Liu
     

11 Aug, 2015

1 commit


08 Aug, 2015

1 commit


07 Aug, 2015

1 commit