09 May, 2014
4 commits
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Vivante patch name:0002-more-refinements-for-wclip-issue
Date: Apr 14, 2014
Signed-off-by: Loren Huang
Acked-by: Shawn Guo -
Vivante patch name:0001-more-refinements-for-wclip-issue
Date: Apr 14, 2014
Signed-off-by: Loren Huang
Acked-by: Shawn Guo -
Access GPU register will cause system hang(bus lock-up) without log when clock is off,
GPU kernel BUG_ON is added to check if GPU clock is off when read & write GPU registers,GPU clock issue can be easily identified with the detailed kernel panic log as below:
kernel BUG at drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c:2423!
Unable to handle kernel NULL pointer dereference at virtual address 0000000
...
[] (__bug+0x1c/0x28) from [] (gckOS_ReadRegisterEx+0xbc/0xdc)
[] (gckOS_ReadRegisterEx+0xbc/0xdc) from [] (gckHARDWARE_QueryIdle+0x4c/0xbc)
[] (gckHARDWARE_QueryIdle+0x4c/0xbc) from [] (_TryToIdleGPU+0x70/0x12c)Mutex protection is not necessary for interrupt handling, because GPU clock is only turned off
by interrupt worker thread during clock gating.Date: Apr 11, 2014
Signed-off-by: Xianzhong
Acked-by: Jason Liu
(cherry picked from commit 50c3767eb19bb22f395215755dac220f4bbb2f14) -
Code is sync to
232293e0abb46639e188ab9d8643f1dbf94534f6* ENGR00306992 Revert "ENGR00302036-3 [#1078]gpu2d may cause bus hang in
* some corner case"Date: May 09,2014
Signed-off-by: Loren Huang
Acked-by: Shawn Guo
01 Apr, 2014
1 commit
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These are Category B, hence workaround is essential.
Signed-off-by: Nitin Garg
04 Mar, 2014
2 commits
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Add DDR3 support for MX6SL
Signed-off-by: Grace Si
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Use different MMDC parameters for 100M and 24M of i.MX6SL LPDDR2
Signed-off-by: Grace Si
27 Feb, 2014
2 commits
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Signed-off-by: Eli Billauer
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For more information about Xillybus, see http://xillybus.com
Signed-off-by: Eli Billauer
13 Feb, 2014
2 commits
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- add one imx pcie ep simple skeleton driver to demo
the msi trigger capability in imx6 pcie rc/ep validation
systemTest howto:
- Enable CONFIG_PCI_MSI=y, when rebuild the rc/ep images- EP side(console command and kernel message):
root@sabresd_6dq:/ # memtool 0x1ff8000=0
Writing 32-bit value 0x0 to address 0x01FF8000
root@sabresd_6dq:/ #- RC side(console command and kernel message):
root@sabresd_6dq:/ # cat /proc/interrupts | grep MSI
496: 1 0 0 0 PCIe-MSI- EP side(console command and kernel message):
root@sabresd_6dq:/ # memtool 0x1ff8000=0
Writing 32-bit value 0x0 to address 0x01FF8000- RC side(console command and kernel message):
root@sabresd_6dq:/ # cat /proc/interrupts | grep MSI
496: 2 0 0 0 PCIe-MSISigned-off-by: Richard Zhu
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- setup one new outbound memory region at rc side, used
to let imx6 pcie rc can access the memory of imx6 pcie ep
in imx6 pcie rc ep validation system.
- set the default address of the ddr memory to be 0x4000_0000
- change the test region size to be 15MB.NOTE:
- default address 0x4000_0000 of ep side would be
accessed in this demo.
Test howto:
step1:
EP side:
1.1:
echo 0x40000000 > /sys/devices/platform/imx-pcie/ep_bar0_addr1.2:
memtool -32 0x40000000 4
E
Reading 0x4 count starting at address 0x400000000x40000000: EFE9EDF4 7583FB39 39EAFFEA FBDCFD78
step2:
RC side:
memtool -32 0x01000000=58D454DA
memtool -32 0x01000004=7332095Bstep3:
EP side:
memtool -32 0x40000000 4
E
Reading 0x4 count starting at address 0x400000000x40000000: 58D454DA 7332095B 39EAFFEA FBDCFD78
Signed-off-by: Richard Zhu
24 Jan, 2014
2 commits
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Ptp multicast packet receive does not work after Ethernet link is lost
for a short time and then reconnected again. Because fec call restart()
to reset all multicast when cable hotplug.
(cherry picked from commit adfa64f0c2bf35f8b902ae5700f97e7e11ae1794)Signed-off-by: Fugang Duan
(cherry picked from commit 57a3f0b6888dfa2a59c7f1b738badbec342b2d10) -
The timestamps generated in the i.MX drivers are generated by the
nanoseconds part coming from the 1588 clock. But the number of seconds
are maintained in a private structure of the interface. Those are
updated in a 1588 clock rollover interrupt.The timestamp is generated right before a rollover of a second and the
timestamp value is constructed afterwards. Therefore the bigger part of
the timestamp is wrong (the second).So, the patch Suggested solution (pseudo-code):
If( actual-time.nsec < timestamp.nsec &&
!FEC_IEVENT[TS_TIMER] )
Timestamp.sec = fpp->prtc -1;
Else
Timestamp.sec = fpp->prtc;(cherry picked from kernel 3.10.17
commit 430dc3830e80a749666f9eb2aa9feba55823c6eb)Signed-off-by: Fugang Duan
(cherry picked from commit 536d730bf2394bbe77e3256087b611477e0fc769)
23 Jan, 2014
3 commits
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- add sata phy cr(offset:0x7f3f) reset in sata resume to
workaround imx6q sata kinds of suspend resume link
issues.
- add sata phy cr reset during imx6q sata initialization,
to initialize the sata phy to be an initialized state.
- add about 100us delay between mpll_clk enable and cr-rst,
make sure that the mpll_clk is stable.
- add about 100us delay between cr-rst and waiting for rx_pll
stable too, make sure that the cr-rst is finished.
- make sure mpll_clk enable(bit1 of gpr13) is cleared,
before set it, otherwise, the sata phy link maybe failed
when some devices are used.
In order to level the compatibility:
- enable the ssc support(bit14 of gpr13)
- change the TX boost control(bit10~7) from 0dB to be the
default value 3.33dB.Signed-off-by: Richard Zhu
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It is a ipu vdi driver bug, in vdi_split_process function
wrong base offset address is setting and video data will be
copy to wrong place in framebuffer.Correct the physical address to virtual address transfer and
add cache flush function, the issue is fixed.Signed-off-by: Sandor Yu
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Check the DMA status (DMA_IN_PROGRESS) is not strict enough, the two
TXs may also submit the DMA operation to the SDMA at the same time.
And the SDMA will hang at this case.This patch uses the bit operation to sync the DMA TX.
Also make it always wake up the process in the TX callback.
Signed-off-by: Huang Shijie
22 Jan, 2014
2 commits
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GPT Status register bit should be cleared by writing 1.
We do not need to read, modify, write for modifying the bits.
In Linux-3.0.35, while clearing ROV bit we inadvertently clear
other bit causing timer issues.Signed-off-by: Nitin Garg
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The return of v2_set_next_event() will lead to an infinite loop in
tick_handle_oneshot_broadcast() - "goto again;" with imx6q WAIT mode
(to be enabled). This happens because when global event did not expire
any CPU local events, the broadcast device will be rearmed to a CPU
local next_event, which could be far away from now and result in a
max_delta_tick programming in set_next_event().Fix the problem by detecting those next events with increments larger
than 0x7fffffff, and simply return zero in that case.It leaves mx1_2_set_next_event() unchanged since only v2_set_next_event()
will be running with imx6q WAIT mode support.Thanks Russell King for helping understand the problem.
Signed-off-by: Shawn Guo
13 Dec, 2013
1 commit
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issue:
sata phy link down after suspend resume on imx6q TO1.3.
solution:
sata phy ref clock should be gated off/on in suspend/resumeSigned-off-by: Richard Zhu
06 Dec, 2013
2 commits
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This patch fix the Copyright issue introduced by commit: 2b94a4b
2b94a4b ENGR00290444: Need to update CAAM driver with SM patches from STC
The commit:2b94a4b wrongly change the Copyright:
- * Copyright (C) 2008-2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2008, 2012-2013 Freescale Semiconductor, Inc.The correct one should be:
- * Copyright (C) 2008-2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2008-2013 Freescale Semiconductor, Inc.Signed-off-by: Jason Liu
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For i.MX6DL, the latest datasheet defines the min voltage of VDDARM_CAP
for 996MHz setpoint is 1.25V, adding 25mV margin, so we should set the
VDDARM_CAP's voltage to 1.275V.Signed-off-by: Anson Huang
03 Dec, 2013
16 commits
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The platform hangs if UART 1 is not used a console on MX6 SABRESD.
The issue is because the UART UFCR register is not initialized and
the driver uses values provided by the bootloader (U-Boot in this
case). This patch initializes the UFCR register and does not rely
on the default or what is configured by the bootloader.Test method on MX6 SABRESD:
1. Add 'noconsole' to the kernel command line.
2. SSH to the board and type the below from the SSH window:
echo Hello >/dev/ttymxc0
3. Platform will hang, with the patch the hang will not be seen.Signed-off-by: Mahesh Mahadevan
(cherry picked from commit e1925c5b8ca74a77322f34772f170563fee76d0d) -
This patch adds logics to report video buffer field information
via VIDIOC_DQBUF ioctrl so that the user space may rely on this
to determine how to go on to process the dqueued video buffers.
Currently, we only support two field types - V4L2_FIELD_INTERLACED
and V4L2_FIELD_NONE.Signed-off-by: Liu Ying
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According to datasheet, VDD_CACHE_CAP must not exceed VDDARM_CAP
by more than 200mV, as all of our i.MX6Q boards' VDD_CACHE_CAP
are connected to VDDSOC_CAP, so we need to follow this rule by
increasing VDDARM_CAP's voltage when necessary.Signed-off-by: Anson Huang
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This patch updates IPUv3 IC RGB to YUV color space conversion
matrix's parameters to align with the default VIV GPU CSC
implementation so that we may pass relevant Android CTS test
cases.Signed-off-by: Liu Ying
(cherry picked from commit 17b6dbef8eea2051a6c3819f3690c21948bd0e93) -
Some boards' irq #125 are not pending, so we need to
force irq #32 to be pending manually to ensure CCM is
in correct stat before entering low power mode. Using
irq #32 is more reliable than #125, as we can trigger
it manually. See below commit for detail of CCM LPM
issue:commit 04b5224599fef16ef3a1856dd1b3205360b772c1
Signed-off-by: Anson Huang
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V4L2_PIX_FMT_YUYV is the original format from camera and the source format
for CSI. This format may be needed on Android to do CSC before encoding.
We can now choose V4L2_PIX_FMT_YUYV, V4L2_PIX_FMT_UYVY, V4L2_PIX_FMT_RGB565
for the v4l capture format.Signed-off-by: Robby Cai
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The ipu task thread checks outstanding tasks to be done on waiting
event uninterruptibly on the function find_task()'s return value.
However, sleeping on waiting event uninterruptibly contributes to
system load average value. This patch changes wait_event() to
wait_event_interruptible() to avoid the load average value inflation.Signed-off-by: Liu Ying
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Previous ptp test environment is base on IPv4, now add VLAN
(virtual local area network) support. Fix the ptp packet parse
issue to support it.PTP test on VLAN environment:
- Enable kernel config "CONFIG_FEC_1588", and rebuild
- After kernel up, dhcp require IP address for eth0
- Use vconfig to add virtual netdev eth0.n (exp: eth0.5):
vconfig add eth0 5
- Use ifconfig to config virtual netdev eth5, and config
real netdev eth0 to 0.0.0.0:
ifconfig eth0.5 192.168.0.100 netmask 255.255.255.0 up
ifconfig eth0 0.0.0.0
- If connect switch, enable switch VLAN feature and add the
related ptp device ports to VID 5.
- Last, run the IXXAT stack V1.05.03:
ptp_main_1.05.03 -d -o -m -l -w -z -i 0:eth0.5Signed-off-by: Fugang Duan
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The previous behavior of the driver did not work properly with Qt5
QtQuick multi touch-point gestures, due to how touch-points are
reported when removing a touch-point. My interpretation of the
available documentation [1] was that the driver should report all
touch-points between SYN_REPORTs, but it is not explicitly stated so.
I've found another mail-thread [2] where the creator of the protocol
states:"The protocol defines a generic way of sending a variable amount of
contacts. The contact count is obtained by counting the number of
non-empty finger packets between SYN_REPORT events."-Henrik RydbergI think this verifies my assumption that all touch-points should be
reported between SYN_REPORTs, otherwise it can not be used to obtain
the count.[1] https://www.kernel.org/doc/Documentation/input/multi-touch-protocol.txt
[2] http://lists.x.org/archives/xorg-devel/2010-March/006466.htmlSigned-off-by: Erik Boto
Signed-off-by: Mahesh Mahadevan -
clk structure member name is defined only when CONFIG_CLK_DEBUG is enabled.
Hence need to encapsulate the code with this config.Patch received from imx community:
https://community.freescale.com/thread/308482Signed-off-by: xiongweihuang
Signed-off-by: Mahesh Mahadevan -
Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by
recent GCC (4.7.2) optimizations") attempted to fix a compliance issue
with the memset return value. However the memset itself became broken
by that patch for misaligned pointers.This fixes the above by branching over the entry code from the
misaligned fixup code to avoid reloading the original pointer.Also, because the function entry alignment is wrong in the Thumb mode
compilation, that fixup code is moved to the end.While at it, the entry instructions are slightly reworked to help dual
issue pipelines.Signed-off-by: Nicolas Pitre
Tested-by: Alexander Holler
Signed-off-by: Russell King
(cherry picked from commit 418df63adac56841ef6b0f1fcf435bc64d4ed177) -
Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on
assumptions about the implementation of memset and similar functions.
The current ARM optimized memset code does not return the value of
its first argument, as is usually expected from standard implementations.For instance in the following function:
void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter)
{
memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter));
waiter->magic = waiter;
INIT_LIST_HEAD(&waiter->list);
}compiled as:
800554d0 :
800554d0: e92d4008 push {r3, lr}
800554d4: e1a00001 mov r0, r1
800554d8: e3a02010 mov r2, #16 ; 0x10
800554dc: e3a01011 mov r1, #17 ; 0x11
800554e0: eb04426e bl 80165ea0
800554e4: e1a03000 mov r3, r0
800554e8: e583000c str r0, [r3, #12]
800554ec: e5830000 str r0, [r3]
800554f0: e5830004 str r0, [r3, #4]
800554f4: e8bd8008 pop {r3, pc}GCC assumes memset returns the value of pointer 'waiter' in register r0; causing
register/memory corruptions.This patch fixes the return value of the assembly version of memset.
It adds a 'mov' instruction and merges an additional load+store into
existing load/store instructions.
For ease of review, here is a breakdown of the patch into 4 simple steps:Step 1
======
Perform the following substitutions:
ip -> r8, then
r0 -> ip,
and insert 'mov ip, r0' as the first statement of the function.
At this point, we have a memset() implementation returning the proper result,
but corrupting r8 on some paths (the ones that were using ip).Step 2
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 1:save r8:
- str lr, [sp, #-4]!
+ stmfd sp!, {r8, lr}and restore r8 on both exit paths:
- ldmeqfd sp!, {pc} @ Now
Reviewed-by: Nicolas Pitre
Signed-off-by: Dirk Behme
Signed-off-by: Russell King
(cherry picked from commit 455bd4c430b0c0a361f38e8658a0d6cb469942b5) -
With the new tap-out of i.MX6DQ(TO1.5) and i.MX6DL/SOLO(TO1.2), we need add
more chip revision support in order to report the chip revision correctly.Signed-off-by: Jason Liu
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These patches come from Winston Hudson of STC and allow building CAAM
as a kernel module. His comments:
This patch enables the CAAM driver to be built as a single LKM
(Loadable Kernel Module). Individual components of the CAAM driver
may be selected from the kernel configuration options, but a
single monolithic "caam.ko" module is created. Adding or removing
individual CAAM driver components requires that the module be
recompiled, unloaded (rmmod caam.ko) then reloaded (insmod
caam.ko), before the changes take affect. The option to build CAAM
as part of the kernel is still available, but a kernel recompile
and reboot is required before the changes take affect. The patch
was created for the 3.0.x kernel.This patch also fixes an issue with the CAAM driver crashing with
a kernel "opps" during driver initialization. The problem occurs
when the CAAM RNG initialization fails and the "caam_remove()"
function called. The driver attemps to release resources that have
not been allocated. Checks have been added to ensure that resource
allocation has occurred before attempting to release those
resources.Signed-off-by Jay Monkman
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These patches came from Steve Cornelius of STC and are to fix the RNG
instantiation problem in the CAAM driver. His comments:
Add code to enable the "caam_probe" function to detect if the RNG
has been instantiated and to skip the instantiation process if
already completed.Signed-off-by Jay Monkman
-
These patches came from Steve Cornelius of STC and are to fix SM in
CAAM driver. His comments:
Original implementation assumed that physical base of Secure
Memory (SM) region could be back-derived from the virtual
address. Since the kernel doesn't normally know anything about the
existence of SM (it is clearly not "general purpose" memory), then
the normal means of address translation would not work,
necessitating specific computation of physical addresses for SM
pages.Last spin of this driver accounted for this, but did not extract
the physical base address of SM from a property; instead, it used
a constant as a shortcut. This change restores correct use of the
device property to extract the physical base value.Signed-off-by Jay Monkman
12 Nov, 2013
1 commit
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[1] The gpmi uses the nand_command_lp to issue the commands to NAND chips.
The gpmi issues a DMA operation with gpmi_cmd_ctrl when it handles
a NAND_CMD_NONE control command. So when we read a page(NAND_CMD_READ0)
from the NAND, we may send two DMA operations back-to-back.If we do not serialize the two DMA operations, we will meet a bug when
1.1) we enable CONFIG_DMA_API_DEBUG, CONFIG_DMADEVICES_DEBUG,
and CONFIG_DEBUG_SG.1.2) Use the following commands in an UART console and a SSH console:
cmd 1: while true;do dd if=/dev/mtd0 of=/dev/null;done
cmd 1: while true;do dd if=/dev/mmcblk0 of=/dev/null;doneThe kernel log shows below:
-----------------------------------------------------------------
kernel BUG at lib/scatterlist.c:28!
Unable to handle kernel NULL pointer dereference at virtual address 00000000
.........................
[] (__bug+0x18/0x24) from [] (sg_next+0x48/0x4c)
[] (sg_next+0x48/0x4c) from [] (debug_dma_unmap_sg+0x170/0x1a4)
[] (debug_dma_unmap_sg+0x170/0x1a4) from [] (dma_unmap_sg+0x14/0x6c)
[] (dma_unmap_sg+0x14/0x6c) from [] (mxs_dma_tasklet+0x18/0x1c)
[] (mxs_dma_tasklet+0x18/0x1c) from [] (tasklet_action+0x114/0x164)
-----------------------------------------------------------------1.3) Assume the two DMA operations is X (first) and Y (second).
The root cause of the bug:
Assume process P issues DMA X, and sleep on the completion
@this->dma_done. X's tasklet callback is dma_irq_callback. It firstly
wake up the process sleeping on the completion @this->dma_done,
and then trid to unmap the scatterlist S. The waked process P will
issue Y in another ARM core. Y initializes S->sg_magic to zero
with sg_init_one(), while dma_irq_callback is unmapping S at the same
time.See the diagram:
ARM core 0 | ARM core 1
-------------------------------------------------------------
(P issues DMA X, then sleep) --> |
|
(X's tasklet wakes P) --> |
|
| |
|
(X's tasklet wakes P) --> |
|
|
Signed-off-by: Brian Norris
16 Sep, 2013
2 commits
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Minimize the VDDHIGH_IN current by
- Use 100K pullup for SD card detect, write protect and charger signals.
Use 100K internal pullup for PAD_KEY_COL7, PAD_KEY_ROW7, PAD_REF_CLK_32K,
PAD_SD2_DAT6, PAD_SD2_DAT7, PAD_ECSPI2_MISO, PAD_ECSPI2_MOSI, PAD_ECSPI2_SS0
- Some pads have external pullup resistors. When suspend, disable pull/keeper
for MX6SL_PAD_FEC_MDIO__GPIO_4_20, MX6SL_PAD_I2C1_SCL__GPIO_3_12,
MX6SL_PAD_I2C1_SDA__GPIO_3_13, MX6SL_PAD_I2C2_SCL__GPIO_3_14,
MX6SL_PAD_I2C2_SDA__GPIO_3_15
- Some function pads have external pull resistors. Disable internal pull for
MX6SL_PAD_JTAG_MOD__SJC_MOD, MX6SL_PAD_JTAG_TCK__SJC_TCKSigned-off-by: Peter Chan
-
Minimize the VDDHIGH_IN current by
- Some pads are either have external pullup or may idle at HIGH state. Enable
internal pulldown will increase leakage current. Do not enable internal
pulldown to the following pads when suspend: PAD_I2C1_SCL, PAD_I2C1_SDA,
PAD_I2C2_SCL, PAD_I2C2_SDA, PAD_SD1_CLK, PAD_SD1_CMD, PAD_SD1_DAT0,
PAD_SD1_DAT1, PAD_SD1_DAT2, PAD_SD1_DAT3, PAD_SD1_DAT4, PAD_SD1_DAT5,
PAD_SD1_DAT6, PAD_SD1_DAT7, PAD_SD2_CLK, PAD_SD2_CMD, PAD_SD2_DAT0,
PAD_SD2_DAT1, PAD_SD2_DAT2, PAD_SD2_DAT3, PAD_SD2_DAT4, PAD_SD2_DAT5,
PAD_SD3_CLK, PAD_SD3_CMD, PAD_SD3_DAT0, PAD_SD3_DAT1, PAD_SD3_DAT2,
PAD_SD3_DAT3, PAD_FEC_MDIO, PAD_ECSPI1_SS0, PAD_EPDC_PWRCTRL2, PAD_KEY_COL4,
PAD_KEY_ROW5, PAD_KEY_COL6, PAD_FEC_TX_CLK, PAD_SD2_DAT6, PAD_SD2_DAT7,
PAD_KEY_ROW7, PAD_KEY_COL7, PAD_REF_CLK_32K
- The pin configurations of SD card detect and write protect should not be
changed when suspend, remove PAD_SD2_DAT4, PAD_SD2_DAT5 and PAD_KEY_COL7 from
suspend_enter_pads[]
- LCDIF pins should be configured as GPIO when suspend, add PAD_LCD_ENABLE,
PAD_LCD_HSYNC, PAD_LCD_VSYNC, PAD_LCD_RESET, PAD_LCD_DAT6, PAD_LCD_DAT7,
PAD_LCD_DAT8, PAD_LCD_DAT9 to suspend_enter_pads[]
- PAD_WDOG_B is used as a software ON/OFF button detect on EVK. Remove
MX6SL_PAD_WDOG_B__WDOG1_WDOG_B from mx6sl_brd_pads[]
- PAD_SD1_DAT0 is used by SD1 port, remove MX6SL_PAD_SD1_DAT0__GPIO_5_11
from mx6sl_uart4_pads[]
- Configure PAD_JTAG_MOD, PAD_JTAG_TCK, PAD_JTAG_TDI, PAD_JTAG_TDO,
PAD_JTAG_TMS, PAD_JTAG_TRSTB for JTAG functionSigned-off-by: Peter Chan
