02 Jul, 2016
1 commit
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The only way for a fixed factor clock to change its rate would be to change
its parent rate.Since passing blindly CLK_SET_RATE_PARENT might break a lot of platforms
that were relying on the fact that the parent rate wouldn't change,
introduce a compatible-based whitelist that will allow clocks to opt-in
that flag.Signed-off-by: Maxime Ripard
Acked-by: Rob Herring
Signed-off-by: Stephen Boyd
01 Jul, 2016
20 commits
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…o/linux into clk-next
Pull i.MX clk driver updates from Shawn Guo:
- A few correction and improvements on pllv3 driver around AV pll clock
rate calculation, parent setting and power bit handling
- Correct i.MX6UL GPT2 clock names
- A couple of minor fixes on i.MX7D clock driver on DRAM clocks* tag 'imx-clk-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
clk: imx6ul: fix gpt2 clock names
clk: imx: refine the powerdown bit of clk-pllv3
clk: imx: clk-pllv3: fix incorrect handle of enet powerdown bit
clk: imx: fix pll clock parents
clk: imx7d: correct dram pll type
clk: imx7d: correct dram root clk parent select
clk: imx: correct AV PLL rate formula -
* clk-hw-unregister-fixed-rate:
clk: fixed-rate: add clk_hw_unregister_fixed_rate() -
This will be used to migrate to the clk_hw APIs.
Signed-off-by: Masahiro Yamada
Signed-off-by: Stephen Boyd -
1. Add driver remove path.
2. Fix some issues.
-Fix the ordering issue about clock provider being published.
-Add error checking upon registering clocks.Signed-off-by: Jiancheng Xue
Signed-off-by: Stephen Boyd -
Add hisi_clk_unregister_* functions.
Signed-off-by: Jiancheng Xue
Signed-off-by: Stephen Boyd -
Add error processing for hisi_clk_register_* functions.
Signed-off-by: Jiancheng Xue
Signed-off-by: Stephen Boyd -
Before, there was an ordering issue that the clock provider
had been published in hisi_clk_init before it could provide
valid clocks to consumers. hisi_clk_alloc is just used to
allocate memory space for struct hisi_clock_data. It makes
it possible to publish the provider after the clocks are ready.Signed-off-by: Jiancheng Xue
Signed-off-by: Stephen Boyd -
Change the input arguments type to struct platform_device pointer.
Signed-off-by: Jiancheng Xue
Signed-off-by: Stephen Boyd -
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.Signed-off-by: Stephen Boyd
Acked-by: Andi Shyti
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Stephen Boyd -
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.Cc: Daniel Thompson
Signed-off-by: Stephen Boyd
Signed-off-by: Stephen Boyd -
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.Cc: Jon Mason
Cc: Simran Rai
Signed-off-by: Stephen Boyd
Tested-by: Ray Jui
Signed-off-by: Stephen Boyd -
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.Signed-off-by: Stephen Boyd
Acked-by: Linus Walleij
Signed-off-by: Stephen Boyd -
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers while registering clks in
these drivers, allowing us to move closer to a clear split of
consumer and provider clk APIs.Signed-off-by: Stephen Boyd
Acked-by: Linus Walleij
Signed-off-by: Stephen Boyd -
Now that we have clk_hw based provider APIs to register clks, we
can get rid of struct clk pointers in this driver, allowing us to
move closer to a clear split of consumer and provider clk APIs.Signed-off-by: Stephen Boyd
Acked-by: Rob Herring
Signed-off-by: Stephen Boyd -
* clk-st-critical:
clk: st: clkgen-pll: Detect critical clocks
clk: st: clkgen-fsyn: Detect critical clocks
clk: st: clk-flexgen: Detect critical clocks -
Utilise the new Critical Clock infrastructure to mark clocks which
much not be disabled as CRITICAL.Clocks are marked as CRITICAL using clk flags. This patch also
ensures flags are peculated through the framework in the correct
manner.Signed-off-by: Lee Jones
Signed-off-by: Stephen Boyd -
Utilise the new Critical Clock infrastructure to mark clocks which
much not be disabled as CRITICAL.Clocks are marked as CRITICAL using clk flags. This patch also
ensures flags are peculated through the framework in the correct
manner.Signed-off-by: Lee Jones
Signed-off-by: Stephen Boyd -
Utilise the new Critical Clock infrastructure to mark clocks which
much not be disabled as CRITICAL.While we're at it, reduce the coverage of the flex_flags variable,
since it's only really used in a single for() loop.Signed-off-by: Lee Jones
Signed-off-by: Stephen Boyd -
* clk-hi6220-rtc:
clk: hi6220: Add RTC clock for pl031 -
Adds clk support for the pl031 RTC on hi6220
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: Rob Herring
Cc: Pawel Moll
Cc: Wei Xu
Cc: Guodong Xu
Signed-off-by: Zhangfei Gao
[jstultz: Forward ported, tweaked commit description]
Signed-off-by: John Stultz
Signed-off-by: Stephen Boyd
30 Jun, 2016
2 commits
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* clk-notify:
clk: Provide notifier stubs when !COMMON_CLK -
…el/git/geert/renesas-drivers into clk-next
Pull second batch of Renesas clk driver updates from Geert
Uytterhoeven:- Add support for R-Car V2H,
- Add FDP1, DRIF, and thermal clocks on R-Car H3,
- Correct a wrong parent clock.* tag 'clk-renesas-for-v4.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r8a7795: Add THS/TSC clock
clk: renesas: r8a7795: Add DRIF clock
clk: renesas: r8a7795: Correct lvds clock parent
clk: renesas: r8a7795: Provide FDP1 clocks
clk: renesas: Add R8A7792 support
clk: renesas: mstp: Document R8A7792 support
clk: renesas: rcar-gen2: Document R8A7792 support
29 Jun, 2016
3 commits
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The clk notifier symbols are hidden by COMMON_CLK. However on some
platforms HAVE_CLK might be set while COMMON_CLK not which leads to
compile test build errors like:$ make.cross ARCH=sh
drivers/devfreq/tegra-devfreq.c: In function 'tegra_actmon_rate_notify_cb':
>> drivers/devfreq/tegra-devfreq.c:391:16: error: 'POST_RATE_CHANGE' undeclared (first use in this function)
if (action != POST_RATE_CHANGE)
^
drivers/devfreq/tegra-devfreq.c: In function 'tegra_devfreq_probe':
>> drivers/devfreq/tegra-devfreq.c:654:8: error: implicit declaration of function 'clk_notifier_register' [-Werror=implicit-function-declaration]
err = clk_notifier_register(tegra->emc_clock, &tegra->rate_change_nb);
^Export the macros and data type declarations outside of COMMON_CLK ifdef
and provide stubs to fix the compile testing.Reported-by: kbuild test robot
Signed-off-by: Krzysztof Kozlowski
Tested-by: Bartlomiej Zolnierkiewicz
Signed-off-by: Stephen Boyd -
…el/git/geert/renesas-drivers into clk-next
Pull support for Renesas R-car M3-W from Geert Uytterhoeven:
Add initial support for the Clock Pulse Generator and Module Standby and
Software Reset modules on the Renesas R-Car M3-W SoC:
- Basic core clocks,
- SCIF2 (console) module clock,
- INTC-AP (GIC) module clock.* tag 'clk-renesas-for-v4.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: cpg-mssr: Add support for R-Car M3-W
clk: renesas: cpg-mssr: Extract common R-Car Gen3 support code
clk: renesas: Add r8a7796 CPG Core Clock Definitions
clk: renesas: cpg-mssr: Document r8a7796 support -
This clk is critical to operation of the SoC and should never be
turned off. Furthermore, there are no consumers of this clk so
let's just delete it so things like eMMC work.Reported-by: Srinivas Kandagatla
Fixes: b1e010c0730a ("clk: qcom: Add MSM8996 Global Clock Control (GCC) driver")
Signed-off-by: Stephen Boyd
23 Jun, 2016
14 commits
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The gxbb clock controller is the primary clock generation unit for the
AmLogic GXBB SoC. It is clocked by a fixed 24MHz xtal, contains several
PLLs and the usual post-dividers, muxes, dividers and leaf gates that
are fed into various IP blocks in the SoC.Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette -
Add documentations for the clock controller.
Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette -
Fractional MPLLs are a superset of the existing AmLogic MPLLs. They add
in a couple of new bitfields for further dividing the clock rate to
achieve rates with fractional hertz.Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette -
MPLLs are adjustable rate clocks derived from PLLs. On both Meson8b and
GXBB they appear to be only derived from fixed_pll.Add support for these clock types so that they can be added to their
respective drivers.Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette -
There are a series of peripheral and system gate clocks that fan out
from the clk81 signal. Add a helper macro to statically initialize these
gate clocks.Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette -
Break the AmLogic clock code up so that only the necessary parts are
compiled and linked. The core code is selected by both arm and arm64
builds with COMMON_CLK_AMLOGIC. The individual drivers have their own
config options as well.Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette -
This patch creates a proper platform_driver for the meson8b clock
controller. Use of CLK_OF_DECLARE is removed, and can be added back in
later if very early registration of some clocks is required.Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette -
Remove the composite clock registration function and helpers. Replace
unnecessary configuration struct with static initialization of the
desired clock type.To preserve git bisect this patch also flips the switch and starts using
of_clk_add_hw_provider instead of the deprecated meson_clk_register_clks
method. As a byproduct clk.c can be deleted.Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette -
This clock is undocumented and always orphaned. Get rid of it until we
have more complete clock tree documentation.Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette -
Remove the cpu clock registration function and helpers. Replace
unnecessary configuration struct with static initialization of the
desired clock type.Ninja rename a5_clk to cpu_clk to better align with cpufreq convention.
Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette -
Remove the fixed factor registration function and helpers. Replace
unnecessary configuration struct with static initialization of the
desired clock type.Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette -
Remove the pll registration function and helpers. Replace unnecessary
configuration struct with static initialization of the desired clock
type.Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette -
Remove the fixed_rate registration function and helpers from clkc.[ch].
Replace unnecessary configuration struct with static initialization of
the desired clock type.While we're here, begin the transition to a proper platform_driver and
call of_clk_add_hw_provider with a shiny new struct clk_hw_onecell_data.Tested-by: Kevin Hilman
Signed-off-by: Michael Turquette
