07 Feb, 2008
16 commits
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Remove some more references to dev->power.power_state. That field is overdue
for removal, but we can't do that while it's still referenced in the kernel.
The only reason to update it was to make the /sys/devices/.../power/state
files (now removed) work better.Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Use simpler comment headers, and strip out information that is maintained in
GIT historySigned-off-by: Mike Frysinger
Signed-off-by: Bryan Wu
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
SPI writes should also not return until the last bit is sent.
Signed-off-by: Sonic Zhang
Signed-off-by: Bryan Wu
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Full duplex SPI operation should not read a dummy byte at the first transfer.
Bug and fix by Jean-Christian de Rivaz :http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=3678
Signed-off-by: Jean-Christian de Rivaz
Signed-off-by: Bryan Wu
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
PBX 2 SPI devices need the nonstandard "cs change per word" mechanism.
This patch is one of three updating this driver to make the last data bits get
sent before advancing the transfer ... in this case, before the chipselect
gets deactivated.Signed-off-by: Bryan Wu
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Use the SPI driver's name when requesting gpio lines. When there are gpio
conflicts, this helps to narrow down the problems; "bfin-spi" is not
informative.Signed-off-by: Bryan Wu
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Remove useless return status check in restore_state function. Issue was
pointed out by Michael.Cc: Michael Hennerich
Signed-off-by: Bryan Wu
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
This adds driver OMAP SPI specific changes to support OMAP 3430
Signed-off-by: Girish S G
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Add support for SPI over SCI pins. SCI is a very simple serial controller
block that can be found on older SuperH processors. In theory it is
possible to use the SCI hardware block in syncronous mode, but this version
of the driver simply hooks up the bit banging code on the SCI pins.Signed-off-by: Magnus Damm
Signed-off-by: David Brownell
Cc: Paul Mundt
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
The two S3C SPI master drivers got merged without much review, so I just
noticed that they're doing something that the SPI core code is responsible
for, rather than any adapter driver: they try to register SPI devices.This removes that support from those drivers so they act normally.
Interestingly, none of the current boards are affected. So it's a net code
shrink with no loss of functionality.Signed-off-by: David Brownell
Cc: Ben Dooks
Cc: Russell King
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
In atmel_spi_next_xfer, xfer can be NULL because the next transfer may
already have been submitted to the PDC (using DMA chaining). This can
cause an oops, since the debug message assumed it was never null. The
fix changes how those debug messages are issued, ensuring that one is
issued each time a transfer is started instead of once per call.Also, properly indent the "can this transfer be chained" test so it's
not hidden as if it were non-conditional code.Signed-off-by: Haavard Skinnemoen
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Add support for chained transfers in the atmel_spi driver, letting the DMA
controller switch to the next buffer pair without CPU intervention. This
reduced I/O latencies by about 2% in one bulk I/O test. It should also help
work around several interrelated errata affecting chipselect 0 on at91rm9200
chips.Almost all of the changes are in the reworked atmel_spi_next_xfer() function.
That's now called with the driver in one of three states:1. It isn't transferring anything (in which case the first transfer
of the current message is going to be sent)
2. It has finished transfering a non-chainable transfer (in which
case it will go to the next transfer in the message)
3. It has finished transfering a chained transfer (in which case the
next transfer is already queued)After that it will queue the next transfer if it can be chained.
Signed-off-by: Szilveszter Ordog
Acked-by: Haavard Skinnemoen
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Don't insert (undesirable) delays between consecutive words (DLYBCT) or when
activating chipselects (DLYBS).Removing the between-word delays improves the performance of bulk transfers
(such as mtd_dataflash, m25p80, mmc_spi) significantly. In one test, the
improvement was a factor of more than eight!(The large DLYBCT value came from the legacy at91 SPI driver, and it's not
clear why it used such a huge value.)Signed-off-by: Haavard Skinnemoen
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Don't update dev->power.power_state any more in the SPI core. The only
reason to update this scheduled-to-be-removed field was to make the
already-removed /sys/devices/.../power/state files work better.Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Mostly in and around irq handlers.
Signed-off-by: Jeff Garzik
Cc: Russell King
Cc: "Luck Tony"
Cc: Roman Zippel
Cc: Geert Uytterhoeven
Cc: Paul Mackerras
Cc: Benjamin Herrenschmidt
Acked-by: Dmitry Torokhov
Cc: Karsten Keil
Acked-by: "John W. Linville"
Cc: James Bottomley
Cc: David Brownell
Cc: "Antonino A. Daplas"
Acked-by: Josh Boyer
Acked-by: Holger Schurig
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Nothing should ever include this file.
Signed-off-by: Ralf Baechle
Acked-by: "Mike Frysinger"
Acked-by: "Bryan Wu"
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
03 Feb, 2008
1 commit
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Signed-off-by: Paulius Zaleckas
Signed-off-by: Adrian Bunk
31 Jan, 2008
2 commits
28 Jan, 2008
1 commit
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In case of QE we can use brg-frequency (which is qeclk/2).
Thus no need to divide sysclk in the spi_mpc83xx.This patch also adds code to use get_brgfreq() on QE chips.
Signed-off-by: Anton Vorontsov
Acked-by: David Brownell
Signed-off-by: Kumar Gala
27 Jan, 2008
2 commits
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It is dangerous for an mpc52xx device driver to modify the port_config
register. If the driver is probed incorrectly, it will change the pin
IO configuration in ways which may not be compatible with the board.
port_config should be set up by the bootloader, or failing that, in
the platform setup code in arch/powerpc/platforms/52xx.Also, modifying CDM registers directly can cause a race condition with
other drivers. Instead call a common routine to modify CDM settings.Signed-off-by: Grant Likely
Acked-by: Dragos Carp -
Update MPC5200 drivers to also look for compatible properties in the
form "fsl,mpc5200-*" to better conform to open firmware generic names
recommended practice as published here:http://www.openfirmware.org/1275/practice/gnames/gnamv14a.html
This patch should *not* break compatibility with older device trees
which do not use the 'fsl,' prefix. The drivers will still bind against
the older names also.Signed-off-by: Grant Likely
26 Jan, 2008
2 commits
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1. make pxa2xx_spi.c use ssp_request() and ssp_free() to get the common
information of the designated SSP port.2. remove those IRQ/memory request code, ssp_request() has done that for
the driver3. the SPI platform device is thus made psuedo, no resource (memory/IRQ)
has to be defined, all will be retreived by ssp_request()4. introduce ssp_get_clk_div() to handle controller difference in clock
divisor setting5. use clk_xxx() API for clock enable/disable, and clk_get_rate() to
handle the different SSP clock frequency between different processorsSigned-off-by: eric miao
Signed-off-by: Russell King -
Signed-off-by: eric miao
Signed-off-by: Russell King
25 Jan, 2008
2 commits
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Convert to use the class iteration api.
Signed-off-by: Dave Young
Acked-by: David Brownell
Signed-off-by: Greg Kroah-Hartman -
Before transmission of the last word in PIO RX_ONLY mode rx+tx mode
is enabled:/* prevent last RX_ONLY read from triggering
* more word i/o: switch to rx+tx
*/
if (c == 0 && tx == NULL)
mcspi_write_cs_reg(spi,
OMAP2_MCSPI_CHCONF0, l);But because c is decremented after the test, c will never be zero and
rx+tx will not be enabled. This breaks RX_ONLY mode PIO transfers.Fix it by decrementing c in the beginning of the various I/O loops.
Signed-off-by: Kalle Valo
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
24 Jan, 2008
1 commit
19 Jan, 2008
1 commit
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mpc5200 platform code defines a bunch of map functions which duplicate the
functionality of of_iomap(). Remove them and use of_iomap() instead.Signed-off-by: Grant Likely
09 Jan, 2008
1 commit
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Fix a glitch reported by lockdep in the spi_bitbang code: it needs to
consistently block IRQs when holding that spinlock.Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
11 Dec, 2007
4 commits
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We have a wifi module connected to the spi bus and got sometimes FIFO
overrun errors on the spi bus.After some investigation i found that the driver loads the TCR (transmit
count) register before the RCR (receive count). When the transfer list is
not empty the atmel_spi_next_message is called while tx and rx are enabled.
As soon as the TCR is loaded, hardware starts transfer and causes a rx
fifo overrun because the RCR is not loaded yet.Load the RCR before the TCR. After this patch the fifo overrun disapears
at out setup.Signed-off-by: Haavard Skinnemoen
Signed-off-by: Rini van Zetten
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Signed-off-by: Will Newton
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Signed-off-by: Will Newton
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Signed-off-by: Will Newton
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
06 Dec, 2007
7 commits
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- reconfigure SPI baud from speed_hz of each spi transfer
- according to spi_transfer.bits_per_word to reprogram register and setup
correct SPI operation handlersSigned-off-by: Bryan Wu
Cc: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Remove some sort of bloaty code, try to get these pin_req arrays built at compile-time
- move this static things to the blackfin board file
- add pin_req array to struct bfin5xx_spi_master
- tested on BF537/BF548 with SPI flashSigned-off-by: Bryan Wu
Cc: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Signed-off-by: Bryan Wu
Cc: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Signed-off-by: Bryan Wu
Cc: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Set correct baud for spi mmc and enable SPI only after DMA is started.
Signed-off-by: Sonic Zhang
Signed-off-by: Bryan Wu
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Move cs_chg_udelay handling (specific to this driver) to cs_deactive(), fixing
a bug when some SPI LCD driver needs delay after cs_deactive.Fix bug reported by Cameron Barfield
https://blackfin.uclinux.org/gf/project/uclinux-dist/forum/?action=ForumBrowse&forum_id=39&_forum_action=ForumMessageBrowse&thread_id=23630&feedback=Message%20replied.Cc: Cameron Barfield
Signed-off-by: Bryan Wu
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Fix bug in u16_cs_chg_reader to read data_len-2 bytes data firstly, then read
out the last 2 bytes dataSigned-off-by: Bryan Wu
Signed-off-by: David Brownell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds