31 Aug, 2020
1 commit
-
I'll need this in IGT to identify the different kind of GTs and apply
the right performance query configuration.Signed-off-by: Lionel Landwerlin
Reviewed-by: Ashutosh Dixit
Link: https://patchwork.freedesktop.org/patch/msgid/20200828133125.157171-1-lionel.g.landwerlin@intel.com
18 Aug, 2020
1 commit
-
0x0155 is rather Ivy Bridge PCI-E Root Port.
0x0157 from the same commit ff049b6ce21d ("drm/i915: bind driver to ValleyView chipsets")
is likely wrong too. Nowhere is it independetly confirmed or mentioned.Signed-off-by: Alexei Podtelezhnikov
Signed-off-by: Ville Syrjälä
Link: https://patchwork.freedesktop.org/patch/msgid/20200428034752.3975-1-apodtele@gmail.com
Signed-off-by: Rodrigo Vivi
14 Jul, 2020
1 commit
-
Add the PCI ID for DG1, but keep it out of the table we use to register
the driver. At this point we can't consider the driver ready to bind to
the device since we basically miss support for everything. When more
support is merged we can enable it to work partially for example as a
display-only driver.v2: remove DG1 from the pci table and reword commit message (Lucas)
Bspec: 44463
Cc: Matthew Auld
Cc: James Ausmus
Cc: Joonas Lahtinen
Cc: Matt Roper
Signed-off-by: Abdiel Janulgue
Signed-off-by: Lucas De Marchi
Reviewed-by: José Roberto de Souza # v1
Acked-by: Daniel Vetter
Link: https://patchwork.freedesktop.org/patch/msgid/20200713182321.12390-3-lucas.demarchi@intel.com
08 Jul, 2020
1 commit
-
Two new PCI ids added to ehl.
v2: added two additional PCI ids
BSpec: 29153
Cc: Matt Roper
Cc: Anusha Srivatsa
Signed-off-by: José Roberto de Souza
Reviewed-by: Matt Roper
Link: https://patchwork.freedesktop.org/patch/msgid/20200707204530.42289-1-jose.souza@intel.com
20 May, 2020
1 commit
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Introduce the basic platform definition, macros, and PCI IDs.
Bspec: 44501
Cc: Lucas De Marchi
Cc: Caz Yokoyama
Cc: Aditya Swarup
Signed-off-by: Matt Roper
Acked-by: Caz Yokoyama
Reviewed-by: Anusha Srivatsa
Signed-off-by: Lucas De Marchi
Link: https://patchwork.freedesktop.org/patch/msgid/20200504225227.464666-2-matthew.d.roper@intel.com
19 Mar, 2020
1 commit
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Adding 4 new PCI IDs to TGL
Bspec: 44455Signed-off-by: Swathi Dhanavanthri
Signed-off-by: Matt Roper
Link: https://patchwork.freedesktop.org/patch/msgid/20200318221240.8180-1-swathi.dhanavanthri@intel.com
Reviewed-by: Matt Roper
13 Dec, 2019
2 commits
-
U series device need different DDI buffer setup for eDP
and DP. If driver did not recognize ULT id proerply.
The setting for H and S series would be used.Cc: Rodrigo Vivi
Cc: Jani Nikula
Cc: Anusha Srivatsa
Cc: Cooper Chiou
Signed-off-by: Lee Shawn C
Signed-off-by: Ville Syrjälä
Link: https://patchwork.freedesktop.org/patch/msgid/20191210150415.10705-2-shawn.c.lee@intel.com -
commit 'a7b4deeb02b9 ("drm/i915/cml: Add CML PCI IDS)'
introduced new PCI ID that CML support. But some PCI
IDs were removed in BSpec for CML. This patch is used
to eliminate the unsed ID.Cc: Rodrigo Vivi
Cc: Jani Nikula
Cc: Anusha Srivatsa
Cc: Cooper Chiou
Signed-off-by: Lee Shawn C
Signed-off-by: Ville Syrjälä
Link: https://patchwork.freedesktop.org/patch/msgid/20191210150415.10705-1-shawn.c.lee@intel.com
07 Dec, 2019
1 commit
-
Adding the recently added EHL/JSL PCI ids.
BSpec: 29153
Cc: James Ausmus
Cc: Matt Roper
Signed-off-by: José Roberto de Souza
Reviewed-by: Matt Roper
Link: https://patchwork.freedesktop.org/patch/msgid/20191203211308.109703-1-jose.souza@intel.com
16 Aug, 2019
1 commit
-
The BSpec has added three new IDS for CML.
Update the IDs in accordance to the Spec.Cc: Lucas De Marchi
Cc: José Roberto de Souza
Signed-off-by: Anusha Srivatsa
Reviewed-by: Anshuman Gupta
Link: https://patchwork.freedesktop.org/patch/msgid/20190812222737.29356-1-anusha.srivatsa@intel.com
12 Jul, 2019
1 commit
-
Current list of PCI IDs for Tiger Lake.
Cc: Rodrigo Vivi
Signed-off-by: Lucas De Marchi
Reviewed-by: Rodrigo Vivi
Reviewed-by: Mika Kahola
Link: https://patchwork.freedesktop.org/patch/msgid/20190711173115.28296-6-lucas.demarchi@intel.com
26 Jun, 2019
1 commit
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We are missing PCI device ID for SKU ICLLP U GT 1.5F (0x8A54) as per BSPec.
BSpec: 19092
Signed-off-by: Mika Kahola
Reviewed-by: Clint Taylor
Signed-off-by: Maarten Lankhorst
Link: https://patchwork.freedesktop.org/patch/msgid/20190617082413.22549-1-mika.kahola@intel.com
14 May, 2019
1 commit
-
Add another ICL-Y PCIID that proved to have only 5 ports to the
corresponding PCIID list.Meanwhile I'm trying to get a complete list of all PCIIDs with less than
6 ports and/or get a VBT fix to mark these ports non-existent, but until
then the only way is to go one-by-one.This fixes the following error on machines with less than 6 port:
[drm:intel_power_well_enable [i915]] enabling AUX F
------------[ cut here ]------------
WARN_ON(intel_wait_for_register(&dev_priv->uncore, regs->driver, (0x1 << ((pw_idx) * 2)), (0x1 << ((pw_idx) * 2)), 1))(Internal reference: BSpec/Index/20584/Issues, HSD/1306084116)
Cc: Mika Kahola
References: https://bugs.freedesktop.org/show_bug.cgi?id=108915
Signed-off-by: Imre Deak
Reviewed-by: Mika Kahola
Tested-by: Mika Kahola
Link: https://patchwork.freedesktop.org/patch/msgid/20190510140255.25215-1-imre.deak@intel.com
02 Apr, 2019
2 commits
-
This will enable the following patch to consolidate most device ids into
i915_pciids.h.While cross-referencing the ids listed in i915_drv.h, with the ones listed
in i915_pciids.h, and also the comments in the latter, a bug for bug
approach was used. This means two things:1.
Some ids are only present in i915_drv.h - obviously this means those parts
would not have been probed at all so they were not added to i915_pciids.h2.
Some part type comments in i915_pciids.h were in disagreement with
i915_drv.h. For instance parts labeled as ULT or ULX were not considered
as such in i915_drv.h. The existing behaviour takes precedence here.Signed-off-by: Tvrtko Ursulin
Suggested-by: Jani Nikula
Cc: Jani Nikula
Link: https://patchwork.freedesktop.org/patch/msgid/20190326074057.27833-4-tvrtko.ursulin@linux.intel.com
Reviewed-by: Chris Wilson -
This allows the IS_PINEVIEW_ macros to be removed and avoid
duplication of device ids already defined in i915_pciids.h.!IS_MOBILE check can be used in place of existing IS_PINEVIEW_G call
sites.Signed-off-by: Tvrtko Ursulin
Suggested-by: Ville Syrjälä
Cc: Ville Syrjälä
Cc: Chris Wilson
Reviewed-by: Chris Wilson
Link: https://patchwork.freedesktop.org/patch/msgid/20190326074057.27833-2-tvrtko.ursulin@linux.intel.com
23 Mar, 2019
1 commit
-
Add known EHL PCI IDs.
v2 (Rodrigo): Removed x86 early quirk. To be sent in a separated
patch cc'ing the appropriated list and maintainers for
proper ack.
v3: (Rodrigo): - Removed .num_pipes = 3 that is coming since GEN&_FEATURES.
- Added ppgtt type and size after rework from Bob and Chris
v4: (Rodrigo): - remove ppgtt type added on v3. Jose pointed it is not
needed.Cc: Bob Paauwe
Cc: Chris Wilson
Cc: José Roberto de Souza
Signed-off-by: James Ausmus
Signed-off-by: Rodrigo Vivi
Reviewed-by: Bob Paauwe
Reviewed-by: José Roberto de Souza
Link: https://patchwork.freedesktop.org/patch/msgid/20190322175847.25707-1-rodrigo.vivi@intel.com
20 Mar, 2019
1 commit
-
Comet Lake is a Intel Processor containing Gen9
Intel HD Graphics. This patch adds the initial set of
PCI IDs. Comet Lake comes off of Coffee Lake - adding
the IDs to Coffee Lake ID list.More support and features will be in the patches that follow.
v2: Split IDs according to GT. (Rodrigo)
v3: Update IDs.
Cc: Rodrigo Vivi
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Rodrigo Vivi
Link: https://patchwork.freedesktop.org/patch/msgid/20190318200133.9666-1-anusha.srivatsa@intel.com
13 Mar, 2019
1 commit
-
A new PCI ID for ICL was added to BSpec, lets keep it in tight sync
as ICL is not protected by the alpha support flag anymore.v2: Keeping BSpec order(Rodrigo)
BSepc: 21141
Reviewed-by: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
Link: https://patchwork.freedesktop.org/patch/msgid/20190308215646.30436-1-jose.souza@intel.com
01 Feb, 2019
1 commit
-
While cross checking PCI IDs from Intel Media SDK
and kernel Dmitry noticed this gap. So we checked the
spec and this new ID had been recently added.v2: Adding new H_GT1 entry to i915_pci.c (Jose)
Reported-by: Dmitry Rogozhkin
Cc: Dmitry Rogozhkin
Cc: José Roberto de Souza
Signed-off-by: Rodrigo Vivi
Reviewed-by: José Roberto de Souza
Link: https://patchwork.freedesktop.org/patch/msgid/20190201235049.27206-1-rodrigo.vivi@intel.com
23 Jan, 2019
1 commit
-
We just got aware that there was more IDs available
at spec, so let's add them already.Cc: James Ausmus
Cc: José Roberto de Souza
Signed-off-by: Rodrigo Vivi
Reviewed-by: Mika Kuoppala
Reviewed-by: José Roberto de Souza
Signed-off-by: Mika Kuoppala
Link: https://patchwork.freedesktop.org/patch/msgid/20190118055943.10252-1-rodrigo.vivi@intel.com
12 Oct, 2018
1 commit
-
This new AML PCI ID uses the same gen graphics as Coffe Lake not a
Kaby Lake one like the other AMLs.So to make it more explicit renaming INTEL_AML_GT2_IDS to
INTEL_AML_KBL_GT2_IDS and naming this id as INTEL_AML_CFL_GT2_IDS.v2:
- missed add new AML macro to INTEL_CFL_IDS()
- added derivated platform initials to AML macrosReviewed-by: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
Signed-off-by: Rodrigo Vivi
Link: https://patchwork.freedesktop.org/patch/msgid/20180927010650.22731-1-jose.souza@intel.com
06 Oct, 2018
1 commit
-
commit 'b9be78531d27 ("drm/i915/whl: Introducing
Whiskey Lake platform")' introduced WHL by moving some
of CFL IDs here and using the Spec information of "U43" for
most of IDs what appeared to be GT3.However when propagating the change to Mesa, Lionel noticed
that based on number of execution unities the classification
here seems at least strange.So, let's move for now with the information we trust more:
the number of EUs. So we are able to propagate this change
across the stack without getting stuck forever.Reference: https://patchwork.freedesktop.org/patch/246695/
Fixes: b9be78531d27 ("drm/i915/whl: Introducing Whiskey Lake platform")
Cc: Lionel Landwerlin
Cc: José Roberto de Souza
Cc: David Airlie
Signed-off-by: Rodrigo Vivi
Reviewed-by: José Roberto de Souza
Link: https://patchwork.freedesktop.org/patch/msgid/20180924234312.15017-1-rodrigo.vivi@intel.com
09 Aug, 2018
1 commit
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One more CFL ID added to spec.
Cc: José Roberto de Souza
Signed-off-by: Rodrigo Vivi
Reviewed-by: José Roberto de Souza
Link: https://patchwork.freedesktop.org/patch/msgid/20180803232721.20038-1-rodrigo.vivi@intel.com
19 Jun, 2018
2 commits
-
Amber Lake uses the same gen graphics as Kaby Lake, including a id
that were previously marked as reserved on Kaby Lake, but that
now is moved to AML page.So, let's just move it to AML macro that will feed into KBL macro
just to keep it better organized to make easier future code review
but it will be handled as a KBL.Reviewed-by: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
Signed-off-by: Rodrigo Vivi
Link: https://patchwork.freedesktop.org/patch/msgid/20180614233720.30517-2-jose.souza@intel.com -
Whiskey Lake uses the same gen graphics as Coffe Lake, including some
ids that were previously marked as reserved on Coffe Lake, but that
now are moved to WHL page.So, let's just move them to WHL macros that will feed into CFL macro
just to keep it better organized to make easier future code review
but it will be handled as a CFL.v2:
Fixing GT level of some idsCc: Rodrigo Vivi
Signed-off-by: José Roberto de Souza
Reviewed-by: Rodrigo Vivi
Signed-off-by: Rodrigo Vivi
Link: https://patchwork.freedesktop.org/patch/msgid/20180614233720.30517-1-jose.souza@intel.com
24 Apr, 2018
1 commit
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Adding a missing GT2 sku discovered off hardware.
Signed-off-by: Matt Atwood
Reviewed-by: Clint Taylor
Signed-off-by: Rodrigo Vivi
Link: https://patchwork.freedesktop.org/patch/msgid/1524522483-19987-1-git-send-email-matthew.s.atwood@intel.com
22 Feb, 2018
1 commit
-
This is the current PCI ID list in our documentation.
Let's leave the _gt#_ part out for now since our current documentation
is not 100% clear and we don't need this info now anyway.v2: Use the new ICL_11 naming (Kelvin Gardiner).
v3: Latest IDs as per BSpec (Oscar).
v4: Make it compile (Paulo).
v5: Remove comments (Lucas).
v6: Multile rebases (Paulo).
v7: Rebase (Mika)Reviewed-by: Anuj Phogat (v1)
Signed-off-by: Paulo Zanoni
Signed-off-by: Oscar Mateo
Signed-off-by: Lucas De Marchi
Signed-off-by: Rodrigo Vivi
Signed-off-by: Mika Kuoppala
Reviewed-by: Michel Thierry
Link: https://patchwork.freedesktop.org/patch/msgid/20180220153755.13509-1-mika.kuoppala@linux.intel.com
15 Feb, 2018
1 commit
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Add one missing PCI ID and sort them in a way
that gets easier to review and compare against spec's
table.When trying to sync libdrm and mesa id list with kernel
and spec I noticed something was wrong and we were missing
a pci id. So to make our lives easier when checking against
spec let's simplify and sort like spec does.BSpec: 13621
Cc: Lucas De Marchi
Cc: James Ausmus
Signed-off-by: Rodrigo Vivi
Reviewed-by: James Ausmus
Link: https://patchwork.freedesktop.org/patch/msgid/20180208073219.27860-1-rodrigo.vivi@intel.com
31 Jan, 2018
1 commit
-
The only difference is that this SKUs has the full
Port A/E split named as Port F.But since SKUs differences don't matter on the platform
definition group and ids, let's merge all off them together.v2: Really include the PCI IDs to the picidlist[];
v3: Add the PCI Id for another SKU (Anusha).
v4: Update IDs, really include to pciidlists again.
v5: Unify all GT2 IDs.
v6: Unify in a way that we don't break early-quirks.c
v7: Remove GT reference since it doesn't matter here (Paulo)
Also move IS_CNL_WITH_PORT_F macro to this patch to
make it easier for review this part and also to get
used sooner.
v8: Rebased on top of commit 5db47e37b387 ("Revert "drm/i915:
mark all device info struct with __initconst"")Cc: Dhinakaran Pandiyan
Cc: Paulo Zanoni
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Signed-off-by: Rodrigo Vivi
Reviewed-by: Paulo Zanoni
Link: https://patchwork.freedesktop.org/patch/msgid/20180129232223.766-1-rodrigo.vivi@intel.com
21 Dec, 2017
1 commit
-
Spec has been updated with more reserved IDs for existent SKUs.
Cc: Lucas De Marchi
Cc: Anusha Srivatsa
Cc: Dhinakaran Pandiyan
Cc: Anuj Phogat
Signed-off-by: Rodrigo Vivi
Reviewed-by: Anusha Srivatsa
Link: https://patchwork.freedesktop.org/patch/msgid/20171220182919.21108-1-rodrigo.vivi@intel.com
16 Dec, 2017
1 commit
-
CFL was missing from intel_early_ids[]. The PCI ID needs to be there to
allow the memory region to be stolen, otherwise we could have RAM being
arbitrarily overwritten if for example we keep using the UEFI framebuffer,
depending on how BIOS has set up the e820 map.Fixes: b056f8f3d6b9 ("drm/i915/cfl: Add Coffee Lake PCI IDs for S Skus.")
Signed-off-by: Lucas De Marchi
Cc: Rodrigo Vivi
Cc: Anusha Srivatsa
Cc: Jani Nikula
Cc: Joonas Lahtinen
Cc: David Airlie
Cc: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Cc: Ingo Molnar
Cc: H. Peter Anvin
Cc: Thomas Gleixner
Cc: x86@kernel.org
Cc: # v4.13+ 0890540e21cf drm/i915: add GT number to intel_device_info
Cc: # v4.13+ 41693fd52373 drm/i915/kbl: Change a KBL pci id to GT2 from GT1.5
Cc: # v4.13+
Reviewed-by: Rodrigo Vivi
Acked-by: Jani Nikula
Acked-by: Ingo Molnar
Signed-off-by: Rodrigo Vivi
Link: https://patchwork.freedesktop.org/patch/msgid/20171213200425.2954-1-lucas.demarchi@intel.com
21 Sep, 2017
1 commit
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See Mesa commit 9c588ff
Cc: Matt Turner
Cc: Rodrigo Vivi
Signed-off-by: Anuj Phogat
Reviewed-by: Rodrigo Vivi
Signed-off-by: Rodrigo Vivi
Link: https://patchwork.freedesktop.org/patch/msgid/20170920203126.1323-1-anuj.phogat@gmail.com
01 Sep, 2017
1 commit
-
Up to Coffeelake we could deduce this GT number from the device ID.
This doesn't seem to be the case anymore. This change reorders pciids
per GT and adds a gt field to intel_device_info. We set this field on
the following platforms :- SNB/IVB/HSW/BDW/SKL/KBL/CFL/CNL
Before & After :
$ modinfo drivers/gpu/drm/i915/i915.ko | grep ^alias | wc -l
209v2: Add SNB & IVB (Chris)
v3: Fix compilation error in early-quirks (Lionel)
v4: Fix inconsistency between FEATURE/PLATFORM macros (Ville)
Signed-off-by: Lionel Landwerlin
Reviewed-by: Chris Wilson
Link: https://patchwork.freedesktop.org/patch/msgid/20170830161208.29221-2-lionel.g.landwerlin@intel.com
10 Jun, 2017
3 commits
-
Add PCI Ids for U Skus of Coffeelake.
v2: Use intel_coffeelake_gt3_info, in accordance to-
Rodrigo's patch:v3: rebased
v3: Remove unused INTEL_CFL_IDS(Rodrigo).
Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Rodrigo Vivi
Signed-off-by: Rodrigo Vivi
Link: http://patchwork.freedesktop.org/patch/msgid/1496965267-21725-3-git-send-email-anusha.srivatsa@intel.com -
Add PCI Ids for H Sku by following the BSpec.
v2: Remove unused INTEL_CFL_IDS.(Rodrigo).
v3: Add missing IDs(Rodrigo)Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Rodrigo Vivi
Signed-off-by: Rodrigo Vivi
Link: http://patchwork.freedesktop.org/patch/msgid/1496965267-21725-2-git-send-email-anusha.srivatsa@intel.com -
Add PCI Ids for S Sku following the BSpec.
v2: Remove the unused INTEL_CFL_IDS.(Rodrigo)
v3: Add missing IDs(Rodrigo)Cc: Rodrigo Vivi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Rodrigo Vivi
Signed-off-by: Rodrigo Vivi
Link: http://patchwork.freedesktop.org/patch/msgid/1496965267-21725-1-git-send-email-anusha.srivatsa@intel.com
07 Jun, 2017
2 commits
-
By the Spec all CNL Y skus are 2+2, i.e. GT2.
v2: Really include the PCI IDs to the picidlist[];
Reviewed-by: Anusha Srivatsa
Signed-off-by: Rodrigo Vivi
Link: http://patchwork.freedesktop.org/patch/msgid/1496781040-20888-4-git-send-email-rodrigo.vivi@intel.com -
Platform enabling and its power-on are organized in different
skus (U x Y x S x H, etc). So instead of organizing it in
GT1 x GT2 x GT3 let's also use the platform sku.This is also the new Spec style what makes the review much
more easy and straightforward.v2: Really include the PCI IDs to the picidlist[];
v3: Remove PCI IDs not present in spec.
v4: Rebase.Signed-off-by: Anusha Srivatsa
Signed-off-by: Rodrigo Vivi
Reviewed-by: Clinton Taylor
Link: http://patchwork.freedesktop.org/patch/msgid/1496781040-20888-3-git-send-email-rodrigo.vivi@intel.com
18 Mar, 2017
1 commit
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To improve our historical record and to simplify userspace that wants to
include i915_pciids.h as its canonical breakdown of PCI IDs and their
respective generations, include the gen1 ids for i810 and i815.Signed-off-by: Chris Wilson
Link: http://patchwork.freedesktop.org/patch/msgid/20170313112810.4202-1-chris@chris-wilson.co.uk
Acked-by: Jani Nikula
27 Feb, 2017
1 commit
-
Used by production device:
Intel(R) Iris(TM) Graphics P555Cc:
Cc: Mika Kuoppala
Cc: Rodrigo Vivi
Signed-off-by: Michał Winiarski
Reviewed-by: Rodrigo Vivi
Reviewed-by: Mika Kuoppala
Signed-off-by: Mika Kuoppala
Link: http://patchwork.freedesktop.org/patch/msgid/20170227112256.20060-1-michal.winiarski@intel.com
