12 Jan, 2019

4 commits

  • A feature has been added in the libahci driver: the possibility to set
    a new flag in hpriv->flags to let the core handle PHY suspend/resume
    automatically. Make use of this feature to make suspend to RAM work
    with SATA drives on A3700.

    Signed-off-by: Miquel Raynal
    Signed-off-by: Jens Axboe

    Miquel Raynal
     
  • A3700 comphy initialization is done in the firmware (TF-A). Looking at
    the SATA PHY initialization routine, there is a comment about "vendor
    specific" registers. Two registers are mentioned. They are not
    initialized there in the firmware because they are AHCI related, while
    the firmware at this location does only PHY configuration. The
    solution to avoid doing such initialization is relying on U-Boot.

    While this work at boot time, U-Boot is definitely not going to run
    during a resume after suspending to RAM.

    Two possible solutions were considered:
    * Fixing the firmware.
    * Fixing the kernel driver.

    The first solution would take ages to propagate, while the second
    solution is easy to implement as the driver as been a little bit
    reworked to prepare for such platform configuration. Hence, this patch
    adds an Armada 3700 configuration function to set these two registers
    both at boot time (in the probe) and after a suspend (in the resume
    path).

    Signed-off-by: Miquel Raynal
    Signed-off-by: Jens Axboe

    Miquel Raynal
     
  • At the beginning, only Armada 38x SoCs where supported by the
    ahci_mvebu.c driver. Commit 15d3ce7b63bd ("ata: ahci_mvebu: add
    support for Armada 3700 variant") introduced Armada 3700 support. As
    opposed to Armada 38x SoCs, the 3700 variants do not have to configure
    mbus and the regret option. This patch took care of avoiding such
    configuration when not needed in the probe function, but failed to do
    the same in the resume path. While doing so looks harmless by
    experience, let's clean the driver logic and avoid doing this useless
    configuration with Armada 3700 SoCs.

    Because the logic is very similar between these two places, it has
    been decided to factorize this code and put it in a "Armada 38x
    configuration function". This function is part of a new
    (per-compatible) platform data structure, so that the addition of such
    configuration function for Armada 3700 will be eased.

    Fixes: 15d3ce7b63bd ("ata: ahci_mvebu: add support for Armada 3700 variant")
    Signed-off-by: Miquel Raynal
    Signed-off-by: Jens Axboe

    Miquel Raynal
     
  • For Armada-38x (32-bit) SoCs, PM platform support has been added since:
    commit 32f9494c9dfd ("ARM: mvebu: prepare pm-board.c for the
    introduction of Armada 38x support")
    commit 3cbd6a6ca81c ("ARM: mvebu: Add standby support")

    For Armada 64-bit SoCs, like the A3700 also using this AHCI driver, PM
    platform support has always existed.

    There are even suspend/resume hooks in this driver since:
    commit d6ecf15814888 ("ata: ahci_mvebu: add suspend/resume support")

    Remove the stale comment at the end of this driver stating that all
    the above does not exist yet.

    Fixes: d6ecf15814888 ("ata: ahci_mvebu: add suspend/resume support")
    Signed-off-by: Miquel Raynal
    Signed-off-by: Jens Axboe

    Miquel Raynal
     

25 Aug, 2018

1 commit

  • Pull libata updates from Tejun Heo:
    "Nothing too interesting. Mostly ahci and ahci_platform changes, many
    around power management"

    * 'for-4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (22 commits)
    ata: ahci_platform: enable to get and control reset
    ata: libahci_platform: add reset control support
    ata: add an extra argument to ahci_platform_get_resources()
    ata: sata_rcar: Add r8a77965 support
    ata: sata_rcar: exclude setting of PHY registers in Gen3
    ata: sata_rcar: really mask all interrupts on Gen2 and later
    Revert "ata: ahci_platform: allow disabling of hotplug to save power"
    ata: libahci: Allow reconfigure of DEVSLP register
    ata: libahci: Correct setting of DEVSLP register
    ata: ahci: Enable DEVSLP by default on x86 with SLP_S0
    ata: ahci: Support state with min power but Partial low power state
    Revert "ata: ahci_platform: convert kcalloc to devm_kcalloc"
    ata: sata_rcar: Add rudimentary Runtime PM support
    ata: sata_rcar: Provide a short-hand for &pdev->dev
    ata: Only output sg element mapped number in verbose debug
    ata: Guard ata_scsi_dump_cdb() by ATA_VERBOSE_DEBUG
    ata: ahci_platform: convert kcalloc to devm_kcalloc
    ata: ahci_platform: convert kzallloc to kcalloc
    ata: ahci_platform: correct parameter documentation for ahci_platform_shutdown
    libata: remove ata_sff_data_xfer_noirq()
    ...

    Linus Torvalds
     

22 Aug, 2018

1 commit

  • Add an extra argument to ahci_platform_get_resources(), that is
    for the bitmap representing the resource to get in this function.

    Currently there is no resources to be defined, so all the callers set
    '0' to the argument.

    Suggested-by: Hans de Goede
    Cc: Thierry Reding
    Cc: Matthias Brugger
    Cc: Patrice Chotard
    Cc: Maxime Ripard
    Signed-off-by: Kunihiko Hayashi
    Reviewed-by: Hans de Goede
    Signed-off-by: Tejun Heo

    Kunihiko Hayashi
     

19 Jun, 2018

1 commit


27 Apr, 2018

1 commit

  • There is an issue(Errata Ref#226) that the SATA can not be
    detected via SATA Port-MultiPlayer(PMP) with following
    error log:
    ata1.15: PMP product ID mismatch
    ata1.15: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
    ata1.15: Port Multiplier vendor mismatch '0x1b4b'!='0x0'
    ata1.15: PMP revalidation failed (errno=-19)

    After debugging, the reason is found that the value Port-x
    FIS-based Switching Control(PxFBS@0x40) become wrong.
    According to design, the bits[11:8, 0] of register PxFBS
    are cleared when Port Command and Status (0x18) bit[0]
    changes its value from 1 to 0, i.e. falling edge of Port
    Command and Status bit[0] sends PULSE that resets PxFBS
    bits[11:8; 0].
    So it needs a mvebu SATA WA to save the port PxFBS register
    before PxCMD ST write and restore it afterwards.

    This patch implements the WA in a separate function of
    ahci_mvebu_stop_engine to override ahci_stop_gngine.

    Signed-off-by: Evan Wang
    Cc: Ofer Heifetz
    Cc: Tejun Heo
    Cc: Thomas Petazzoni
    Signed-off-by: Tejun Heo

    Evan Wang
     

19 Feb, 2016

1 commit

  • The main difference in the new Armada 3700 is that no address
    decoding needs to take place in the driver probe.

    [gregory.clement@free-electrons.com: reformulate the commit log]

    Signed-off-by: Lior Amsalem
    Reviewed-by: Nadav Haklai
    Tested-by: Nadav Haklai
    Signed-off-by: Gregory CLEMENT
    Signed-off-by: Tejun Heo

    Lior Amsalem
     

21 Nov, 2015

1 commit

  • The newly added suspend/resume implementation for ahci_mvebu causes
    a link error when CONFIG_PM_SLEEP is disabled:

    ERROR: "ahci_platform_suspend_host" [drivers/ata/ahci_mvebu.ko] undefined!
    ERROR: "ahci_platform_resume_host" [drivers/ata/ahci_mvebu.ko] undefined!

    This adds the same #ifdef here that exists in the ahci_platform driver
    which defines the above functions.

    Signed-off-by: Arnd Bergmann
    Fixes: d6ecf1581488 ("ata: ahci_mvebu: add suspend/resume support")
    Acked-by: Thomas Petazzoni
    Signed-off-by: Tejun Heo

    Arnd Bergmann
     

26 Jun, 2015

1 commit

  • Pull libata updates from Tejun Heo:

    - a number of libata core changes to better support NCQ TRIM.

    - ahci now supports MSI-X in single IRQ mode to support a new
    controller which doesn't implement MSI or INTX.

    - ahci now supports edge-triggered IRQ mode to support a new controller
    which for some odd reason did edge-triggered IRQ.

    - the usual controller support additions and changes.

    * 'for-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (27 commits)
    libata: Do not blacklist Micron M500DC
    ata: ahci_mvebu: add suspend/resume support
    ahci, msix: Fix build error for !PCI_MSI
    ahci: Add support for Cavium's ThunderX host controller
    ahci: Add generic MSI-X support for single interrupts to SATA PCI driver
    libata: finally use __initconst in ata_parse_force_one()
    drivers: ata: add support for Ceva sata host controller
    devicetree:bindings: add devicetree bindings for ceva ahci
    ahci: added support for Freescale AHCI sata
    ahci: Store irq number in struct ahci_host_priv
    ahci: Move interrupt enablement code to a separate function
    Doc: libata: Fix spelling typo found in libata.xml
    ata:sata_nv - Change 1 to true for bool type variable.
    ata: add Broadcom AHCI SATA3 driver for STB chips
    Documentation: devicetree: add Broadcom SATA binding
    libata: Fix regression when the NCQ Send and Receive log page is absent
    ata: hpt366: fix constant cast warning
    ata: ahci_xgene: potential NULL dereference in probe
    ata: ahci_xgene: Add AHCI Support for 2nd HW version of APM X-Gene SoC AHCI SATA Host controller.
    libahci: Add support to handle HOST_IRQ_STAT as edge trigger latch.
    ...

    Linus Torvalds
     

18 Jun, 2015

1 commit

  • This commit adds suspend/resume support to the ahci_mvebu driver. The
    suspend hook doesn't do anything special despite calling the generic
    ahci_platform_suspend_host() function. However, the resume hook has to
    restore the MBus windows configuration, as well as the regret option.

    Tested on Marvell Armada 388 GP.

    Signed-off-by: Thomas Petazzoni
    Signed-off-by: Tejun Heo

    Thomas Petazzoni
     

27 May, 2015

1 commit

  • According to the Armada 38x datasheet, the window base address
    registers value is set in bits [31:4] of the register and corresponds
    to the transaction address bits [47:20].

    Therefore, the 32bit base address value should be shifted right by
    20bits and left by 4bits, resulting in 16 bit shift right.

    The bug as not been noticed yet because if the memory available on
    the platform is less than 2GB, then the base address is zero.

    [gregory.clement@free-electrons.com: add extra-explanation]

    Fixes: a3464ed2f14 (ata: ahci_mvebu: new driver for Marvell Armada 380
    AHCI interfaces)
    Signed-off-by: Nadav Haklai
    Reviewed-by: Omri Itach
    Signed-off-by: Gregory CLEMENT
    Cc:
    Signed-off-by: Tejun Heo

    Nadav Haklai
     

29 Jan, 2015

1 commit

  • The owner module reference of the ahci platform's scsi_host is
    initialized to libahci_platform's one, because these drivers use a
    scsi_host_template defined in libahci_platform. So these drivers can
    be unloaded even if the scsi device is being accessed.

    This fixes it by pushing the scsi_host_template from libahci_platform
    to all leaf drivers. The scsi_host_template is passed through a new
    argument of ahci_platform_init_host().

    Signed-off-by: Akinobu Mita
    Signed-off-by: Tejun Heo
    Cc: Hans de Goede
    Cc: Christoph Hellwig
    Cc: "James E.J. Bottomley"
    Cc: linux-ide@vger.kernel.org
    Cc: linux-scsi@vger.kernel.org

    Akinobu Mita
     

20 Oct, 2014

1 commit


31 Jul, 2014

1 commit

  • This patch moves force_port_map and mask_port_map into the
    ahci_host_priv structure. This allows to modify them into the AHCI
    framework. This is needed by the new dt bindings representing ports as
    the port_map mask is computed automatically.

    Parameters modifying force_port_map, mask_port_map and flags have been
    removed from the ahci_platform_init_host() function, and inputs in the
    ahci_host_priv structure are now directly filed.

    Signed-off-by: Antoine Ténart
    Signed-off-by: Tejun Heo

    Antoine Ténart
     

15 May, 2014

1 commit


05 May, 2014

1 commit

  • The Marvell Armada 380 SoC includes two AHCI compatible
    interfaces. However, like all DMA-capable Marvell interface, they
    require special handling to configure MBus windows. Therefore, this
    commit adds a new ahci_mvebu driver, which relies on the
    libahci_platform.c code recently introduced.

    Signed-off-by: Thomas Petazzoni
    Acked-by: Jason Cooper
    Signed-off-by: Tejun Heo

    Thomas Petazzoni