25 Oct, 2019

1 commit


23 Oct, 2019

5 commits


13 Aug, 2019

1 commit

  • Synopsys DesignWare core based PCIe controllers in Tegra 194 SoC
    interface with Universal PHY (UPHY) module through a PIPE2UPHY (P2U)
    module. For each PCIe lane of a controller, there is a P2U unit
    instantiated at hardware level. This driver provides support for the
    programming required for each P2U that is going to be used for a PCIe
    controller.

    Signed-off-by: Vidya Sagar
    Signed-off-by: Lorenzo Pieralisi
    Acked-by: Kishon Vijay Abraham I
    Acked-by: Thierry Reding

    Vidya Sagar
     

01 Jul, 2019

1 commit

  • …ishon/linux-phy into usb-next

    Kishon writes:

    phy: for 5.2-rc

    *) Move Tegra124 PLL power supplies to be enabled by xusb-tegra124
    *) Move Tegra210 PLL power supplies to be enabled by xusb-tegra210
    *) Minor fixes: fix memory leaks at error path and addresses coverity.

    Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

    * tag 'phy-for-5.2-rc_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy:
    phy: tegra: xusb: Add Tegra210 PLL power supplies
    phy: tegra: xusb: Add Tegra124 PLL power supplies
    dt-bindings: phy: tegra-xusb: List PLL power supplies
    phy: usb: phy-brcm-usb: Remove sysfs attributes upon driver removal
    phy: renesas: rcar-gen2: Fix memory leak at error paths
    phy: qcom-qusb2: fix missing assignment of ret when calling clk_prepare_enable

    Greg Kroah-Hartman
     

12 Jun, 2019

2 commits


05 Jun, 2019

1 commit

  • Based on 1 normalized pattern(s):

    this program is free software you can redistribute it and or modify
    it under the terms and conditions of the gnu general public license
    version 2 as published by the free software foundation this program
    is distributed in the hope it will be useful but without any
    warranty without even the implied warranty of merchantability or
    fitness for a particular purpose see the gnu general public license
    for more details

    extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

    has been chosen to replace the boilerplate/reference in 263 file(s).

    Signed-off-by: Thomas Gleixner
    Reviewed-by: Allison Randal
    Reviewed-by: Alexios Zavras
    Cc: linux-spdx@vger.kernel.org
    Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     

21 May, 2019

1 commit


17 Apr, 2019

4 commits

  • Add support for the XUSB pad controller found on Tegra186 SoCs. It is
    mostly similar to the same IP found on earlier chips, but the number of
    pads exposed differs, as do the programming sequences.

    Note that the DVDD_PEX, DVDD_PEX_PLL, HVDD_PEX and HVDD_PEX_PLL power
    supplies of the XUSB pad controller require strict power sequencing and
    are therefore controlled by the PMIC on Tegra186.

    Signed-off-by: JC Kuo
    Signed-off-by: Thierry Reding
    [dan.carpenter@oracle.com: Fix testing the wrong variable in probe()]
    Signed-off-by: Dan Carpenter
    [yuehaibing@huawei.com: Make two functions static to fix sparse warning]
    Signed-off-by: YueHaibing
    Signed-off-by: Kishon Vijay Abraham I

    JC Kuo
     
  • Support enabling various supplies needed to provide power to the PLLs
    and logic used to drive the USB, PCI and SATA pads.

    Reviewed-by: JC Kuo
    Signed-off-by: Thierry Reding
    Signed-off-by: Kishon Vijay Abraham I

    Thierry Reding
     
  • The device tree bindings document the "mode" property of "ports"
    subnodes, but the driver was not parsing the property. In preparation
    for adding role switching, parse the property at probe time.

    Based on work by JC Kuo .

    Reviewed-by: JC Kuo
    Signed-off-by: Thierry Reding
    Signed-off-by: Kishon Vijay Abraham I

    Thierry Reding
     
  • Tegra186 USB2 pads and USB3 pads do not have hardware mux for changing
    the pad function. For such "lanes", we can skip the lane mux register
    programming.

    Signed-off-by: JC Kuo
    Signed-off-by: Thierry Reding
    Signed-off-by: Kishon Vijay Abraham I

    JC Kuo
     

25 Sep, 2018

1 commit


21 May, 2018

1 commit


16 Mar, 2018

1 commit

  • The reason why this was originally commented out is no longer clear. The
    UPHY driver for SATA works fine with or without this change. The reset
    value of the XDIGCLK_EN bit is 0, so unless programmed by the bootloader
    this shouldn't make a difference anyway.

    Define a macro for this bit and uncomment the code. This also fixes a
    coverity issue brought to my attention by Rohith because not only is the
    XDIGCLK_EN field modification commented out, but also the register write
    which causes none of the earlier modifications of the register value to
    be written to the register and the value being overwritten.

    Reported-by: Rohith Seelaboyina
    Signed-off-by: Thierry Reding
    Signed-off-by: Kishon Vijay Abraham I

    Thierry Reding
     

21 Feb, 2018

1 commit


15 Dec, 2017

1 commit

  • Fix child-node lookups during probe, which ended up searching the whole
    device tree depth-first starting at the parents rather than just
    matching on their children.

    To make things worse, some parent nodes could end up being being
    prematurely freed (by tegra_xusb_pad_register()) as
    of_find_node_by_name() drops a reference to its first argument.

    Fixes: 53d2a715c240 ("phy: Add Tegra XUSB pad controller support")
    Cc: stable # 4.7
    Cc: Thierry Reding
    Signed-off-by: Johan Hovold
    Signed-off-by: Kishon Vijay Abraham I

    Johan Hovold
     

26 Sep, 2017

1 commit


18 Nov, 2016

2 commits


10 Sep, 2016

2 commits

  • We get 1 warning when building kernel with W=1:
    drivers/phy/tegra/xusb.c:104:5: warning: no previous prototype for 'tegra_xusb_lane_lookup_function' [-Wmissing-prototypes]

    In fact, this function is only used in the file in which it is
    declared and don't need a declaration, but can be made static.
    So this patch marks it 'static'.

    Signed-off-by: Baoyou Xie
    Acked-by: Arnd Bergmann
    Acked-by: Thierry Reding
    Signed-off-by: Kishon Vijay Abraham I

    Baoyou Xie
     
  • We get 5 warnings when building kernel with W=1:
    drivers/phy/tegra/xusb.c:948:27: warning: no previous prototype for 'tegra_xusb_padctl_get' [-Wmissing-prototypes]
    drivers/phy/tegra/xusb.c:981:6: warning: no previous prototype for 'tegra_xusb_padctl_put' [-Wmissing-prototypes]
    drivers/phy/tegra/xusb.c:988:5: warning: no previous prototype for 'tegra_xusb_padctl_usb3_save_context' [-Wmissing-prototypes]
    drivers/phy/tegra/xusb.c:998:5: warning: no previous prototype for 'tegra_xusb_padctl_hsic_set_idle' [-Wmissing-prototypes]
    drivers/phy/tegra/xusb.c:1008:5: warning: no previous prototype for 'tegra_xusb_padctl_usb3_set_lfps_detect' [-Wmissing-prototypes]

    In fact, these functions are declared in linux/phy/tegra/xusb.h,
    so this patch adds missing header dependencies.

    Signed-off-by: Baoyou Xie
    Acked-by: Arnd Bergmann
    Acked-by: Thierry Reding
    Signed-off-by: Kishon Vijay Abraham I

    Baoyou Xie
     

29 Apr, 2016

2 commits

  • Add support for the XUSB pad controller found on Tegra210 SoCs. The
    hardware is roughly the same, but some of the registers have been moved
    around and the number and type of supported pads has changed.

    Signed-off-by: Thierry Reding

    Thierry Reding
     
  • Add a new driver for the XUSB pad controller found on NVIDIA Tegra SoCs.
    This hardware block used to be exposed as a pin controller, but it turns
    out that this isn't a good fit. The new driver and DT binding much more
    accurately describe the hardware and are more flexible in supporting new
    SoC generations.

    Acked-by: Kishon Vijay Abraham I
    Signed-off-by: Thierry Reding

    Thierry Reding