10 Aug, 2010

1 commit


04 Aug, 2010

1 commit

  • * 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (291 commits)
    ARM: AMBA: Add pclk support to AMBA bus infrastructure
    ARM: 6278/2: fix regression in RealView after the introduction of pclk
    ARM: 6277/1: mach-shmobile: Allow users to select HZ, default to 128
    ARM: 6276/1: mach-shmobile: remove duplicate NR_IRQS_LEGACY
    ARM: 6246/1: mmci: support larger MMCIDATALENGTH register
    ARM: 6245/1: mmci: enable hardware flow control on Ux500 variants
    ARM: 6244/1: mmci: add variant data and default MCICLOCK support
    ARM: 6243/1: mmci: pass power_mode to the translate_vdd callback
    ARM: 6274/1: add global control registers definition header file for nuc900
    mx2_camera: fix type of dma buffer virtual address pointer
    mx2_camera: Add soc_camera support for i.MX25/i.MX27
    arm/imx/gpio: add spinlock protection
    ARM: Add support for the LPC32XX arch
    ARM: LPC32XX: Arch config menu supoport and makefiles
    ARM: LPC32XX: Phytec 3250 platform support
    ARM: LPC32XX: Misc support functions
    ARM: LPC32XX: Serial support code
    ARM: LPC32XX: System suspend support
    ARM: LPC32XX: GPIO, timer, and IRQ drivers
    ARM: LPC32XX: Clock driver
    ...

    Linus Torvalds
     

31 Jul, 2010

9 commits


30 Jul, 2010

4 commits


29 Jul, 2010

12 commits


28 Jul, 2010

5 commits

  • Per the da850/omap-l138 Beta EVM SOM schematic, the DEFDCDC2 and
    DEFDCDC3 lines are tied high. This leads to a 3.3V IO and 1.2V CVDD
    voltage.

    Pass the right platform data to the TPS6507x driver so it can operate
    on the DEFDCDC{2,3}_HIGH register to read and change voltage levels.

    Signed-off-by: Sekhar Nori
    Acked-by: Mark Brown
    Signed-off-by: Liam Girdwood

    Sekhar Nori
     
  • This is the soc_camera support developed by Sascha Hauer for the i.MX27. Alan
    Carvalho de Assis modified the original driver to get it working on more recent
    kernels. I modified it further to add support for i.MX25. This driver has been
    tested on i.MX25 and i.MX27 based platforms.

    Signed-off-by: Baruch Siach
    Acked-by: Guennadi Liakhovetski
    Signed-off-by: Sascha Hauer

    Baruch Siach
     
  • The GPIO registers need protection from concurrent access for operations that
    are not atomic.

    Cc: stable@kernel.org
    Cc: Juergen Beisert
    Cc: Daniel Mack
    Reported-by: rpkamiak@rockwellcollins.com
    Signed-off-by: Baruch Siach
    Signed-off-by: Sascha Hauer

    Baruch Siach
     
  • The etr events switch-to-local and sync-check disable the synchronous clock
    and schedule a work queue that tries to get the clock back into sync.
    If another switch-to-local or sync-check event occurs while the work queue
    function etr_work_fn still runs the eacr.es bit and the clock_sync_word can
    become inconsistent because check_sync_clock only uses the clock_sync_word
    to determine if the clock is in sync or not. The second pass of the
    etr_work_fn will reset the eacr.es bit but will leave the clock_sync_word
    intact. Fix this race by moving the reset of the eacr.es bit into the
    switch-to-local and sync-check functions and by checking the eacr.es bit
    as well to decide if the clock needs to be synced.

    Signed-off-by: Martin Schwidefsky

    Martin Schwidefsky
     
  • In case user space is single stepped (PER) the program check handler
    claims too early that IRQs are enabled on the return path.
    Subsequent checks will notice that the IRQ mask in the PSW and
    what lockdep thinks the IRQ mask should be do not correlate and
    therefore will print a warning to the console and disable lockdep.

    Fix this by doing all the work within the correct context.

    Signed-off-by: Heiko Carstens
    Signed-off-by: Martin Schwidefsky

    Heiko Carstens
     

27 Jul, 2010

8 commits