25 Oct, 2020
1 commit
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Pull ARM SoC platform updates from Olof Johansson:
"SoC changes, a substantial part of this is cleanup of some of the
older platforms that used to have a bunch of board files.In particular:
- Remove non-DT i.MX platforms that haven't seen activity in years,
it's time to remove them.- A bunch of cleanup and removal of platform data for TI/OMAP
platforms, moving over to genpd for power/reset control (yay!)- Major cleanup of Samsung S3C24xx and S3C64xx platforms, moving them
closer to multiplatform support (not quite there yet, but getting
close).There are a few other changes too, smaller fixlets, etc. For new
platform support, the primary ones are:- New SoC: Hisilicon SD5203, ARM926EJ-S platform.
- Cpufreq support for i.MX7ULP"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (121 commits)
ARM: mstar: Select MStar intc
ARM: stm32: Replace HTTP links with HTTPS ones
ARM: debug: add UART early console support for SD5203
ARM: hisi: add support for SD5203 SoC
ARM: omap3: enable off mode automatically
clk: imx: imx35: Remove mx35_clocks_init()
clk: imx: imx31: Remove mx31_clocks_init()
clk: imx: imx27: Remove mx27_clocks_init()
ARM: imx: Remove unused definitions
ARM: imx35: Retrieve the IIM base address from devicetree
ARM: imx3: Retrieve the AVIC base address from devicetree
ARM: imx3: Retrieve the CCM base address from devicetree
ARM: imx31: Retrieve the IIM base address from devicetree
ARM: imx27: Retrieve the CCM base address from devicetree
ARM: imx27: Retrieve the SYSCTRL base address from devicetree
ARM: s3c64xx: bring back notes from removed debug-macro.S
ARM: s3c24xx: fix Wunused-variable warning on !MMU
ARM: samsung: fix PM debug build with DEBUG_LL but !MMU
MAINTAINERS: mark linux-samsung-soc list non-moderated
ARM: imx: Remove remnant board file support pieces
...
06 Oct, 2020
1 commit
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Merge dma-contiguous.h into dma-map-ops.h, after removing the comment
describing the contiguous allocator into kernel/dma/contigous.c.Signed-off-by: Christoph Hellwig
11 Sep, 2020
1 commit
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As of commit 1e90fea35b80cfe1 ("ARM: shmobile: r8a7791: Use common R-Car
Gen2 machine definition"), there are no more users of
rcar_gen2_timer_init() and rcar_gen2_reserve() outside
arch/arm/mach-shmobile/setup-rcar-gen2.c.Signed-off-by: Geert Uytterhoeven
Reviewed-by: Niklas Söderlund
Link: https://lore.kernel.org/r/20200908074403.4379-1-geert+renesas@glider.be
28 Apr, 2020
1 commit
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Add minimal support for the RZ/G1H (R8A7742) SoC.
Signed-off-by: Lad Prabhakar
Reviewed-by: Marian-Cristian Rotariu
Link: https://lore.kernel.org/r/1587678050-23468-10-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven
17 Feb, 2020
1 commit
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The R-Car Gen2 platform code is not a clock provider, and just needs to
call of_clk_init().Hence it can include instead of .
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Stephen Boyd
Link: https://lore.kernel.org/r/20200212100830.446-6-geert+renesas@glider.be
10 Feb, 2020
1 commit
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SH-Mobile AG5 and R-Car H1 SoCs are based on the Cortex-A9 MPCore, which
includes a global timer.Enable the ARM global timer on these SoCs, which will be used for:
- the scheduler clock, improving scheduler accuracy from 10 ms to 3 or
4 ns,
- delay loops, allowing removal of calls to shmobile_init_delay() from
the corresponding machine vectors.Note that when using an old DTB lacking the global timer, the kernel
will still work. However, loops-per-jiffies will no longer be preset,
and the delay loop will need to be calibrated during boot.Signed-off-by: Geert Uytterhoeven
Link: https://lore.kernel.org/r/20191211135222.26770-5-geert+renesas@glider.be
06 Jan, 2020
1 commit
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ioremap has provided non-cached semantics by default since the Linux 2.6
days, so remove the additional ioremap_nocache interface.Signed-off-by: Christoph Hellwig
Acked-by: Arnd Bergmann
25 Oct, 2019
1 commit
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As of commit 362b334b17943d84 ("ARM: dts: r8a7791: Convert to new
CPG/MSSR bindings"), all upstream R-Car Gen2 device tree source files
use the unified "Renesas Clock Pulse Generator / Module Standby and
Software Reset" DT bindings.Hence remove backward compatibility with old R-Car Gen2 device trees
describing a hierarchical representation of the various CPG and MSTP
clocks.Signed-off-by: Geert Uytterhoeven
Link: https://lore.kernel.org/r/20191016150939.30620-1-geert+renesas@glider.be
31 May, 2019
1 commit
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If PSCI is available then most likely we are running on PSCI-enabled
U-Boot which, we assume, has already taken care of resetting CNTVOFF
and updating counter module before switching to non-secure mode
and we don't need to.As the psci_smp_available() helper always returns false if CONFIG_SMP
is disabled, it can't be used safely as an indicator of PSCI usage.
For that reason, we check for the mandatory PSCI operation to be
available.Please note, an extra check to prevent secure_cntvoff_init() from
being called for secondary CPUs in headsmp-apmu.S is not needed,
as SMP code for APMU based system is not executed if PSCI is in use.Signed-off-by: Oleksandr Tyshchenko
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
18 Mar, 2019
2 commits
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The call to of_get_next_child returns a node pointer with refcount
incremented thus it must be explicitly decremented after the last
usage.Detected by coccinelle with the following warnings:
./arch/arm/mach-shmobile/pm-rcar-gen2.c:77:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 66, but without a corresponding object release within this function.
./arch/arm/mach-shmobile/pm-rcar-gen2.c:85:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 66, but without a corresponding object release within this function.
./arch/arm/mach-shmobile/pm-rcar-gen2.c:90:2-8: ERROR: missing of_node_put; acquired a node pointer with refcount incremented on line 66, but without a corresponding object release within this function.Signed-off-by: Wen Yang
Reviewed-by: Florian Fainelli
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
Porter needs the regulator quirk, just like the other boards.
But unlike the other boards, the Porter uses DA9063L, which
is at 0x5a. Otherwise, DA9063L and DA9210 IRQ line is still
connected to CPU IRQ2 .Signed-off-by: Marek Vasut
Acked-by: Wolfram Sang
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
07 Jan, 2019
1 commit
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The quirk code currently detects all compatible I2C chips with a shared
IRQ line on all I2C busses, adds them into a list, and registers a bus
notifier. For every chip for which the bus notifier triggers, the quirk
code performs I2C transfer on that I2C bus for all addresses in the list.
The problem is that this may generate transfers to non-existing chips on
systems with multiple I2C busses.This patch adds a check to verify that the I2C bus to which the chip with
shared IRQ is attached to matches the I2C bus of the chip which triggered
the bus notifier and only starts the I2C transfer if they match.Signed-off-by: Marek Vasut
Tested-by: Nguyen Viet Dung
Signed-off-by: Simon Horman
30 Nov, 2018
2 commits
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The pm-rmobile driver is really a driver for the System Controller
(SYSC) found in R-Mobile SoCs. An equivalent driver for R-Car SoCs is
already located under drivers/soc/renesas/.Hence move the pm-rmobile driver from arch/arm/mach-shmobile/ to
drivers/soc/renesas/, and rename it to rmobile-sysc.Enable compile-testing on non-ARM and non-R-Mobile SoCs.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
Commit 59b89af1d5551c12 ("ARM: shmobile: sh7372: Remove Legacy C
SoC code") removed the last user of the rmobile_pm_domain.resume()
callback.Commit 44d88c754e57a6d9 ("ARM: shmobile: Remove legacy SoC code
for R-Mobile A1") removed the last user of the rmobile_pm_domain.no_debug
flag and of the "pm-rmobile.h" header file (outside the actual driver).Hence remove no longer used rmobile_pm_domain members, and absorb the
header file into the driver.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
16 Nov, 2018
5 commits
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For consistency with arm64, where vendors have a single Kconfig symbol
in arch/arm64/Kconfig.platforms.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
Unlike all other family-specific Kconfig symbols for Renesas ARM SoCs,
ARCH_RZN1 is user-visible. As this symbol is already selected by the
SoC-specific ARCH_R9A06G032 symbol, there is no need for that.Hide ARCH_RZN1 from the user, and move it up, where all other
family-specific Kconfig symbols live. Drop the select of CPU_V7, as
this is already implied by the dependency of ARCH_RENESAS on
ARCH_MULTI_V7.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
As of commit 9a9863987bf7307f ("ARM: shmobile: Remove legacy SoC code
for SH-Mobile AG5"), this header file is no longer used.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
Currently support for the ARM Timer and Watchdog Unit is included
unconditionally, while only some Renesas multicore Cortex-A9 SoCs have
a TWD.This decreases kernel image size by ca. 2 KiB on SoCs without a TWD.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
Currently support for the ARM Cortex-A9 Snoop Control Unit is included
unconditionally, while only Renesas multicore Cortex-A9 SoCs have this
kind of SCU.This decreases kernel image size by ca. 300 bytes on SoCs without such
an SCU.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
30 Oct, 2018
2 commits
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Pull ARM SoC platform updates from Arnd Bergmann:
"A couple of platforms change hands in the MAINTAINERS file:- Linus Walleij lists himself for the ARM Reference platforms:
versatile, vexpress, integrator and realview. He has been the main
contributor for these for a while, and makes it official now.- Vladimir Zapolskiy takes over the LPC18xx platform from Joachim
Eastwood- Manivannan Sadhasivam becomes a secondary maintainer for the
Actions Semi machines- Nicolas Ferre lists updates the MAINTAINER listing for the AT91
platform: Ludovic Desroches is now a co-maintainer for the
platform, and several other people (Claudiu Beznea, Cristian
Birsan, Eugen Hristev, Codrin Ciubotariu) take over individual
device drivers.Thanks everyone for working on this, and welcome to the new
maintainers!The "virt" platform on qemy or kvm can now be used in big-endian mode
without additional tricks, thanks to Jason Donenfeld.Once again, we gain support for another NXP i.MX6 variant, this time
it's the i.MX 6ULZ 32-bit single-core version.On arm64, we add support for two SoCs from Renesas: RZ/G2E (r8a774c0)
and RZ/G2M (r8a774a1). These are described as microcontrollers on the
manufacturer website, but appear to be rather powerful. The RZ/G2M is
used on the reference board for the CIP Super Long Term Support (SLTS)
Linux Kernels"* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
MAINTAINERS: Assign myself as a maintainer of ARM/LPC18XX architecture
arm64: exynos: Enable generic power domain support
MAINTAINERS: remove non-exsiting email address of Baoyou
MAINTAINERS: fix pattern in ARM/Synaptics berlin SoC section
MAINTAINERS: Drop dt-bindings/genpd/k2g.h
ARM: samsung: Limit SAMSUNG_PM_CHECK config option to non-Exynos platforms
arm64: actions: Enable PINCTRL in platforms Kconfig
MAINTAINERS: Add entry for Actions Semi Owl SoCs DMA driver
MAINTAINERS: Add entry for Actions Semiconductor Owl I2C driver
MAINTAINERS: Update clock binding entry for Actions Semi Owl SoCs
ARM: imx: add i.mx6ulz msl support
ARM: Assume maintainership of ARM reference designs
ARM: support big-endian for the virt architecture
MAINTAINERS: sdhci: move the Microchip entry to proper location
MAINTAINERS: move former ATMEL entries to proper MICROCHIP location
MAINTAINERS: remove the / ATMEL string from MICROCHIP entries
MAINTAINERS: iio: add co-maintainer to SAMA5D2-compatible ADC driver
MAINTAINERS: pwm: add entry for Microchip pwm driver
MAINTAINERS: dmaengine: add files to Microchip dma entry
MAINTAINERS: USB: change maintainer for Microchip USBA gadget driver
... -
Pull ARM SoC driver updates from Arnd Bergmann:
"The most noteworthy SoC driver changes this time include:- The TEE subsystem gains an in-kernel interface to access the TEE
from device drivers.- The reset controller subsystem gains a driver for the Qualcomm
Snapdragon 845 Power Domain Controller.- The Xilinx Zynq platform now has a firmware interface for its
platform management unit. This contains a firmware "ioctl"
interface that was a little controversial at first, but the version
we merged solved that by not exposing arbitrary firmware calls to
user space.- The Amlogic Meson platform gains a "canvas" driver that is used for
video processing and shared between different high-level drivers.The rest is more of the usual, mostly related to SoC specific power
management support and core drivers in drivers/soc:- Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new
features related to power and reset control.- The Mediatek mt8183 and mt6765 SoC platforms gain support for their
respective power management chips.- A new driver for NXP i.MX8, which need a firmware interface for
power management.- The SCPI firmware interface now contains support estimating power
usage of performance states- The NVIDIA Tegra "pmc" driver gains a few new features, in
particular a pinctrl interface for configuring the pads.- Lots of small changes for Qualcomm, in particular the "smem" device
driver.- Some cleanups for the TI OMAP series related to their sysc
controller.Additional cleanups and bugfixes in SoC specific drivers include the
Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms"* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (129 commits)
firmware: tegra: bpmp: Implement suspend/resume support
drivers: clk: Add ZynqMP clock driver
dt-bindings: clock: Add bindings for ZynqMP clock driver
firmware: xilinx: Add zynqmp IOCTL API for device control
Documentation: xilinx: Add documentation for eemi APIs
MAINTAINERS: imx: include drivers/firmware/imx path
firmware: imx: add misc svc support
firmware: imx: add SCU firmware driver support
reset: Fix potential use-after-free in __of_reset_control_get()
dt-bindings: arm: fsl: add scu binding doc
soc: fsl: qbman: add interrupt coalesce changing APIs
soc: fsl: bman_portals: defer probe after bman's probe
soc: fsl: qbman: Use last response to determine valid bit
soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan
soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers
soc: fsl: qbman: Check if CPU is offline when initializing portals
reset: qcom: PDC Global (Power Domain Controller) reset controller
dt-bindings: reset: Add PDC Global binding for SDM845 SoCs
reset: Grammar s/more then once/more than once/
bus: ti-sysc: Just use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS
...
29 Sep, 2018
1 commit
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Use the for_each_of_cpu_node iterator to iterate over cpu nodes. This
has the side effect of defaulting to iterating using "cpu" node names in
preference to the deprecated (for FDT) device_type == "cpu".Cc: Magnus Damm
Cc: Russell King
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Simon Horman
Signed-off-by: Rob Herring
19 Sep, 2018
1 commit
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Rather than hard-coding the quirk topology, which stopped scaling,
parse the information from DT. The code looks for all compatible
PMICs -- da9063 and da9210 -- and checks if their IRQ line is tied
to the same pin. If so, the code sends a matching sequence to the
PMIC to deassert the IRQ.Signed-off-by: Marek Vasut
Acked-by: Wolfram Sang
Tested-by: Geert Uytterhoeven (on Koelsch)
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
17 Sep, 2018
1 commit
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Add minimal support for the RZ/G1N (R8A7744) SoC.
Signed-off-by: Biju Das
Reviewed-by: Fabrizio Castro
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
11 Sep, 2018
1 commit
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This patch updates license to use SPDX-License-Identifier
instead of verbose license text.Signed-off-by: Kuninori Morimoto
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
30 Aug, 2018
2 commits
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In preparation to remove the node name pointer from struct device_node,
convert printf users to use the %pOFn format specifier.Signed-off-by: Rob Herring
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
All drivers for Renesas ARM SoCs have gained proper ARCH_RENESAS
platform dependencies. Hence finish the conversion from ARCH_SHMOBILE
to ARCH_RENESAS for Renesas 32-bit ARM SoCs, as started by commit
9b5ba0df4ea4f940 ("ARM: shmobile: Introduce ARCH_RENESAS").Signed-off-by: Geert Uytterhoeven
Acked-by: Arnd Bergmann
Signed-off-by: Simon Horman
27 Aug, 2018
2 commits
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Add the RZ/A2 SoC to the Renesas SoC collection.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
Presumable unused since commit c99cd90d98a98aa1 ("ARM: shmobile:
r8a7779: Remove legacy SoC code").Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
20 Jul, 2018
2 commits
-
R-Mobile APE6, R-Car Gen2, and RZ/G1 SoCs have Cortex-A7 and/or
Cortex-A15 CPU cores, all of which have ARM architectured timers.Force use of the ARM architectured timer on these SoCs.
This allows to:
- Remove the calls to shmobile_init_delay() from the corresponding
machine vectors,
- Remove a check in timer setup specific to R-Car Gen2,
- Remove a check in shmobile_init_delay().Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
After the cleanup in r8a7779_smp_prepare_cpus(), the only remaining caller of
r8a7779_platform_cpu_kill() is in an ifdef, which leads to a build warning
without CONFIG_HOTPLUG_CPU:arch/arm/mach-shmobile/smp-r8a7779.c:26:12: error: 'r8a7779_platform_cpu_kill' defined but not used [-Werror=unused-function]
This moves the function inside of that #ifdef to avoid the warning.
Fixes: 62f55ce683e3 ("ARM: shmobile: r8a7779: Stop powering down secondary CPUs during early boot")
Signed-off-by: Arnd Bergmann
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
27 Jun, 2018
1 commit
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As of commit cad160ed0a94927e ("ARM: shmobile: Convert file to use
cntvoff"), there's no non-SMP code left in headsmp-apmu.S.Hence build the file for SMP only, and drop the no longer needed check
for CONFIG_SMP inside the file.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
18 Jun, 2018
8 commits
-
Signed-off-by: Wolfram Sang
Acked-by: Yoshihiro Shimoda
Acked-by: Kuninori Morimoto
Signed-off-by: Simon Horman -
If the R-Car H1 system controller is described in DT, the rcar-sysc
driver configures SYSCIER and SYSCIMR based on the SoC-specific power
area definitions in r8a7779-sysc. The platform code still passed this
information to the rcar-sysc driver, for compatibility with old DTBs
predating commit b2df3aa487395a1b ("ARM: dts: r8a7779: Add SYSC PM
Domains") in v4.7. The time has come to drop backwards compatibility,
and delegate everything to the DT enabled rcar-sysc driver.After stopping powering down secondary CPUs during early boot, there is
no longer a need to force an early initialization of the rcar-sysc
driver. It will be initialized in time for secondary CPU bringup by its
early_initcall().Hence all explicit SYSC configuration and initialization can be removed
from the R-Car H1 platform code.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
The r8a7779 SMP code calls rcar_sysc_power_{down,up}() to control power
to the SYSC power areas containing CPUs. This requires passing full CPU
power area parameter blocks.Migrate the code to call the new rcar_sysc_power_{down,up}_cpu()
helpers, which just take a CPU index, and use the SYSC power area
definitions from the r8a7779-sysc driver.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
At .smp_prepare_cpus() time, CPUs 1-3 are still powered down:
- The bootloader doesn't enable CPUs 1-3,
- Non-boot CPUs are disabled by kexec before starting the new kernel.Hence there is no need to try to power them down again, as it will fail
silently with -EIO anyway.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
If the R-Car system controller is described in DT, the rcar-sysc driver
configures SYSCIER and SYSCIMR based on the SoC-specific power area
definitions in r8a779*-sysc. The platform code still passed this
information to the rcar-sysc driver, for compatibility with old R-Car H2
and M2-W DTBs predating commit 8574de861978d518 ("ARM: dts: r8a7791: Add
SYSC PM Domains") in v4.7. The time has come to drop backwards
compatibility, and delegate everything to the DT enabled rcar-sysc
driver.After the removal of the legacy SMP fallbacks, which powered up the SCUs
explicitly, there is no longer a need to force an early initialization
of the rcar-sysc driver. It will be initialized in time for secondary
CPU bringup by its early_initcall().Hence all explicit SYSC configuration and initialization can be removed
from the R-Car Gen2 platform code.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
After the removal of the legacy SMP fallbacks, platsmp-apmu.h is no
longer needed outside platsmp-apmu.c.Hence remove platsmp-apmu.h, and make the functions exported previously
static. As the header file also provided forward declarations, the code
in platsmp-apmu.c must be reshuffled.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
After the removal of the legacy SMP fallbacks, there are no more users
left of shmobile_smp_apmu_prepare_cpus().Remove it, together with the legacy SMP config parser.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman -
cpu_leave_lowpower() is used for suspend only, not for CPU hotplug.
Hence move it from the HOTPLUG_CPU || SUSPEND section to the SUSPEND
section.Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
