22 Aug, 2020
1 commit
-
We want neither
"
include/linux/compiler_attributes.h:201:41: warning: statement will never
be executed [-Wswitch-unreachable]
201 | # define fallthrough __attribute__((__fallthrough__))
| ^~~~~~~~~~~~~
"
nor
"
include/linux/compiler_attributes.h:201:41: warning: attribute
'fallthrough' not preceding a case label or default label
201 | # define fallthrough __attribute__((__fallthrough__))
| ^~~~~~~~~~~~~
"It's not worth adding one more macro. Let's simply place the fallthrough
in between the expansions.Fixes: c9b029903466 ("MIPS: Use fallthrough for arch/mips")
Cc: stable@vger.kernel.org
Signed-off-by: He Zhe
Reviewed-by: Gustavo A. R. Silva
Signed-off-by: Thomas Bogendoerfer
07 May, 2020
1 commit
-
Convert the various /* fallthrough */ comments to the pseudo-keyword
fallthrough;Done via script:
https://lore.kernel.org/lkml/b56602fcf79f849e733e7b521bb0e17895d390fa.1582230379.git.joe@perches.com/Signed-off-by: Liangliang Huang
Reviewed-by: Huacai Chen
Signed-off-by: Thomas Bogendoerfer
28 Apr, 2020
1 commit
-
Fix the following coccicheck warning:
arch/mips/oprofile/common.c:113:2-3: Unneeded semicolon
Signed-off-by: Jason Yan
Signed-off-by: Thomas Bogendoerfer
12 Nov, 2019
1 commit
-
Now old Loongson-2E/2F use LOONGSON2EF and will be removed in future,
newer Loongson-2/3 use LOONGSON64. So rename LOONGSON1 to LOONGSON32
will make the naming style more unified.Signed-off-by: Huacai Chen
[paulburton@kernel.org: Fix checkpatch whitespace warning in irqflags.h]
Signed-off-by: Paul Burton
Cc: Ralf Baechle
Cc: James Hogan
Cc: linux-mips@linux-mips.org
Cc: linux-mips@vger.kernel.org
Cc: Fuxin Zhang
Cc: Zhangjin Wu
Cc: Huacai Chen
01 Nov, 2019
1 commit
-
CPU_LOONGSON2 -> CPU_LOONGSON2EF
CPU_LOONGSON3 -> CPU_LOONGSON64As newer loongson-2 products (2G/2H/2K1000) can share kernel
implementation with loongson-3 while 2E/2F are less similar with
other LOONGSON64 products.Signed-off-by: Jiaxun Yang
Signed-off-by: Paul Burton
Cc: linux-mips@vger.kernel.org
Cc: chenhc@lemote.com
Cc: paul.burton@mips.com
31 Jul, 2019
1 commit
-
Mark switch cases where we are expecting to fall through.
This patch fixes the following warning (Building: mips):
arch/mips/oprofile/op_model_mipsxx.c: In function ‘mipsxx_cpu_stop’:
arch/mips/oprofile/op_model_mipsxx.c:217:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
w_c0_perfctrl3(0);
^~~~~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:218:2: note: here
case 3:
^~~~
arch/mips/oprofile/op_model_mipsxx.c:219:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
w_c0_perfctrl2(0);
^~~~~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:220:2: note: here
case 2:
^~~~
arch/mips/oprofile/op_model_mipsxx.c:221:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
w_c0_perfctrl1(0);
^~~~~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:222:2: note: here
case 1:
^~~~
arch/mips/oprofile/op_model_mipsxx.c: In function ‘mipsxx_cpu_start’:
arch/mips/oprofile/op_model_mipsxx.c:197:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
w_c0_perfctrl3(WHAT | reg.control[3]);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:198:2: note: here
case 3:
^~~~
arch/mips/oprofile/op_model_mipsxx.c:199:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
w_c0_perfctrl2(WHAT | reg.control[2]);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:200:2: note: here
case 2:
^~~~
arch/mips/oprofile/op_model_mipsxx.c:201:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
w_c0_perfctrl1(WHAT | reg.control[1]);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:202:2: note: here
case 1:
^~~~
arch/mips/oprofile/op_model_mipsxx.c: In function ‘reset_counters’:
arch/mips/oprofile/op_model_mipsxx.c:299:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
w_c0_perfcntr3(0);
^~~~~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:300:2: note: here
case 3:
^~~~
arch/mips/oprofile/op_model_mipsxx.c:302:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
w_c0_perfcntr2(0);
^~~~~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:303:2: note: here
case 2:
^~~~
arch/mips/oprofile/op_model_mipsxx.c:305:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
w_c0_perfcntr1(0);
^~~~~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:306:2: note: here
case 1:
^~~~
arch/mips/oprofile/op_model_mipsxx.c: In function ‘mipsxx_perfcount_handler’:
arch/mips/oprofile/op_model_mipsxx.c:242:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
if ((control & MIPS_PERFCTRL_IE) && \
^
arch/mips/oprofile/op_model_mipsxx.c:248:2: note: in expansion of macro ‘HANDLE_COUNTER’
HANDLE_COUNTER(3)
^~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:239:2: note: here
case n + 1: \
^
arch/mips/oprofile/op_model_mipsxx.c:249:2: note: in expansion of macro ‘HANDLE_COUNTER’
HANDLE_COUNTER(2)
^~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:242:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
if ((control & MIPS_PERFCTRL_IE) && \
^
arch/mips/oprofile/op_model_mipsxx.c:249:2: note: in expansion of macro ‘HANDLE_COUNTER’
HANDLE_COUNTER(2)
^~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:239:2: note: here
case n + 1: \
^
arch/mips/oprofile/op_model_mipsxx.c:250:2: note: in expansion of macro ‘HANDLE_COUNTER’
HANDLE_COUNTER(1)
^~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:242:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
if ((control & MIPS_PERFCTRL_IE) && \
^
arch/mips/oprofile/op_model_mipsxx.c:250:2: note: in expansion of macro ‘HANDLE_COUNTER’
HANDLE_COUNTER(1)
^~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:239:2: note: here
case n + 1: \
^
arch/mips/oprofile/op_model_mipsxx.c:251:2: note: in expansion of macro ‘HANDLE_COUNTER’
HANDLE_COUNTER(0)
^~~~~~~~~~~~~~
CC usr/include/linux/pmu.h.s
arch/mips/oprofile/op_model_mipsxx.c: In function ‘mipsxx_cpu_setup’:
arch/mips/oprofile/op_model_mipsxx.c:174:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
w_c0_perfcntr3(reg.counter[3]);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:175:2: note: here
case 3:
^~~~
arch/mips/oprofile/op_model_mipsxx.c:177:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
w_c0_perfcntr2(reg.counter[2]);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:178:2: note: here
case 2:
^~~~
arch/mips/oprofile/op_model_mipsxx.c:180:3: warning: this statement may fall through [-Wimplicit-fallthrough=]
w_c0_perfcntr1(reg.counter[1]);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
arch/mips/oprofile/op_model_mipsxx.c:181:2: note: here
case 1:
^~~~Signed-off-by: Gustavo A. R. Silva
Signed-off-by: Paul Burton
Cc: Robert Richter
Cc: Ralf Baechle
Cc: James Hogan
Cc: oprofile-list@lists.sf.net
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: Kees Cook
04 Jan, 2019
1 commit
-
Nobody has actually used the type (VERIFY_READ vs VERIFY_WRITE) argument
of the user address range verification function since we got rid of the
old racy i386-only code to walk page tables by hand.It existed because the original 80386 would not honor the write protect
bit when in kernel mode, so you had to do COW by hand before doing any
user access. But we haven't supported that in a long time, and these
days the 'type' argument is a purely historical artifact.A discussion about extending 'user_access_begin()' to do the range
checking resulted this patch, because there is no way we're going to
move the old VERIFY_xyz interface to that model. And it's best done at
the end of the merge window when I've done most of my merges, so let's
just get this done once and for all.This patch was mostly done with a sed-script, with manual fix-ups for
the cases that weren't of the trivial 'access_ok(VERIFY_xyz' form.There were a couple of notable cases:
- csky still had the old "verify_area()" name as an alias.
- the iter_iov code had magical hardcoded knowledge of the actual
values of VERIFY_{READ,WRITE} (not that they mattered, since nothing
really used it)- microblaze used the type argument for a debug printout
but other than those oddities this should be a total no-op patch.
I tried to fix up all architectures, did fairly extensive grepping for
access_ok() uses, and the changes are trivial, but I may have missed
something. Any missed conversion should be trivially fixable, though.Signed-off-by: Linus Torvalds
15 May, 2018
1 commit
-
The presence of per TC performance counters is now detected by
cpu-probe.c and indicated by MIPS_CPU_MT_PER_TC_PERF_COUNTERS in
cpu_data. Switch detection of the feature to use this new flag rather
than blindly testing the implementation specific config7 register with a
magic number.Signed-off-by: Matt Redfearn
Cc: Ralf Baechle
Cc: Florian Fainelli
Cc: Maciej W. Rozycki
Cc: Paul Burton
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Alexander Shishkin
Cc: Jiri Olsa
Cc: Namhyung Kim
Cc: Robert Richter
Cc: linux-mips@linux-mips.org
Cc: oprofile-list@lists.sf.net
Patchwork: https://patchwork.linux-mips.org/patch/19142/
Signed-off-by: James Hogan
02 Nov, 2017
1 commit
-
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.By default all files without license information are under the default
license of the kernel, which is GPL version 2.Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if
Reviewed-by: Philippe Ombredanne
Reviewed-by: Thomas Gleixner
Signed-off-by: Greg Kroah-Hartman
30 Aug, 2017
1 commit
-
We currently have fields in struct cpuinfo_mips for the core & VP(E) ID
of a particular CPU, and various pieces of code directly access those
fields. This patch abstracts such access by introducing accessor
functions cpu_core(), cpu_set_core(), cpu_vpe_id() & cpu_set_vpe_id()
and having code that needs to access these values call those functions
rather than directly accessing the struct cpuinfo_mips fields. This
prepares us for changes to the way in which those values are stored in
later patches.The cpu_vpe_id() function is introduced even though we already had a
cpu_vpe_id() macro for a couple of reasons:1) It's more consistent with the core, and future cluster, accessors.
2) It ensures a sensible return type without explicit casts.
3) It's generally preferable to use functions rather than macros.
Signed-off-by: Paul Burton
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17009/
Signed-off-by: Ralf Baechle
06 Apr, 2017
1 commit
-
for one thing, the last argument is always __access_mask and had been such
since 2.4.0-test3pre8; for another, it can bloody well be a static inline -
-O2 or -Os, __builtin_constant_p() propagates through static inline calls.Signed-off-by: Al Viro
14 Feb, 2017
1 commit
-
Unify definitions for MIPS performance counter register fields in
mipsregs.h rather than duplicating them in perf_events and oprofile.
This will allow future patches to use them to expose performance
counters to KVM guests.Signed-off-by: James Hogan
Cc: Ralf Baechle
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Alexander Shishkin
Cc: Robert Richter
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: oprofile-list@lists.sf.net
Patchwork: https://patchwork.linux-mips.org/patch/15212/
Signed-off-by: James Hogan
26 Dec, 2016
1 commit
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Pull SMP hotplug notifier removal from Thomas Gleixner:
"This is the final cleanup of the hotplug notifier infrastructure. The
series has been reintgrated in the last two days because there came a
new driver using the old infrastructure via the SCSI tree.Summary:
- convert the last leftover drivers utilizing notifiers
- fixup for a completely broken hotplug user
- prevent setup of already used states
- removal of the notifiers
- treewide cleanup of hotplug state names
- consolidation of state space
There is a sphinx based documentation pending, but that needs review
from the documentation folks"* 'smp-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip/armada-xp: Consolidate hotplug state space
irqchip/gic: Consolidate hotplug state space
coresight/etm3/4x: Consolidate hotplug state space
cpu/hotplug: Cleanup state names
cpu/hotplug: Remove obsolete cpu hotplug register/unregister functions
staging/lustre/libcfs: Convert to hotplug state machine
scsi/bnx2i: Convert to hotplug state machine
scsi/bnx2fc: Convert to hotplug state machine
cpu/hotplug: Prevent overwriting of callbacks
x86/msr: Remove bogus cleanup from the error path
bus: arm-ccn: Prevent hotplug callback leak
perf/x86/intel/cstate: Prevent hotplug callback leak
ARM/imx/mmcd: Fix broken cpu hotplug handling
scsi: qedi: Convert to hotplug state machine
25 Dec, 2016
2 commits
-
When the state names got added a script was used to add the extra argument
to the calls. The script basically converted the state constant to a
string, but the cleanup to convert these strings into meaningful ones did
not happen.Replace all the useless strings with 'subsys/xxx/yyy:state' strings which
are used in all the other places already.Signed-off-by: Thomas Gleixner
Cc: Peter Zijlstra
Cc: Sebastian Siewior
Link: http://lkml.kernel.org/r/20161221192112.085444152@linutronix.de
Signed-off-by: Thomas Gleixner -
This was entirely automated, using the script by Al:
PATT='^[[:blank:]]*#[[:blank:]]*include[[:blank:]]*'
sed -i -e "s!$PATT!#include !" \
$(git grep -l "$PATT"|grep -v ^include/linux/uaccess.h)to do the replacement at the end of the merge window.
Requested-by: Al Viro
Signed-off-by: Linus Torvalds
15 Jul, 2016
1 commit
-
Install the callbacks via the state machine and let the core invoke
the callbacks on the already online CPUs.Signed-off-by: Richard Cochran
Signed-off-by: Anna-Maria Gleixner
Reviewed-by: Sebastian Andrzej Siewior
Acked-by: Ralf Baechle
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Robert Richter
Cc: Thomas Gleixner
Cc: linux-mips@linux-mips.org
Cc: oprofile-list@lists.sf.net
Cc: rt@linutronix.de
Link: http://lkml.kernel.org/r/20160713153337.054827168@linutronix.de
Signed-off-by: Ingo Molnar
28 May, 2016
1 commit
-
Signed-off-by: Andrea Gelmini
Cc: rric@kernel.org
Cc: linux-mips@linux-mips.org
Cc: trivial@kernel.org
Cc: oprofile-list@lists.sf.net
Patchwork: https://patchwork.linux-mips.org/patch/13334/
Signed-off-by: Ralf Baechle
13 May, 2016
1 commit
-
Add CPU feature for standard MIPS r2 performance counters, as determined
by the Config1.PC bit. Both perf_events and oprofile probe this bit, so
lets combine the probing and change both to use cpu_has_perf.This will also be used for VZ support in KVM to know whether performance
counters exist which can be exposed to guests.[ralf@linux-mips.org: resolve conflict.]
Signed-off-by: James Hogan
Cc: Peter Zijlstra
Cc: Ingo Molnar
Cc: Arnaldo Carvalho de Melo
Cc: Alexander Shishkin
Cc: Robert Richter
Cc: linux-mips@linux-mips.org
Cc: oprofile-list@lists.sf.net
Patchwork: https://patchwork.linux-mips.org/patch/13226/
Signed-off-by: Ralf Baechle
09 May, 2016
1 commit
-
Use boot_cpu_type() instead of current_cpu_type() in oprofile_arch_init()
to avoid the below warning, cpu_type is normally consistent in a MIPS SMP
system. There are a few exceptions such as SGI servers where it is
possible to mix R10000, R12000, R14000 and R16000 within certain
constraints. Let's not worry about those now.BUG: using smp_processor_id() in preemptible [00000000] code: insmod/952
caller is oprofile_arch_init+0x30/0x194 [oprofile]
CPU: 5 PID: 952 Comm: insmod Not tainted 4.1.13-WR8.0.0.0_standard #1
Stack : ffffffff80c10000 0000000000000001 8000000025bf0790 ffffffff80e10000
ffffffff80e50000 ffffffff80254e2c ffffffff80b64428 ffffffff80e10790
0000000000000000 ffffffff801caeb8 0000000000000045 0000000000000005
ffffffff80c10000 ffffffff801cb798 0000000000000000 ffffffff80e30000
0000000000000000 ffffffff801ff1c0 ffffffff80e2d2f8 000000000000000b
ffffffff801cbba0 ffffffff80e107b0 ffffffff80a77828 0000000000000005
00000000000003b8 ffffffff80e2d2f8 800000040ad39960 ffffffff801f9950
0000000000000124 80000004093b7990 80000004093b7ab8 ffffffff80925108
ffffffff80b69a07 ffffffff80a6f0d0 8000000407240e00 ffffffff801cc934
000000000000005d ffffffff80159080 0000000000000005 00000000000003b8
...
Call Trace:
[] show_stack+0xe8/0x108
[] dump_stack+0x8c/0xd8
[] check_preemption_disabled+0x110/0x118
[] oprofile_arch_init+0x30/0x194 [oprofile]
[] oprofile_init+0x2c/0xc0 [oprofile]
[] do_one_initcall+0xa0/0x1c0
[] do_init_module+0x80/0x1d8
[] load_module+0x1b74/0x2278
[] SyS_finit_module+0xcc/0xf0
[] handle_sysn32+0x44/0x70[ralf@linux-mips.org: Correct commit message.]
Signed-off-by: Yanjiang Jin
Cc: rric@kernel.org
Cc: jinyanjiang@gmail.com
Cc: linux-mips@linux-mips.org
Cc: oprofile-list@lists.sf.net
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11769/
Signed-off-by: Ralf Baechle
26 Aug, 2015
1 commit
-
Add a CPU_I6400 case to various switch statements, doing the same thing
as for CPU_P5600.Signed-off-by: Markos Chandras
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10635/
Signed-off-by: Ralf Baechle
01 Apr, 2015
1 commit
-
This allows the kernel to correctly detect an R16000 MIPS CPU on systems that
have those. Otherwise, such systems will detect the CPU as an R14000, due to
similarities in the CPU PRId value.Signed-off-by: Joshua Kinard
Cc: Linux MIPS List
Patchwork: https://patchwork.linux-mips.org/patch/9092/
Signed-off-by: Ralf Baechle
31 Mar, 2015
3 commits
-
When requesting the performance counter overflow interrupt, pass flags
which are compatible with the cevt-r4k driver, in particular
IRQF_SHARED so that the two handlers can share the same IRQ. This is
possible since release 2 of the architecture where there are separate
pending interrupt bits for the timer interrupt and the performance
counter interrupt.This will be necessary since the FDC interrupt can also be arbitrarily
routed to a CPU interrupt, possibly sharing with the timer, the
performance counters, or both, and it isn't scalable to have all the
handlers able to call other handlers that may be on the same IRQ line.Signed-off-by: James Hogan
Cc: Robert Richter
Cc: linux-mips@linux-mips.org
Cc: oprofile-list@lists.sf.net
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9130/
Signed-off-by: Ralf Baechle -
The situation where the timer interrupt is on the same line as the
performance counter interrupt is handled in per_cpu_trap_init() by
setting cp0_perfcount_irq to -1, so there is no need to duplicate the
logic conditional upon cp0_perfcount_irq >= 0 in perf
(init_hw_perf_events()) and oprofile (mipsxx_init()).Signed-off-by: James Hogan
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9125/
Signed-off-by: Ralf Baechle -
Use CAUSEF_TI and CAUSEF_PCI constants from asm/mipsregs.h rather than
the magic values (1 << 30) and (1 << 26).Signed-off-by: James Hogan
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9124/
Signed-off-by: Ralf Baechle
24 Nov, 2014
4 commits
-
Continue the backtrace if we cannot find SP adjustment and RA save. In
that case, just assume the current RA. This allows us to get samples of
frequent callers of e.g. GLIBC memset().Signed-off-by: Aaro Koskinen
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8109/
Signed-off-by: Ralf Baechle -
Allow unsupported CPU types to use backtrace with timer-based profiling.
Some CPUs (notably OCTEON) lack architecture-specific oprofile driver. In
such case oprofile can fallback to timer-based mode, and arch code can
still provide the backtrace functionality. So just set up the backtrace
hook always.Signed-off-by: Aaro Koskinen
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8108/
Signed-off-by: Ralf Baechle -
Loongson-3 has two groups of performance counters, they are 4 sub-
registers of CP0's REG25. This patch add oprofile support.REG25, sel 0: Perf Control of group 0;
REG25, sel 1: Perf Counter of group 0;
REG25, sel 2: Perf Control of group 1;
REG25, sel 3: Perf Counter of group 1.Signed-off-by: Huacai Chen
Cc: John Crispin
Cc: Steven J. Hill
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang
Cc: Zhangjin Wu
Patchwork: https://patchwork.linux-mips.org/patch/8328/
Signed-off-by: Ralf Baechle -
The hardware perf event driver and oprofile interpret the global
cp0_perfcount_irq differently: in the hardware perf event driver
it is an offset from MIPS_CPU_IRQ_BASE and in oprofile it is the
actual IRQ number. This still works most of the time since
MIPS_CPU_IRQ_BASE is usually 0, but is clearly wrong. Since the
performance counter interrupt may vary from platform to platform
like the C0 timer interrupt, add the optional get_c0_perfcount_int
hook which returns the IRQ number of the performance counter.
The hook should return < 0 if the performance counter interrupt is
shared with the timer. If the hook is not present, the CPU vector
reported in C0_IntCtl (cp0_perfcount_irq) is used.Signed-off-by: Andrew Bresticker
Reviewed-by: Qais Yousef
Tested-by: Qais Yousef
Cc: Thomas Gleixner
Cc: Jason Cooper
Cc: Andrew Bresticker
Cc: Jeffrey Deans
Cc: Markos Chandras
Cc: Paul Burton
Cc: Qais Yousef
Cc: Jonas Gorski
Cc: John Crispin
Cc: David Daney
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7805/
Signed-off-by: Ralf Baechle
20 Nov, 2014
1 commit
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Fix incorrect cast that always results in wrong address for the new
frame on 64-bit kernels.Signed-off-by: Aaro Koskinen
Cc: stable@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8110/
Signed-off-by: Ralf Baechle
27 Mar, 2014
2 commits
-
The M5150 core is a 32-bit MIPS RISC which implements the
MIPS Architecture Release-5 in a 5-stage pipeline.
In addition, it includes the MIPS Architecture Virtualization Module
that enables virtualization of operating systems,
which provides a scalable, trusted, and secure execution environment.Signed-off-by: Leonid Yegoshin
Signed-off-by: Markos Chandras
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6596/
Signed-off-by: Ralf Baechle -
Add a CPU_P5600 cpu type case in oprofile_arch_init() to use the MIPS
model, and in mipsxx_init() to set the cpu_type string to "mips/P5600".Signed-off-by: James Hogan
Reviewed-by: Markos Chandras
Cc: linux-mips@linux-mips.org
Cc: Robert Richter
Cc: oprofile-list@lists.sf.net
Patchwork: https://patchwork.linux-mips.org/patch/6410/
Signed-off-by: Ralf Baechle
07 Mar, 2014
1 commit
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The 1074K is a multiprocessing coherent processing system (CPS) based
on modified 74K cores. This patch makes the 1074K an actual unique
CPU type, instead of a 74K derivative, which it is not.Signed-off-by: Steven J. Hill
Reviewed-by: Leonid Yegoshin
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6389/
Signed-off-by: Ralf Baechle
23 Jan, 2014
2 commits
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The interAptiv is a power-efficient multi-core microprocessor
for use in system-on-chip (SoC) applications. The interAptiv combines
a multi-threading pipeline with a coherence manager to deliver improved
computational throughput and power efficiency. The interAptiv can
contain one to four MIPS32R3 interAptiv cores, system level
coherence manager with L2 cache, optional coherent I/O port,
and optional floating point unit.Signed-off-by: Leonid Yegoshin
Signed-off-by: Markos Chandras
Signed-off-by: John Crispin
Patchwork: http://patchwork.linux-mips.org/patch/6163/ -
The proAptiv Multiprocessing System is a power efficient multi-core
microprocessor for use in system-on-chip (SoC) applications.
The proAptiv Multiprocessing System combines a deep pipeline
with multi-issue out of order execution for improved computational
throughput. The proAptiv Multiprocessing System can contain one to
six MIPS32r3 proAptiv cores, system level coherence
manager with L2 cache, optional coherent I/O port, and optional
floating point unit.Signed-off-by: Leonid Yegoshin
Signed-off-by: Markos Chandras
Signed-off-by: John Crispin
Patchwork: http://patchwork.linux-mips.org/patch/6134/
18 Sep, 2013
1 commit
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o Move current_cpu_type() to a separate header file
o #ifdefing on supported CPU types lets modern GCC know that certain
code in callers may be discarded ideally turning current_cpu_type() into
a function returning a constant.
o Use current_cpu_type() rather than direct access to struct cpuinfo_mips.Signed-off-by: Ralf Baechle
Cc: Steven J. Hill
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5833/
04 Sep, 2013
3 commits
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same story as with oprofilefs_mkdir()
Signed-off-by: Al Viro
-
it's always equal to ->d_sb of the second argument (parent dentry),
due to either being literally that, or ->d_sb of parent's parent.Signed-off-by: Al Viro
-
Signed-off-by: Al Viro
05 Aug, 2013
1 commit
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current_cpu_type() is not preemption-safe.
If CONFIG_PREEMPT is enabled then mipsxx_reg_setup() can be called from preemptible state.
Added get_cpu()/put_cpu() pair to make it preemption-safe.This was found while testing oprofile with CONFIG_DEBUG_PREEMPT enable.
/usr/zntestsuite # opcontrol --init
/usr/zntestsuite # opcontrol --setup --event=L2_CACHE_ACCESSES:500 --event=L2_CACHE_MISSES:500 --no-vmlinux
/usr/zntestsuite # opcontrol --start
Using 2.6+ OProfile kernel interface.
BUG: using smp_processor_id() in preemptible [00000000] code: oprofiled/1362
caller is mipsxx_reg_setup+0x11c/0x164
CPU: 0 PID: 1362 Comm: oprofiled Not tainted 3.10.4 #18
Stack : 00000006 70757465 00000000 00000000 00000000 00000000 80b173f6 00000037
80b10000 00000000 80b21614 88f5a220 00000000 00000000 00000000 00000000
00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
00000000 00000000 00000000 89c49c00 89c49c2c 80721254 807b7927 8012c1d0
80b10000 80721254 00000000 00000552 88f5a220 80b1335c 807b78e6 89c49ba8
...
Call Trace:
[] show_stack+0x64/0x7c
[] dump_stack+0x20/0x2c
[] debug_smp_processor_id+0xe0/0xf0
[] mipsxx_reg_setup+0x11c/0x164
[] op_mips_setup+0x24/0x4c
[] oprofile_setup+0x5c/0x12c
[] event_buffer_open+0x78/0xf8
[] do_dentry_open.isra.15+0x2b8/0x3b0
[] finish_open+0x28/0x4c
[] do_last.isra.41+0x2cc/0xd00
[] path_openat+0xb4/0x4c4
[] do_filp_open+0x3c/0xac
[] do_sys_open+0x110/0x1f4
[] stack_done+0x20/0x44Bug reported and original patch by Jerin Jacob .
Signed-off-by: Ralf Baechle
Acked-by: Jerin Jacob
08 May, 2013
1 commit
-
The commit c783390a0ecef08df5c804f8c5f647431a04f502 [MIPS: oprofile:
Support for XLR/XLS processors] causes a compilation failure when
oprofile is enabled and SMP is not configured.arch/mips/oprofile/op_model_mipsxx.c: In function 'mipsxx_cpu_setup':
arch/mips/oprofile/op_model_mipsxx.c:181:2: error: implicit declaration of function 'cpu_logical_map'To fix this, update oprofile_skip_cpu to not call cpu_logical_map when
CONFIG_SMP is not defined.Signed-off-by: Jayachandran C
Patchwork: http://patchwork.linux-mips.org/patch/5037/
Acked-by: John Crispin
