30 Dec, 2020
1 commit
-
[ Upstream commit be439cc4c404f646a8ba090fa786d53c10926b12 ]
Add MODULE_DEVICE_TABLE() so as to be able to use the driver as a
module. More precisely, for the driver to be loaded automatically at
boot.Fixes: 1bc95972715a ("clk: bcm: Add BCM2711 DVP driver")
Signed-off-by: Nicolas Saenz Julienne
Link: https://lore.kernel.org/r/20201202103518.21889-1-nsaenzjulienne@suse.de
Reviewed-by: Maxime Ripard
Signed-off-by: Stephen Boyd
Signed-off-by: Sasha Levin
23 Oct, 2020
1 commit
-
Pull clk updates from Stephen Boyd:
"This contains no changes to the core framework. It is a collection of
various clk driver updates.The biggest driver updates in terms of lines of code is the Allwinner
driver, closely followed by the Qualcomm and Mediatek drivers. All of
those hit high because we add so many lines of clk data. Coming in
fourth place is i.MX which also adds a bunch of clk data. This
accounts for the new driver additions this time around.Otherwise the patches are lots of little cleanups and fixes for
various clk drivers that have baked in linux-next for a while. I
suppose one highlight or theme is that more clk drivers are being
updated to work as modules, which is interesting to see such critical
SoC infrastructure work as a loadable module.New Drivers:
- Support qcom SM8150/SM8250 video and display clks
- Support Mediatek MT8167 clks
- Add clock for CRC block found on vf610 SoCs
- Add support for the Renesas R-Car V3U (R8A779A0) SoC
- Add support for the VSP for Resizing clock on Renesas RZ/G1H
- Support Allwinner A100 SoC clksRemoved Drivers:
- Remove i.MX21 clock driver, as i.MX21 platform support is being
droppedUpdates:
- Change how qcom's display port clks work
- Small non-critical fixes for TI clk driver
- Remove various unused variables in clk drivers
- Allow Rockchip clk driver to be a module
- Remove most __clk_lookup() calls in Samsung drivers (yay!)
- Support building i.MX ARMv8 platforms clock driver as module
- Some kerneldoc fixes here and there
- A couple of minor i.MX clk data corrections
- Update audio clock inverter and fdiv2 flag on Amlogic g12
- Make amlogic clk drivers configurable in Kconfig
- Fix Renesas VSP clock names to match corrected hardware
documentation
- Sigma-delta modulation on Allwinner R40
- Various fixes for at91 clk driver
- Use semicolons instead of commas in some places
- Mark some variables const so they can move to RO memory"* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (102 commits)
clk: imx8mq: Fix usdhc parents order
clk: qcom: gdsc: Keep RETAIN_FF bit set if gdsc is already on
clk: Restrict CLK_HSDK to ARC_SOC_HSDK
clk: at91: sam9x60: support only two programmable clocks
clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate
clk: ingenic: Don't tag custom clocks with CLK_SET_RATE_PARENT
clk: ingenic: Don't use CLK_SET_RATE_GATE for PLL
clk: ingenic: Use readl_poll_timeout instead of custom loop
clk: ingenic: Use to_clk_info() macro for all clocks
clk: bcm2835: add missing release if devm_clk_hw_register fails
clk: at91: clk-sam9x60-pll: remove unused variable
clk: at91: clk-main: update key before writing AT91_CKGR_MOR
clk: at91: remove the checking of parent_name
clk: clk-prima2: fix return value check in prima2_clk_init()
clk: mmp2: Fix the display clock divider base
clk: pxa: Constify static struct clk_ops
clk: baikal-t1: Mark Ethernet PLL as critical
clk: qoriq: modify MAX_PLL_DIV to 32
clk: axi-clkgen: Set power bits for fractional mode
clk: axi-clkgen: Add support for fractional dividers
...
14 Oct, 2020
1 commit
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In the implementation of bcm2835_register_pll(), the allocated pll is
leaked if devm_clk_hw_register() fails to register hw. Release pll if
devm_clk_hw_register() fails.Signed-off-by: Navid Emamdoost
Link: https://lore.kernel.org/r/20200809231202.15811-1-navid.emamdoost@gmail.com
Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
Signed-off-by: Stephen Boyd
23 Sep, 2020
1 commit
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To use QHD or higher, we need to modify the pixel_bvb_clk value. So
add register to control this clock.Signed-off-by: Hoegeun Kwon
Link: https://lore.kernel.org/r/20200901040759.29992-2-hoegeun.kwon@samsung.com
Reviewed-by: Maxime Ripard
Acked-by: Nicolas Saenz Julienne
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Stephen Boyd
10 Sep, 2020
1 commit
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The DVP driver depends both on the RESET_SIMPLE driver but also on the
reset framework itself. Let's make sure we have it enabled.Fixes: 1bc95972715a ("clk: bcm: Add BCM2711 DVP driver")
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/20200903082636.3844629-1-maxime@cerno.tech
Acked-by: Nicolas Saenz Julienne
Signed-off-by: Stephen Boyd
04 Aug, 2020
2 commits
-
…debugfs' into clk-next
- RMU and DMAC/GPIO clock support for Actions Semi S500 SoCs
* clk-actions:
MAINTAINERS: Add reset binding entry for Actions Semi Owl SoCs
clk: actions: Add Actions S500 SoC Reset Management Unit support
dt-bindings: reset: Add binding constants for Actions S500 RMU
clk: actions: Add APB, DMAC, GPIO clock support for Actions S500 SoC
dt-bindings: clock: Add APB, DMAC, GPIO bindings for Actions S500 SoC
clk: actions: Fix h_clk for Actions S500 SoC* clk-rockchip:
clk: rockchip: add sclk_mac_lbtest to rk3188_critical_clocks
clk: rockchip: Revert "fix wrong mmc sample phase shift for rk3328"
clk: rockchip: use separate compatibles for rk3288w-cru
dt-bindings: clocks: add rk3288w variant compatible
clk: rockchip: Handle clock tree for rk3288w variant
clk: rockchip: convert rk3036 pll type to use internal lock status
clk: rockchip: convert basic pll lock_wait to use regmap_read_poll_timeout
clk: rockchip: convert rk3399 pll type to use readl_relaxed_poll_timeout* clk-iproc:
clk: iproc: round clock rate to the closest* clk-intel:
clk: intel: Avoid unnecessary memset by improving code
clk: intel: Improve locking in the driver
clk: intel: Use devm_clk_hw_register() instead of clk_hw_register()* clk-debugfs:
clk: Add support for enabling/disabling clocks from debugfs -
Contrary to previous SoCs, bcm2711 doesn't have a prescaler in the PLL
feedback loop. Bypass it by zeroing fb_prediv_mask when running on
bcm2711.Note that, since the prediv configuration bits were re-purposed, this
was triggering miscalculations on all clocks hanging from the VPU clock,
notably the aux UART, making its output unintelligible.Fixes: 42de9ad400af ("clk: bcm2835: Add BCM2711_CLOCK_EMMC2 support")
Reported-by: Nathan Chancellor
Signed-off-by: Nicolas Saenz Julienne
Link: https://lore.kernel.org/r/20200730182619.23246-1-nsaenzjulienne@suse.de
Tested-by: Nathan Chancellor
Reviewed-by: Florian Fainelli
Signed-off-by: Stephen Boyd
24 Jul, 2020
1 commit
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Change from 'DIV_ROUND_UP' to 'DIV_ROUND_CLOSEST' when calculating the
clock divisor in the iProc ASIU clock driver to allow to get to the
closest clock rate.Fixes: 5fe225c105fd ("clk: iproc: add initial common clock support")
Signed-off-by: Lori Hikichi
Signed-off-by: Ray Jui
Link: https://lore.kernel.org/r/20200612225212.124301-1-ray.jui@broadcom.com
Signed-off-by: Stephen Boyd
27 Jun, 2020
1 commit
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The driver for the DVP controller in the BCM2711 was missing the MODULE_*
macros resulting in a modpost warning at compilation.Fixes: 1bc95972715a ("clk: bcm: Add BCM2711 DVP driver")
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/20200626112513.90816-1-maxime@cerno.tech
Signed-off-by: Stephen Boyd
20 Jun, 2020
27 commits
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The CPU clock has had so far a bunch of quirks to expose the clock tree
properly, but since we reverted to exposing them through the MMIO driver,
we can remove that code from the firmware driver.Acked-by: Nicolas Saenz Julienne
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/acdf820c2f78a25dd7480a0c018b8b387acd013e.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The PLLB rate will be changed through the firmware clocks drivers and will
change behind this drivers' back, so we don't want to cache the rate.Acked-by: Nicolas Saenz Julienne
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/9864daba2f584ed49aee5ed1d2f4d48507c58197.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
While some clock types allow for each clock to specify its own custom
flags, the PLLs can't. We will need this for the PLLB, so let's add it.Acked-by: Nicolas Saenz Julienne
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/ae8bd505d8851f6646e244cd76b6b289346973c8.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
This reverts commit 2256d89333bd17b8b56b42734a7e1046d52f7fc3. Since we
will be expanding the firmware clock driver, we'll need to remove the
quirks to deal with the PLLB. However, we still want to expose the clock
tree properly, so having that clock in the MMIO driver will allow that.Acked-by: Nicolas Saenz Julienne
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/5d26a4c58248f5be7760a7f2f720a1310baea5dd.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
We've registered the firmware clocks using their ID as name, but it's much
more convenient to register them using their proper name. Since the
firmware doesn't provide it, we have to duplicate it.Acked-by: Nicolas Saenz Julienne
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/a52a5f5768cd33716cdd35237c6613f26ad75013.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The RaspberryPi4 firmware actually exposes more clocks than are currently
handled by the driver and we will need to change some of them directly
based on the pixel rate for the display related clocks, or the load for the
GPU.Since the firmware implements DVFS, this rate change can have a number of
side-effects, including adjusting the various PLL voltages or the PLL
parents. The firmware also implements thermal throttling, so even some
thermal pressure can change those parameters behind Linux back.DVFS is currently implemented on the arm, core, h264, v3d, isp and hevc
clocks, so updating any of them using the MMIO driver (and thus behind the
firmware's back) can lead to troubles, the arm clock obviously being the
most problematic.In order to make Linux play as nice as possible with those constraints, it
makes sense to rely on the firmware clocks as much as possible. However,
the firmware doesn't seem to provide some equivalents to their MMIO
counterparts, so we can't really replace that driver entirely.Fortunately, the firmware has an interface to discover the clocks it
exposes.Let's use it to discover, register the clocks in the clocks framework and
then expose them through the device tree for consumers to use them.Cc: Michael Turquette
Cc: Stephen Boyd
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/438d73962741a8c5f7c689319b7443b930a87fde.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
While the firmware allows us to discover the available clocks, we need to
discriminate those clocks to only register the ones meaningful to Linux.
The firmware also doesn't provide a clock name, so having a list of the ID
will help us to give clocks a proper name later on.Acked-by: Nicolas Saenz Julienne
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/4738f77ee7de9b48a3bb1c558ead958d0cc064d9.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
For the upcoming registration of the clocks provided by the firmware, make
sure it's exposed to the device tree providers.Cc: Michael Turquette
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/4d8dbe4aaae98b3d3812ad7c3dba53d645cadbaf.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The raspberrypi_register_pllb has been returning an integer so far to
notify whether the functions has exited successfully or not.However, the OF provider functions in the clock framework require access to
the clk_hw structure so that we can expose those clocks to device tree
consumers.Since we'll want that for the future clocks, let's return a clk_hw pointer
instead of the return code.Cc: Michael Turquette
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/97218559db643e62fdd2b5e3046a2a05b8c2e769.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The driver only supports the pllb for now and all the clock framework hooks
are a mix of the generic firmware interface and the specifics of the pllb.
Since we will support more clocks in the future let's split the generic and
specific hooksCc: Michael Turquette
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/fdc21962fdc7de5c46232f198672d5d5c868ec74.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The raspberrypi_fw_pll_is_on function doesn't only apply to PLL
registered in the driver, but any clock exposed by the firmware.Since we also implement the is_prepared hook, make the function
consistent with the other function names.Cc: Michael Turquette
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/ac93cc4e245316bb7e7426ac5ab0de8f3d919731.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The raspberry_clock_property only takes the clock ID as an argument, but
now that we have a clock data structure it makes more sense to just pass
that structure instead.Cc: Michael Turquette
Cc: Stephen Boyd
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/d7a3b4df3ca23feb6e0d9c7ae2d232bfb913f926.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The driver has really only supported one clock so far and has hardcoded the
ID used in communications with the firmware in all the functions
implementing the clock framework hooks. Let's store that in the clock data
structure so that we can support more clocks later on.Cc: Michael Turquette
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/e23c37961b97b027e21efa3b818578970f88527a.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
So far the driver has really only been providing a single clock, and stored
both the data associated to that clock in particular with the data
associated to the "controller".Since we will change that in the future, let's decouple the clock data from
the provider data.Cc: Michael Turquette
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/ee7f508db226214fab4add7f93a351f4137c86a1.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The raspberrypi firmware clock driver has a min_rate / max_rate clamping by
storing the info it needs in a private structure.However, the CCF already provides such a facility, so we can switch to it
to remove the boilerplate.Reviewed-by: Nicolas Saenz Julienne
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/d4c53dab6de5d5f70743d9c139d0117589530e62.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The clkdev lookup created for the cpufreq device is never removed if
there's an issue later in probe or at module removal time.Let's convert to the managed variant of the clk_hw_register_clkdev function
to make sure it happens.Cc: Michael Turquette
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/075e2c6d315eccdaf8fb72b320712b86e6c25b22.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
Since we don't care about retrieving the clk_lookup structure pointer
returned by clkdev_hw_create, we can just use the clk_hw_register_clkdev
function.Cc: Michael Turquette
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/59f6208b6fe3367e735b0cca4f65c2c937639af9.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The pllb_arm_lookup pointer in the struct raspberrypi_clk is not used for
anything but to store the returned pointer to clkdev_hw_create, and is not
used anywhere else in the driver.Let's remove that global pointer from the structure.
Cc: Michael Turquette
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/189407f54906d2b07c91de7a4eeb6d8c8934280f.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The pllb_arm clock was created at probe time, but was never removed if
something went wrong later in probe, or if the driver was ever removed from
the system.Now that we are using clk_hw_register(), we can just use its managed variant
to take care of that for us.Cc: Michael Turquette
Cc: Stephen Boyd
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/34254ed1556614658e5dad5cca4cf4fe617df7fc.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The pllb_arm clk_hw pointer in the raspberry_clk structure isn't used
anywhere but in the raspberrypi_register_pllb_arm.Let's remove it, this will make our lives easier in future patches.
Cc: Michael Turquette
Cc: Stephen Boyd
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/842859cf1a77478620f45049178a588448202858.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The pllb_arm clock is defined as a fixed factor clock with the pllb
clock as a parent. However, all its configuration is entirely static,
and thus we don't really need to call clk_hw_register_fixed_factor() but
can simply call clk_hw_register() with a static clk_fixed_factor
structure.Cc: Michael Turquette
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/1146177664999eeda65856d28ce94025021dd85e.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
Instead of declaring the clk_init_data and then calling memset on it, just
initialise properly.Cc: Michael Turquette
Cc: Stephen Boyd
Cc: linux-clk@vger.kernel.org
Acked-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/0342572daa561dc1bb4c9fd10641b2016493e32b.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The current firmware clock driver for the RaspberryPi can only be probed by
manually registering an associated platform_device.While this works fine for cpufreq where the device gets attached a clkdev
lookup, it would be tedious to maintain a table of all the devices using
one of the clocks exposed by the firmware.Since the DT on the other hand is the perfect place to store those
associations, make the firmware clocks driver probe-able through the device
tree so that we can represent it as a node.Cc: Michael Turquette
Cc: linux-clk@vger.kernel.org
Reviewed-by: Nicolas Saenz Julienne
Reviewed-by: Stephen Boyd
Tested-by: Nicolas Saenz Julienne
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/cb8203b862e386ac6c3df3eff0bb5a238b6ec97a.1592210452.git-series.maxime@cerno.tech
Signed-off-by: Stephen Boyd -
The HDMI block has a block that controls clocks and reset signals to the
HDMI0 and HDMI1 controllers.Let's expose that through a clock driver implementing a clock and reset
provider.Cc: Michael Turquette
Cc: Stephen Boyd
Cc: Rob Herring
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Reviewed-by: Stephen Boyd
Signed-off-by: Maxime Ripard
Link: https://lore.kernel.org/r/bb60d97fc76b61c2eabef5a02ebd664c0f57ede0.1591867332.git-series.maxime@cerno.tech
Acked-by: Stefan Wahren
Reviewed-by: Nicolas Saenz Julienne
Signed-off-by: Stephen Boyd -
Now that there are header files for each SoC, let's use them in the
bcm63xx-gate controller driver.Signed-off-by: Álvaro Fernández Rojas
Link: https://lore.kernel.org/r/20200615090231.2932696-9-noltari@gmail.com
Acked-by: Florian Fainelli
Signed-off-by: Stephen Boyd -
Add support for the gated clock controllers found on the BCM6318.
Signed-off-by: Álvaro Fernández Rojas
Reviewed-by: Florian Fainelli
Link: https://lore.kernel.org/r/20200610140858.207329-3-noltari@gmail.com
Signed-off-by: Stephen Boyd -
In order to make the last clock available, maxbit has to be set to the
highest bit value plus 1.Fixes: 1c099779c1e2 ("clk: add BCM63XX gated clock controller driver")
Signed-off-by: Álvaro Fernández Rojas
Link: https://lore.kernel.org/r/20200609110846.4029620-1-noltari@gmail.com
Reviewed-by: Florian Fainelli
Signed-off-by: Stephen Boyd
27 May, 2020
3 commits
-
bcm2835_debugfs_clock_reg32 is never changed and can therefore be made
const.This allows the compiler to put it in the text section instead of the
data section.Before:
text data bss dec hex filename
26598 16088 64 42750 a6fe drivers/clk/bcm/clk-bcm2835.oAfter:
text data bss dec hex filename
26662 16024 64 42750 a6fe drivers/clk/bcm/clk-bcm2835.oSigned-off-by: Rikard Falkeborn
Link: https://lkml.kernel.org/r/20200508220238.4883-1-rikard.falkeborn@gmail.com
Signed-off-by: Stephen Boyd -
There are four different callback functions that are used for the
clk_register callback that all have different second parameter types.bcm2835_register_pll -> struct bcm2835_pll_data
bcm2835_register_pll_divider -> struct bcm2835_pll_divider_data
bcm2835_register_clock -> struct bcm2835_clock_data
bcm2835_register_date -> struct bcm2835_gate_dataThese callbacks are cast to bcm2835_clk_register so that there is no
error about incompatible pointer types. Unfortunately, this is a control
flow integrity violation, which verifies that the callback function's
types match the prototypes exactly before jumping.[ 0.857913] CFI failure (target: 0xffffff9334a81820):
[ 0.857977] WARNING: CPU: 3 PID: 35 at kernel/cfi.c:29 __cfi_check_fail+0x50/0x58
[ 0.857985] Modules linked in:
[ 0.858007] CPU: 3 PID: 35 Comm: kworker/3:1 Not tainted 4.19.123-v8-01301-gdbb48f16956e4-dirty #1
[ 0.858015] Hardware name: Raspberry Pi 3 Model B Rev 1.2 (DT)
[ 0.858031] Workqueue: events 0xffffff9334a925c8
[ 0.858046] pstate: 60000005 (nZCv daif -PAN -UAO)
[ 0.858058] pc : __cfi_check_fail+0x50/0x58
[ 0.858070] lr : __cfi_check_fail+0x50/0x58
[ 0.858078] sp : ffffff800814ba90
[ 0.858086] x29: ffffff800814ba90 x28: 000fffffffdfff3d
[ 0.858101] x27: 00000000002000c2 x26: ffffff93355fdb18
[ 0.858116] x25: 0000000000000000 x24: ffffff9334a81820
[ 0.858131] x23: ffffff93357f3580 x22: ffffff9334af1000
[ 0.858146] x21: a79b57e88f8ebc81 x20: ffffff93357f3580
[ 0.858161] x19: ffffff9334a81820 x18: fffffff679769070
[ 0.858175] x17: 0000000000000000 x16: 0000000000000000
[ 0.858190] x15: 0000000000000004 x14: 000000000000003c
[ 0.858205] x13: 0000000000003044 x12: 0000000000000000
[ 0.858220] x11: b57e91cd641bae00 x10: b57e91cd641bae00
[ 0.858235] x9 : b57e91cd641bae00 x8 : b57e91cd641bae00
[ 0.858250] x7 : 0000000000000000 x6 : ffffff933591d4e5
[ 0.858264] x5 : 0000000000000000 x4 : 0000000000000000
[ 0.858279] x3 : ffffff800814b718 x2 : ffffff9334a84818
[ 0.858293] x1 : ffffff9334bba66c x0 : 0000000000000029
[ 0.858308] Call trace:
[ 0.858321] __cfi_check_fail+0x50/0x58
[ 0.858337] __cfi_check+0x3ab3c/0x4467c
[ 0.858351] bcm2835_clk_probe+0x210/0x2dc
[ 0.858369] platform_drv_probe+0xb0/0xfc
[ 0.858380] really_probe+0x4a0/0x5a8
[ 0.858391] driver_probe_device+0x68/0x104
[ 0.858403] __device_attach_driver+0x100/0x148
[ 0.858418] bus_for_each_drv+0xb0/0x12c
[ 0.858431] __device_attach.llvm.17225159516306086099+0xc0/0x168
[ 0.858443] bus_probe_device+0x44/0xfc
[ 0.858455] deferred_probe_work_func+0xa0/0xe0
[ 0.858472] process_one_work+0x210/0x538
[ 0.858485] worker_thread+0x2e8/0x478
[ 0.858500] kthread+0x154/0x164
[ 0.858515] ret_from_fork+0x10/0x18To fix this, change the second parameter of all functions void * and use
a local variable with the correct type so that everything works
properly. With this, the only use of bcm2835_clk_register is in struct
bcm2835_clk_desc so we can just remove it and use the type directly.Fixes: 56eb3a2ed972 ("clk: bcm2835: remove use of BCM2835_CLOCK_COUNT in driver")
Link: https://github.com/ClangBuiltLinux/linux/issues/1028
Signed-off-by: Nathan Chancellor
Link: https://lkml.kernel.org/r/20200516080806.1459784-2-natechancellor@gmail.com
Signed-off-by: Stephen Boyd -
bcm2835_register_gate is used as a callback for the clk_register member
of bcm2835_clk_desc, which expects a struct clk_hw * return type but
bcm2835_register_gate returns a struct clk *.This discrepancy is hidden by the fact that bcm2835_register_gate is
cast to the typedef bcm2835_clk_register by the _REGISTER macro. This
turns out to be a control flow integrity violation, which is how this
was noticed.Change the return type of bcm2835_register_gate to be struct clk_hw *
and use clk_hw_register_gate to do so. This should be a non-functional
change as clk_register_gate calls clk_hw_register_gate anyways but this
is needed to avoid issues with further changes.Fixes: b19f009d4510 ("clk: bcm2835: Migrate to clk_hw based registration and OF APIs")
Link: https://github.com/ClangBuiltLinux/linux/issues/1028
Signed-off-by: Nathan Chancellor
Link: https://lkml.kernel.org/r/20200516080806.1459784-1-natechancellor@gmail.com
Signed-off-by: Stephen Boyd
17 Oct, 2019
1 commit
-
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.Signed-off-by: YueHaibing
Link: https://lkml.kernel.org/r/20191014143642.24552-1-yuehaibing@huawei.com
Signed-off-by: Stephen Boyd
