14 Dec, 2020

1 commit

  • Since i.MX8MP use synopsys ddr controller IP, so add edac support
    for i.MX8MP based on synopsys edac driver. The difference between ZynqMP
    and i.MX8MP ddr controller is interrupt registers. So add
    intr_handler_imx8mp/enable_intr_imx8mp/disable_intr_imx8mp three
    functions to distinguish with ZynqMP.

    Signed-off-by: Sherry Sun
    Reviewed-by: Frank Li

    Sherry Sun
     

17 Aug, 2020

1 commit

  • The Amazon's Annapurna Labs Memory Controller EDAC supports ECC capability
    for error detection and correction (Single bit error correction, Double
    detection). This driver introduces EDAC driver for that capability.

    [ bp: Remove "EDAC" string from Kconfig tristate as it is redundant. ]

    Signed-off-by: Talel Shenhar
    Signed-off-by: Borislav Petkov
    Reviewed-by: James Morse
    Link: https://lkml.kernel.org/r/20200816185551.19108-3-talel@amazon.com

    Talel Shenhar
     

14 Jun, 2020

1 commit

  • Since commit 84af7a6194e4 ("checkpatch: kconfig: prefer 'help' over
    '---help---'"), the number of '---help---' has been gradually
    decreasing, but there are still more than 2400 instances.

    This commit finishes the conversion. While I touched the lines,
    I also fixed the indentation.

    There are a variety of indentation styles found.

    a) 4 spaces + '---help---'
    b) 7 spaces + '---help---'
    c) 8 spaces + '---help---'
    d) 1 space + 1 tab + '---help---'
    e) 1 tab + '---help---' (correct indentation)
    f) 1 tab + 1 space + '---help---'
    g) 1 tab + 2 spaces + '---help---'

    In order to convert all of them to 1 tab + 'help', I ran the
    following commend:

    $ find . -name 'Kconfig*' | xargs sed -i 's/^[[:space:]]*---help---/\thelp/'

    Signed-off-by: Masahiro Yamada

    Masahiro Yamada
     

20 Feb, 2020

1 commit

  • The driver supports error detection and correction on devices with an
    ARM DMC-520 memory controller.

    Signed-off-by: Lei Wang
    Signed-off-by: Shiping Ji
    Signed-off-by: Borislav Petkov
    Reviewed-by: James Morse
    Link: https://lkml.kernel.org/r/83b48c70-dc06-d0d4-cae9-a2187fca628b@gmail.com

    Lei Wang
     

28 Jan, 2020

1 commit

  • Pull EDAC updates from Borislav Petkov:
    "A totally boring branch this time around: a garden variety of small
    fixes all over the place"

    * tag 'edac_for_5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
    EDAC/amd64: Do not warn when removing instances
    EDAC/sifive: Fix return value check in ecc_register()
    EDAC/aspeed: Remove unneeded semicolon
    EDAC: remove set but not used variable 'ecc_loc'
    EDAC: skx_common: downgrade message importance on missing PCI device
    EDAC/Kconfig: Fix Kconfig indentation

    Linus Torvalds
     

20 Dec, 2019

1 commit

  • The sifive_l2_cache.c is in no way related to RISC-V architecture
    memory management. It is a little stub driver working around the fact
    that the EDAC maintainers prefer their drivers to be structured in a
    certain way that doesn't fit the SiFive SOCs.

    Move the file to drivers/soc and add a Kconfig option for it, as well
    as the whole drivers/soc boilerplate for CONFIG_SOC_SIFIVE.

    Fixes: a967a289f169 ("RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs")
    Signed-off-by: Christoph Hellwig
    Reviewed-by: Borislav Petkov
    [paul.walmsley@sifive.com: keep the MAINTAINERS change specific to the L2$ controller code]
    Signed-off-by: Paul Walmsley

    Christoph Hellwig
     

10 Dec, 2019

1 commit

  • Adjust indentation from spaces to tab (+optional two spaces) as in
    coding style with a command like:

    $ sed -e 's/^ /\t/' -i */Kconfig

    [ bp: make it a single line. ]

    Signed-off-by: Krzysztof Kozlowski
    Signed-off-by: Borislav Petkov
    Cc: James Morse
    Cc: linux-edac
    Cc: Mauro Carvalho Chehab
    Cc: Robert Richter
    Cc: Tony Luck
    Link: https://lkml.kernel.org/r/20191120134206.15588-1-krzk@kernel.org

    Krzysztof Kozlowski
     

23 Sep, 2019

1 commit

  • Pull ARM updates from Russell King:

    - fix various clang build and cppcheck issues

    - switch ARM to use new common outgoing-CPU-notification code

    - add some additional explanation about the boot code

    - kbuild "make clean" fixes

    - get rid of another "(____ptrval____)", this time for the VDSO code

    - avoid treating cache maintenance faults as a write

    - add a frame pointer unwinder implementation for clang

    - add EDAC support for Aurora L2 cache

    - improve robustness of adjust_lowmem_bounds() finding the bounds of
    lowmem.

    - add reset control for AMBA primecell devices

    * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (24 commits)
    ARM: 8906/1: drivers/amba: add reset control to amba bus probe
    ARM: 8905/1: Emit __gnu_mcount_nc when using Clang 10.0.0 or newer
    ARM: 8904/1: skip nomap memblocks while finding the lowmem/highmem boundary
    ARM: 8903/1: ensure that usable memory in bank 0 starts from a PMD-aligned address
    ARM: 8891/1: EDAC: armada_xp: Add support for more SoCs
    ARM: 8888/1: EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC
    ARM: 8892/1: EDAC: Add missing debugfs_create_x32 wrapper
    ARM: 8890/1: l2x0: add marvell,ecc-enable property for aurora
    ARM: 8889/1: dt-bindings: document marvell,ecc-enable binding
    ARM: 8886/1: l2x0: support parity-enable/disable on aurora
    ARM: 8885/1: aurora-l2: add defines for parity and ECC registers
    ARM: 8887/1: aurora-l2: add prefix to MAX_RANGE_SIZE
    ARM: 8902/1: l2c: move cache-aurora-l2.h to asm/hardware
    ARM: 8900/1: UNWINDER_FRAME_POINTER implementation for Clang
    ARM: 8898/1: mm: Don't treat faults reported from cache maintenance as writes
    ARM: 8896/1: VDSO: Don't leak kernel addresses
    ARM: 8895/1: visit mach-* and plat-* directories when cleaning
    ARM: 8894/1: boot: Replace open-coded nop with macro
    ARM: 8893/1: boot: Explain the 8 nops
    ARM: 8876/1: fix O= building with CONFIG_FPE_FASTFPE
    ...

    Linus Torvalds
     

29 Aug, 2019

1 commit


08 Aug, 2019

1 commit


21 Jun, 2019

1 commit

  • Add an EDAC driver for SiFive SoCs. The initial version supports ECC
    event monitoring and reporting through the EDAC framework for the SiFive
    L2 cache controller. It registers for notifier events from the L2 cache
    controller driver (arch/riscv/mm/sifive_l2_cache.c) for L2 ECC events.

    [ bp: Massage commit message. ]

    Signed-off-by: Yash Shah
    Signed-off-by: Borislav Petkov
    Reviewed-by: James Morse
    Cc: Albert Ou
    Cc: "David S. Miller"
    Cc: Greg Kroah-Hartman
    Cc: Jonathan Cameron
    Cc: Linus Walleij
    Cc: linux-edac
    Cc: linux-riscv@lists.infradead.org
    Cc: Mauro Carvalho Chehab
    Cc: Nicolas Ferre
    Cc: Palmer Dabbelt
    Cc: "Paul E. McKenney"
    Cc: Paul Walmsley
    Cc: sachin.ghadi@sifive.com
    Link: https://lkml.kernel.org/r/1557142026-15949-2-git-send-email-yash.shah@sifive.com

    Yash Shah
     

11 May, 2019

1 commit

  • The mpc85xx EDAC driver can be configured as a module but then fails to
    build because it uses two unexported symbols:

    ERROR: ".pci_find_hose_for_OF_device" [drivers/edac/mpc85xx_edac_mod.ko] undefined!
    ERROR: ".early_find_capability" [drivers/edac/mpc85xx_edac_mod.ko] undefined!

    We don't want to export those symbols just for this driver, so make the
    driver only configurable as a built-in.

    This seems to have been broken since at least

    c92132f59806 ("edac/85xx: Add PCIe error interrupt edac support")

    (Nov 2013).

    [ bp: make it depend on EDAC=y so that the EDAC core doesn't get built
    as a module. ]

    Signed-off-by: Michael Ellerman
    Signed-off-by: Borislav Petkov
    Acked-by: Johannes Thumshirn
    Cc: James Morse
    Cc: Mauro Carvalho Chehab
    Cc: linux-edac
    Cc: linuxppc-dev@ozlabs.org
    Cc: morbidrsa@gmail.com
    Link: https://lkml.kernel.org/r/20190502141941.12927-1-mpe@ellerman.id.au

    Michael Ellerman
     

26 Feb, 2019

1 commit

  • The CONFIG_ALTERA_EDAC Kconfig symbol always enables the SDRAM EDAC
    functionality. On the newer architectures, however, there are cases
    where the peripheral EDAC functionality is enabled but SDRAM needs to be
    disabled.

    Move SDRAM functions so they can be contained inside the conditional
    CONFIG. Create new CONFIG option just for SDRAM.

    [ bp: Massage commit message. ]

    Signed-off-by: Thor Thayer
    Signed-off-by: Borislav Petkov
    Cc: James Morse
    Cc: Mauro Carvalho Chehab
    Cc: dinguyen@kernel.org
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-edac
    Cc: linux@armlinux.org.uk
    Link: https://lkml.kernel.org/r/1551121006-4657-2-git-send-email-thor.thayer@linux.intel.com

    Thor Thayer
     

06 Feb, 2019

1 commit

  • I10NM_EDAC depends on CONFIG_ACPI so make that dependency explicit.

    Reported-by: Borislav Petkov
    Signed-off-by: Tony Luck
    Signed-off-by: Borislav Petkov
    Cc: Aristeu Rozanski
    Cc: James Morse
    Cc: Mauro Carvalho Chehab
    Cc: Qiuxu Zhuo
    Cc: linux-edac
    Link: https://lkml.kernel.org/r/20190205180200.26865-1-tony.luck@intel.com

    Tony Luck
     

02 Feb, 2019

1 commit

  • This driver supports the Intel 10nm series server integrated memory
    controller. It gets the memory capacity and topology information by
    reading the registers in PCI configuration space and memory-mapped I/O.

    It decodes the memory error address to the platform specific address
    by using the ACPI Address Translation (ADXL) Device Specific Method
    (DSM).

    Co-developed-by: Tony Luck
    Signed-off-by: Qiuxu Zhuo
    Signed-off-by: Tony Luck
    Signed-off-by: Borislav Petkov
    Cc: James Morse
    Cc: Mauro Carvalho Chehab
    Cc: linux-edac
    Link: https://lkml.kernel.org/r/20190130191519.15393-5-tony.luck@intel.com

    Qiuxu Zhuo
     

18 Jan, 2019

1 commit

  • Add support for the Aspeed AST2500 SoC.

    Signed-off-by: Stefan M Schaeckeler
    Signed-off-by: Borislav Petkov
    Cc: Andrew Jeffery
    Cc: Joel Stanley
    Cc: Mark Rutland
    Cc: Mauro Carvalho Chehab
    Cc: Rob Herring
    Cc: devicetree@vger.kernel.org
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-aspeed@lists.ozlabs.org
    Cc: linux-edac
    Link: https://lkml.kernel.org/r/1547743097-5236-2-git-send-email-schaecsn@gmx.net

    Stefan M Schaeckeler
     

08 Nov, 2018

1 commit

  • It was previously noted that Kconfig complained about unmet dependencies
    when trying to configure skx_edac together with CONFIG_ACPI=n. First fix
    for this checked for ACPI when doing

    select ACPI_ADXL

    but this required stub functions for the case where ACPI wasn't
    selected. It also allowed building a driver that didn't actually work
    for a system that has non-volatile DIMMs.

    Arnd Bergmann pointed out that the right fix is to make EDAC_SKX
    "depend on ACPI".

    Fixes: a324e9396ca3 ("EDAC, skx: Fix randconfig builds")
    Signed-off-by: Tony Luck
    Signed-off-by: Borislav Petkov
    CC: "Rafael J. Wysocki"
    CC: Arnd Bergmann
    CC: Mauro Carvalho Chehab
    CC: linux-edac
    CC: qiuxu.zhuo@intel.com
    Link: http://lkml.kernel.org/r/20181106183914.GA26731@agluck-desk

    Luck, Tony
     

06 Nov, 2018

1 commit

  • Add ECC support for ZynqMP DDR controller IP. The IP supports interrupts
    for corrected and uncorrected errors. Add interrupt handlers for the
    same.

    Signed-off-by: Manish Narani
    Signed-off-by: Borislav Petkov
    CC: Mauro Carvalho Chehab
    CC: Michal Simek
    CC: amit.kucheria@linaro.org
    CC: devicetree@vger.kernel.org
    CC: leoyang.li@nxp.com
    CC: linux-arm-kernel@lists.infradead.org
    CC: linux-edac
    CC: mark.rutland@arm.com
    CC: robh+dt@kernel.org
    CC: sudeep.holla@arm.com
    Link: http://lkml.kernel.org/r/1540447621-22870-5-git-send-email-manish.narani@xilinx.com

    Manish Narani
     

03 Nov, 2018

1 commit

  • Pull more EDAC updates from Borislav Petkov:
    "The second part of the EDAC pile which contains the ADXL user and a
    build fix which addresses a not-so-sensical .config but fixes
    randconfig builds people do:

    - skx_edac: Address translation for NVDIMMs (Tony Luck and Qiuxu Zhuo)

    - ACPI_ADXL build fix"

    [ I don't think "sensical" is a word, particularly when used in the
    context of actually meaning "nonsensical", but I like it - Linus ]

    * tag 'edac_for_4.20_2' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
    EDAC, skx: Fix randconfig builds
    EDAC, skx_edac: Add address translation for non-volatile DIMMs

    Linus Torvalds
     

01 Nov, 2018

1 commit

  • The driver depends on the ADXL component glue and selects it. However,
    ADXL itself implicitly depends on ACPI and in nonsensical randconfig
    builds like this:

    # CONFIG_ACPI is not set
    CONFIG_ACPI_ADXL=y

    where ACPI is not enabled, the build fails with:

    drivers/edac/skx_edac.o: In function `skx_mce_check_error':
    skx_edac.c:(.text+0xab): undefined reference to `adxl_decode'
    drivers/edac/skx_edac.o: In function `skx_init':
    skx_edac.c:(.init.text+0x8bf): undefined reference to `adxl_get_component_names'
    make: *** [vmlinux] Error 1

    Add stubs for that case so that the build succeeds. CONFIG_ACPI=n
    doesn't make any sense for real configurations but this fix will at
    least silence randconfig builds.

    Signed-off-by: Borislav Petkov
    Acked-by: Tony Luck
    Cc: "Rafael J. Wysocki"

    Borislav Petkov
     

25 Oct, 2018

1 commit

  • Currently, this driver doesn't support address translation for
    non-volatile DIMMs.

    The ACPI ADXL DSM method provides address translation for both volatile
    and non-volatile DIMMs. Enable it to use the ACPI DSM methods if they
    are supported and there are non-volatile DIMMs populated on the system.

    Co-developed-by: Tony Luck
    Signed-off-by: Qiuxu Zhuo
    Signed-off-by: Borislav Petkov
    CC: Mauro Carvalho Chehab
    CC: arozansk@redhat.com
    CC: linux-edac
    Link: http://lkml.kernel.org/r/1540106336-5212-1-git-send-email-qiuxu.zhuo@intel.com

    Qiuxu Zhuo
     

14 Sep, 2018

1 commit

  • Add error reporting driver for Single Bit Errors (SBEs) and Double Bit
    Errors (DBEs). As of now, this driver supports error reporting for
    Last Level Cache Controller (LLCC) of Tag RAM and Data RAM. Interrupts
    are triggered when the errors happen in the cache, the driver handles
    those interrupts and dumps the syndrome registers.

    Signed-off-by: Channagoud Kadabi
    Signed-off-by: Venkata Narendra Kumar Gutta
    Co-developed-by: Venkata Narendra Kumar Gutta
    Acked-by: Borislav Petkov
    Signed-off-by: Andy Gross

    Channagoud Kadabi
     

14 May, 2018

1 commit

  • Prevent build error when CONFIG_ACPI_NFIT=m and CONFIG_EDAC_SKX=y by
    limiting EDAC_SKX based on how ACPI_NFIT is set.

    Fixes this build error:
    drivers/edac/skx_edac.o: In function `get_nvdimm_info':
    ../drivers/edac/skx_edac.c:399: undefined reference to `nfit_get_smbios_id'

    Reported-by: kbuild test robot
    Signed-off-by: Randy Dunlap
    Cc: Andrew Morton
    Cc: Tony Luck
    Cc: linux-edac
    Fixes: 58ca9ac1463d ("EDAC, skx_edac: Detect non-volatile DIMMs")
    Link: http://lkml.kernel.org/r/3af91354-8e19-d2af-1bba-ced8dce053f1@infradead.org
    Signed-off-by: Borislav Petkov

    Randy Dunlap
     

12 May, 2018

1 commit

  • Support for Stratix10 SDRAM ECC requires the use of SMC calls to Secure
    Monitor for accessing registers.

    Signed-off-by: Thor Thayer
    Cc: Mauro Carvalho Chehab
    Cc: catalin.marinas@arm.com
    Cc: devicetree@vger.kernel.org
    Cc: dinguyen@kernel.org
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-edac
    Cc: mark.rutland@arm.com
    Cc: robh+dt@kernel.org
    Cc: will.deacon@arm.com
    Link: http://lkml.kernel.org/r/1524854238-19394-3-git-send-email-thor.thayer@linux.intel.com
    Signed-off-by: Borislav Petkov

    Thor Thayer
     

06 Apr, 2018

1 commit

  • Pull EDAC updates from Borislav Petkov:
    "Noteworthy is the NVDIMM support:

    - NVDIMM support to EDAC (Tony Luck)

    - misc fixes"

    * tag 'edac_for_4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
    EDAC, sb_edac: Remove variable length array usage
    EDAC, skx_edac: Detect non-volatile DIMMs
    firmware, DMI: Add function to look up a handle and return DIMM size
    acpi, nfit: Add function to look up nvdimm device and provide SMBIOS handle
    EDAC: Add new memory type for non-volatile DIMMs
    EDAC: Drop duplicated array of strings for memory type names
    EDAC, layerscape: Allow building for LS1021A

    Linus Torvalds
     

26 Mar, 2018

1 commit

  • The Tile architecture is obsolete and getting removed from the kernel,
    this driver appears to only be used there, and not on the ARM based
    successors (Tile-Mx, BlueField), so we should remove it as well.

    Acked-by: Borislav Petkov
    Acked-by: Mauro Carvalho Chehab
    Signed-off-by: Arnd Bergmann

    Arnd Bergmann
     

15 Mar, 2018

1 commit

  • This just covers the topology function of the EDAC driver. We locate
    which DIMM slots are populated with NVDIMMs and query the NFIT and
    SMBIOS tables to get the size.

    Reviewed-by: Jean Delvare
    Signed-off-by: Tony Luck
    Cc: Aristeu Rozanski
    Cc: Dan Williams
    Cc: Len Brown
    Cc: Mauro Carvalho Chehab
    Cc: Qiuxu Zhuo
    Cc: "Rafael J. Wysocki"
    Cc: linux-acpi@vger.kernel.org
    Cc: linux-edac
    Cc: linux-nvdimm@lists.01.org
    Link: http://lkml.kernel.org/r/20180312182430.10335-6-tony.luck@intel.com
    Signed-off-by: Borislav Petkov

    Tony Luck
     

27 Feb, 2018

1 commit

  • The LS1021A has a memory controller supported by this driver. It builds
    just fine, and I've done some rudimentary testing using the error
    injection facility, which suggests that it is indeed working.

    Signed-off-by: Rasmus Villemoes
    Acked-by: York Sun
    Cc: Alexander Stein
    Cc: linux-edac
    Link: http://lkml.kernel.org/r/20180220150912.2954-1-rasmus.villemoes@prevas.dk
    Signed-off-by: Borislav Petkov

    Rasmus Villemoes
     

27 Nov, 2017

1 commit

  • TI Keystone and DRA7xx SoCs have support for EDAC on DDR3 memory that can
    correct one bit errors and detect two bit errors. Add EDAC driver for this
    feature which plugs into the generic kernel EDAC framework.

    Signed-off-by: Tero Kristo
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-edac
    Cc: linux-omap@vger.kernel.org
    Link: http://lkml.kernel.org/r/1510578490-14510-1-git-send-email-t-kristo@ti.com
    [ Add SPDX tag and make _emif_get_id() use edac_printk(). ]
    Signed-off-by: Borislav Petkov

    Tero Kristo
     

27 Apr, 2017

1 commit


10 Apr, 2017

2 commits


27 Mar, 2017

1 commit

  • Add support for Cavium ThunderX EDAC capable on-chip peripherals, namely
    the DRAM controller (LMC), cache coherent processor interconnect (CCPI)
    and level 2 cache blocks (L2C-TAD, L2C-MCI, L2C-CBC)

    Signed-off-by: Sergey Temerkhanov
    Cc: David.Daney@cavium.com
    Cc: Jan.Glauber@cavium.com
    Cc: linux-edac
    Link: http://lkml.kernel.org/r/20170324222837.60583-1-s.temerkhanov@gmail.com
    Signed-off-by: Borislav Petkov

    Sergey Temerkhanov
     

23 Mar, 2017

1 commit


16 Mar, 2017

1 commit

  • Initial target for this driver is the Intel Apollo Lake platform and
    Denverton micro-server, they use the same internal memory controller IP
    called Pondicherry2.

    Memory controller registers are not in PCI config space like earlier
    Intel memory controllers. For Apollo Lake platform they are accessed via
    a "side-band" interface, for Denverton micro-server they are access via
    PCI config space and memory map I/O. This driver is for Apollo Lake and
    Denverton, but only the Denverton is fully enabled while we wait for the
    sideband driver.

    Apollo lake driver and initial cut at Denverton driver by Tony Luck.
    Extensive cleanup, refactoring and basic verification by Qiuxu Zhuo.

    Signed-off-by: Tony Luck
    Signed-off-by: Qiuxu Zhuo
    Cc: linux-edac
    Link: http://lkml.kernel.org/r/20170308174539.14432-1-qiuxu.zhuo@intel.com
    Signed-off-by: Borislav Petkov

    Tony Luck
     

05 Oct, 2016

1 commit

  • Pull EDAC updates from Borislav Petkov:
    "A lot of movement in the EDAC tree this time around, coarse summary
    below:

    - Altera Arria10 enablement of NAND, DMA, USB, QSPI and SD-MMC FIFO
    buffers (Thor Thayer)

    - split the memory controller part out of mpc85xx and share it with a
    new Freescale ARM Layerscape driver (York Sun)

    - amd64_edac fixes (Yazen Ghannam)

    - misc cleanups, refactoring and fixes all over the place"

    * tag 'edac_for_4.9' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (37 commits)
    EDAC, altera: Add IRQ Flags to disable IRQ while handling
    EDAC, altera: Correct EDAC IRQ error message
    EDAC, amd64: Autoload module using x86_cpu_id
    EDAC, sb_edac: Remove NULL pointer check on array pci_tad
    EDAC: Remove NO_IRQ from powerpc-only drivers
    EDAC, fsl_ddr: Fix error return code in fsl_mc_err_probe()
    EDAC, fsl_ddr: Add entry to MAINTAINERS
    EDAC: Move Doug Thompson to CREDITS
    EDAC, I3000: Orphan driver
    EDAC, fsl_ddr: Replace simple_strtoul() with kstrtoul()
    EDAC, layerscape: Add Layerscape EDAC support
    EDAC, fsl_ddr: Fix IRQ dispose warning when module is removed
    EDAC, fsl_ddr: Add support for little endian
    EDAC, fsl_ddr: Add missing DDR DRAM types
    EDAC, fsl_ddr: Rename macros and names
    EDAC, fsl-ddr: Separate FSL DDR driver from MPC85xx
    EDAC, mpc85xx: Replace printk() with pr_* format
    EDAC, mpc85xx: Drop setting/clearing RFXE bit in HID1
    EDAC, altera: Rename MC trigger to common name
    EDAC, altera: Rename device trigger to common name
    ...

    Linus Torvalds
     

01 Sep, 2016

1 commit

  • Add DDR EDAC driver for ARM-based compatible controllers. Both
    big-endian and little-endian are supported, as specified in device tree.

    Signed-off-by: York Sun
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-edac
    Link: http://lkml.kernel.org/r/1471990465-27443-1-git-send-email-york.sun@nxp.com
    Signed-off-by: Borislav Petkov

    York Sun
     

22 Aug, 2016

1 commit

  • This is an entirely new driver instead of yet another set of patches
    to sb_edac.c because:

    1) Mapping from PCI devices to socket/memory controller is significantly
    different. Skylake scatters devices on a socket across a number of
    PCI buses.
    2) There is an extra level of interleaving via the "mcroute" register
    that would be a little messy to squeeze into the old driver.
    3) Validation is getting too expensive. Changes to sb_edac need to
    be checked against Sandy Bridge, Ivy Bridge, Haswell, Broadwell and
    Knights Landing.

    Acked-by: Aristeu Rozanski
    Acked-by: Borislav Petkov
    Signed-off-by: Tony Luck
    Signed-off-by: Linus Torvalds

    Tony Luck
     

10 Aug, 2016

1 commit

  • Add Altera Arria10 SD-MMC FIFO memory EDAC support. The SD-MMC is a
    dual port RAM implementation which is different than any of the other
    peripherals and therefore requires additional code.

    Signed-off-by: Thor Thayer
    Cc: dinguyen@opensource.altera.com
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-edac
    Link: http://lkml.kernel.org/r/1470753653-23465-3-git-send-email-tthayer@opensource.altera.com
    Signed-off-by: Borislav Petkov

    Thor Thayer
     

08 Aug, 2016

1 commit

  • Add Altera Arria10 QSPI FIFO memory support.

    Signed-off-by: Thor Thayer
    Cc: dinguyen@opensource.altera.com
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: linux-edac
    Link: http://lkml.kernel.org/r/1468512408-5156-9-git-send-email-tthayer@opensource.altera.com
    Signed-off-by: Borislav Petkov

    Thor Thayer