05 Mar, 2021
1 commit
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Change-Id: I9dd6b8dd4ff1d25608a9264ecc1facb2df649818
04 Mar, 2021
2 commits
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Without this patch, G_REC601_NTSC and NL_REC709 are used by opipe
with 480/576/240/288 height for default colorimetry. However, for those
kinds of opipe configurations, there is no valid entry to be found in
dcss_cfg_table[] if ipipe uses framebuffer in 32bit RGB pixel formats and
YUV pixel formats, which eventually leads to atomic check failure.
To make those cases work, this patch uses G_REC709 and NL_REC709 for
opipe as a workaround.Signed-off-by: Laurentiu Palcu
Reviewed-by: Liu Ying
Acked-by: Jason Liu -
According to the latest DC ADD(DisplayControllerSubsystem_MX8_B0_v0.58),
the DPR burst length of GPU standard tile should be 256byte or 512byte
in case of underrun with 256byte.Based on tests done by Android team, 256byte works without DC underrun
issue(tracked by errata "ERR050183: DC: 4Kp60 performance limitations")
on both i.MX8qm and i.MX8qxp, while with the underrun issue by using
the original 128byte burst length.So, this patch uses 256byte burst length first for GPU standard tile
since there should be only improvement and no downgrade or regression
(subject to change to 512byte in case of underrun).Signed-off-by: Liu Ying
Tested-by: Richard Liu
02 Mar, 2021
1 commit
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android display hal has refined the logic to use block commit when
there is overlay but without android out fence. This android out
fence patch can be reverted now.Revert "MA-14133 Enable android out fence and normal out fence simultaneously"
This reverts commit d5d94e0e13b5bdf8b3ab4f60341e00898bbaf3c2.
Change-Id: I8ef48ba46350324965e055e5314c837472aead6d
Signed-off-by: Richard Liu
21 Feb, 2021
3 commits
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Handle HDCP_STATE_INACTIVE and HDCP_STATE_DISABLING state priority
to avoid unnecessary HPD state check, drm has check it when hdcp
enable/disable.Signed-off-by: Sandor Yu
Reviewed-by: Robby Cai
Acked-by: Jason Liu -
FW alive check function may return false in hdcp enable/disable stress test.
Add more time for FW alive check, make sure get correct state.Signed-off-by: Sandor Yu
Reviewed-by: Robby Cai
Acked-by: Jason Liu -
Polling thread check_work is designed to handle all hdcp state change.
In HDCP disable function, check_work thread will be stopped after
hdcp.state is set to HDCP_STATE_DISABLING. check_work thread may miss
the state change, call check link function make sure HDCP_STATE_DISABLING
state is properly handled.Signed-off-by: Sandor Yu
Reviewed-by: Robby Cai
Acked-by: Jason Liu
01 Feb, 2021
1 commit
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Change-Id: Ief0d6fac10385c5f7d99ab7a9ac3932a7a637913
28 Jan, 2021
2 commits
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The latest batch of RM67191 panels have an issue that the panel display
will get blurred and have no response to later display actions when read
data from panel through DSI interface.And decrease the pixel clock rate to 121MHz which means decrease the
panel's frame rate from 60.02Hz to 55.02Hz can solve this issue, so
do this change to make RM67191 display more stable.Signed-off-by: Fancy Fang
Reviewed-by: Robby Cai -
According to the .transfer function definition in mipi_dsi_host_ops,
on success it shall return the number of bytes transmitted for write
packets or the number of bytes received for read packets. So correct
the return value in sec_mipi_dsim_host_transfer() implementation.Signed-off-by: Fancy Fang
Reviewed-by: Robby Cai
26 Jan, 2021
3 commits
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After rotations were introduced for Vivante tiled/super-tiled formats and these
formats were also allowed for video channels, the tile type was adjusted only
if the framebuffer modifier was linear or belonged to Vivante tiled types. For
tiled video formats, the modifier is none of those and the tiled type remained
unchanged from the previous run.Tiled video formats are handled by DTRC and DPR always fetches the linear buffers
directly from DTRC.This patch fixes the regression. Also, add a meaningful error message if a wrong
modifier is passed to DPR for the graphics/video path.Fixes: 69c833ef382c ("LF-2580: drm/imx/dcss: add 90/270 rotations for Vivante tiled formats.")
Signed-off-by: Laurentiu Palcu
Reviewed-by: Liu Ying -
Some HDR10 pipe configurations are not supported by DCSS.
The general idea is to use atomic check to reject the unsupported cases
by searching the array dcss_cfg_table[] to see if a valid entry can be found
or not. To do the atomic check correctly, we should track the output pipe
configurations, which is done by the newly introduced struct dcss_crtc_state.
The plane->atomic_check() function would finally check the input and output
pipe configurations by calling the helper function
dcss_plane_hdr10_pipe_cfg_is_supported().Tested-by: Laurentiu Palcu
Reviewed-by: Laurentiu Palcu
Signed-off-by: Liu Ying -
This patch adds the to_dcss_crtc() helper function to make callers'
life easier.Tested-by: Laurentiu Palcu
Reviewed-by: Laurentiu Palcu
Signed-off-by: Liu Ying
25 Jan, 2021
2 commits
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Add mode_valid() implementation for CRTC to filter out any
mode which cannot be supported by LCDIF. Only check the
CEA and DMT modes for pixel clock round rate is same with
the value from mode.Signed-off-by: Fancy Fang
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Change-Id: I173bc0325c93daaf82bb894f77ba35fa827864de
22 Jan, 2021
6 commits
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Check return value to fix Coverity Issue: 11566403.
Signed-off-by: Sandor Yu
Reviewed-by: Robby Cai -
Check return value to fix coverity Issue: 11566404.
Signed-off-by: Sandor Yu
Reviewed-by: Robby Cai -
Delete unused code to fix coverity Issue: 11566405.
Signed-off-by: Sandor Yu
Reviewed-by: Robby Cai -
Delete dead code to fix Coverity Issue: 11566407.
Signed-off-by: Sandor Yu
Reviewed-by: Robby Cai -
Add default access hdcp bus to fix
Coverity Issue: 11566406 Uninitialized scalar variable.Signed-off-by: Sandor Yu
Reviewed-by: Robby Cai -
The 'dmt' is duplicated by 'drm_mode_find_dmt()' and it
should be explicitly freed after it has been used to avoid
memory leak.This issue is detected by Coverity with CID 1149970.
Signed-off-by: Fancy Fang
Reviewed-by: Robby Cai
20 Jan, 2021
19 commits
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This is the 5.10.9 stable release
* tag 'v5.10.9': (153 commits)
Linux 5.10.9
netfilter: nf_nat: Fix memleak in nf_nat_init
netfilter: conntrack: fix reading nf_conntrack_buckets
...Signed-off-by: Jason Liu
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This is the 5.10.8 stable release
* tag 'v5.10.8': (104 commits)
Linux 5.10.8
tools headers UAPI: Sync linux/fscrypt.h with the kernel sources
drm/panfrost: Remove unused variables in panfrost_job_close()
...Signed-off-by: Jason Liu
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This is the 5.10.7 stable release
* tag 'v5.10.7': (144 commits)
Linux 5.10.7
scsi: target: Fix XCOPY NAA identifier lookup
rtlwifi: rise completion at the last step of firmware callback
...Signed-off-by: Jason Liu
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This is the 5.10.6 stable release
* tag 'v5.10.6': (21 commits)
Linux 5.10.6
mwifiex: Fix possible buffer overflows in mwifiex_cmd_802_11_ad_hoc_start
exec: Transform exec_update_mutex into a rw_semaphore
...Signed-off-by: Jason Liu
Conflicts:
drivers/rtc/rtc-pcf2127.c -
Because the dprc related driver need to probe and init before DPU driver probe
and init. The DPU driver cannot work normally when do defer probe before dprc
driver init. This issue is introduced into car related image because of boot
time optimization patch.
The probe order depends on Makefile order. So change the Makefile order to make
dprc driver init before DPU driver init.Error Log as below and it will reboot:
[ 7.781433] [drm] [CRTC:67:crtc-1] dpu_crtc_atomic_enable: wait for safety shdld done timeout
[ 8.805426] [drm] [CRTC:67:crtc-1] dpu_crtc_atomic_enable: wait for content shdld done timeoutChange-Id: Ib8167bcc92531fd6b906ec4039f40d6989ae3c20
Signed-off-by: Zhang Bo -
This is the 5.10.5 stable release
* tag 'v5.10.5': (63 commits)
Linux 5.10.5
device-dax: Fix range release
ext4: avoid s_mb_prefetch to be zero in individual scenarios
...Signed-off-by: Jason Liu
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commit 09aa9e45863e9e25dfbf350bae89fc3c2964482c upstream.
The mitigation is required for all gen7 platforms, now that it does not
cause GPU hangs, restore it for Ivybridge and Baytrail.Fixes: 47f8253d2b89 ("drm/i915/gen7: Clear all EU/L3 residual contexts")
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Prathap Kumar Valsan
Cc: Akeem G Abodunrin
Cc: Bloomfield Jon
Reviewed-by: Akeem G Abodunrin
Reviewed-by: Rodrigo Vivi
Link: https://patchwork.freedesktop.org/patch/msgid/20210111225220.3483-2-chris@chris-wilson.co.uk
(cherry picked from commit 008ead6ef8f588a8c832adfe9db201d9be5fd410)
Signed-off-by: Jani Nikula
Signed-off-by: Greg Kroah-Hartman -
commit 2af5268180410b874fc06be91a1b2fbb22b1be0c upstream.
For an enabled DSC during HW readout the corresponding power reference
is taken along the CRTC power domain references in
get_crtc_power_domains(). Remove the incorrect get ref from the DSI
encoder hook.Fixes: 2b68392e638d ("drm/i915/dsi: add support for DSC")
Cc: Vandita Kulkarni
Cc: Jani Nikula
Signed-off-by: Imre Deak
Reviewed-by: Anshuman Gupta
Link: https://patchwork.freedesktop.org/patch/msgid/20201209153952.3397959-1-imre.deak@intel.com
(cherry picked from commit 3a9ec563a4ff770ae647f6ee539810f1866866c9)
Signed-off-by: Jani Nikula
Signed-off-by: Greg Kroah-Hartman -
…eset-deassert MIPI-sequence
commit 00cb645fd7e29bdd20967cd20fa8f77bcdf422f9 upstream.
Commit 25b4620ee822 ("drm/i915/dsi: Skip delays for v3 VBTs in vid-mode")
added an intel_dsi_msleep() helper which skips sleeping if the
MIPI-sequences have a version of 3 or newer and the panel is in vid-mode;
and it moved a bunch of msleep-s over to this new helper.This was based on my reading of the big comment around line 730 which
starts with "Panel enable/disable sequences from the VBT spec.",
where the "v3 video mode seq" column does not have any wait t# entries.Given that this code has been used on a lot of different devices without
issues until now, it seems that my interpretation of the spec here is
mostly correct.But now I have encountered one device, an Acer Aspire Switch 10 E
SW3-016, where the panel will not light up unless we do actually honor the
panel_on_delay after exexuting the MIPI_SEQ_PANEL_ON sequence.What seems to set this model apart is that it is lacking a
MIPI_SEQ_DEASSERT_RESET sequence, which is where the power-on
delay usually happens.Fix the panel not lighting up on this model by using an unconditional
msleep(panel_on_delay) instead of intel_dsi_msleep() when there is
no MIPI_SEQ_DEASSERT_RESET sequence.Fixes: 25b4620ee822 ("drm/i915/dsi: Skip delays for v3 VBTs in vid-mode")
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201118124058.26021-1-hdegoede@redhat.com
(cherry picked from commit 6fdb335f1c9c0845b50625de1624d8445c4c4a07)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -
[ Upstream commit d863f0c7b536288e2bd40cbc01c10465dd226b11 ]
vram.size is needed when binding a gpu without an iommu and is defined
in msm_init_vram(), so run that before binding it.Signed-off-by: Craig Tatlor
Reviewed-by: Brian Masney
Tested-by: Alexey Minnekhanov
Signed-off-by: Rob Clark
Signed-off-by: Sasha Levin -
[ Upstream commit e6d5c64efaa34aae3815a9afeb1314a976142e83 ]
Navi12 HDCP & DTM deinitialization needs continue to free bo if already
created though initialized flag is not set.Reviewed-by: Alex Deucher
Signed-off-by: Jiawei Gu
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin -
[ Upstream commit 44cb39e19a05ca711bcb6e776e0a4399223204a0 ]
This patch is to fix the failure when change power profile to
"profile_peak" for renoir.Signed-off-by: Xiaojian Du
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin -
[ Upstream commit 88e21af1b3f887d217f2fb14fc7e7d3cd87ebf57 ]
When GFXOFF is enabled and GPU is idle, driver will fail to access some
registers. Therefore change to disable power gating before all access
registers with MMIO.Dmesg log is as following:
amdgpu 0000:03:00.0: amdgpu: amdgpu: finishing device.
amdgpu: cp queue pipe 4 queue 0 preemption failed
amdgpu 0000:03:00.0: amdgpu: failed to write reg 2890 wait reg 28a2
amdgpu 0000:03:00.0: amdgpu: failed to write reg 1a6f4 wait reg 1a706
amdgpu 0000:03:00.0: amdgpu: failed to write reg 2890 wait reg 28a2
amdgpu 0000:03:00.0: amdgpu: failed to write reg 1a6f4 wait reg 1a706Signed-off-by: Dennis Li
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin -
[ Upstream commit a7b5d9dd57298333e6e9f4c167f01385d922bbfb ]
fix NULL pointer issue when read sysfs amdgpu_current_backlight_pwm sysfs node.
Call Trace:
[ 248.273833] BUG: kernel NULL pointer dereference, address: 0000000000000130
[ 248.273930] #PF: supervisor read access in kernel mode
[ 248.273993] #PF: error_code(0x0000) - not-present page
[ 248.274054] PGD 0 P4D 0
[ 248.274092] Oops: 0000 [#1] SMP PTI
[ 248.274138] CPU: 2 PID: 1377 Comm: cat Tainted: G OE 5.9.0-rc5-drm-next-5.9+ #1
[ 248.274233] Hardware name: System manufacturer System Product Name/Z170-A, BIOS 3802 03/15/2018
[ 248.274641] RIP: 0010:dc_link_get_backlight_level+0x5/0x70 [amdgpu]
[ 248.274718] Code: 67 ff ff ff 41 b9 03 00 00 00 e9 45 ff ff ff d1 ea e9 55 ff ff ff 0f 1f 44 00 00 66 2e
0f 1f 84 00 00 00 00 00 0f 1f 44 00 00 8b 87 30 01 00 00 48 8b 00 48 8b 88 88 03 00 00 48 8d 81 e8 01
[ 248.274919] RSP: 0018:ffffb5ad809b3df0 EFLAGS: 00010203
[ 248.274982] RAX: ffffa0f77d1c0010 RBX: ffffa0f793ae9168 RCX: 0000000000000001
[ 248.275064] RDX: ffffa0f79753db00 RSI: 0000000000000001 RDI: 0000000000000000
[ 248.275145] RBP: ffffb5ad809b3e00 R08: ffffb5ad809b3da0 R09: 0000000000000000
[ 248.275225] R10: ffffb5ad809b3e68 R11: 0000000000000000 R12: ffffa0f793ae9190
[ 248.275306] R13: ffffb5ad809b3ef0 R14: 0000000000000001 R15: ffffa0f793ae9168
[ 248.275388] FS: 00007f5f1ec4d540(0000) GS:ffffa0f79ec80000(0000) knlGS:0000000000000000
[ 248.275480] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 248.275547] CR2: 0000000000000130 CR3: 000000042a03c005 CR4: 00000000003706e0
[ 248.275628] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
[ 248.275708] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
[ 248.275789] Call Trace:
[ 248.276124] ? current_backlight_read+0x24/0x40 [amdgpu]
[ 248.276194] seq_read+0xc3/0x3f0
[ 248.276240] full_proxy_read+0x5c/0x90
[ 248.276290] vfs_read+0xa7/0x190
[ 248.276334] ksys_read+0xa7/0xe0
[ 248.276379] __x64_sys_read+0x1a/0x20
[ 248.276429] do_syscall_64+0x37/0x80
[ 248.276477] entry_SYSCALL_64_after_hwframe+0x44/0xa9
[ 248.276538] RIP: 0033:0x7f5f1e75c191
[ 248.276585] Code: fe ff ff 48 8d 3d b7 9d 0a 00 48 83 ec 08 e8 46 4d 02 00 66 0f 1f 44 00 00 48 8d 05 71 07
2e 00 8b 00 85 c0 75 13 31 c0 0f 05 3d 00 f0 ff ff 77 57 f3 c3 0f 1f 44 00 00 41 54 55 49 89 d4 53Hw
[ 248.276784] RSP: 002b:00007ffcb1fc3f38 EFLAGS: 00000246 ORIG_RAX: 0000000000000000
[ 248.276872] RAX: ffffffffffffffda RBX: 0000000000020000 RCX: 00007f5f1e75c191
[ 248.276953] RDX: 0000000000020000 RSI: 00007f5f1ec2b000 RDI: 0000000000000003
[ 248.277034] RBP: 0000000000020000 R08: 00000000ffffffff R09: 0000000000000000
[ 248.277115] R10: 0000000000000022 R11: 0000000000000246 R12: 00007f5f1ec2b000
[ 248.277195] R13: 0000000000000003 R14: 00007f5f1ec2b00f R15: 0000000000020000
[ 248.277279] Modules linked in: amdgpu(OE) iommu_v2 gpu_sched ttm(OE) drm_kms_helper cec drm
i2c_algo_bit fb_sys_fops syscopyarea sysfillrect sysimgblt rpcsec_gss_krb5 auth_rpcgss nfsv4 nfs
lockd grace fscache nls_iso8859_1 snd_hda_codec_realtek snd_hda_codec_hdmi snd_hda_codec_generic
ledtrig_audio intel_rapl_msr intel_rapl_common snd_hda_intel snd_intel_dspcfg x86_pkg_temp_thermal
intel_powerclamp snd_hda_codec snd_hda_core snd_hwdep snd_pcm snd_seq_midi snd_seq_midi_event mei_hdcp
coretemp snd_rawmidi snd_seq kvm_intel kvm snd_seq_device snd_timer irqbypass joydev snd input_leds soundcore
crct10dif_pclmul crc32_pclmul ghash_clmulni_intel aesni_intel crypto_simd cryptd glue_helper rapl intel_cstate
mac_hid mei_me serio_raw mei eeepc_wmi wmi_bmof asus_wmi mxm_wmi intel_wmi_thunderbolt acpi_pad sparse_keymap
efi_pstore sch_fq_codel parport_pc ppdev lp parport sunrpc ip_tables x_tables autofs4 hid_logitech_hidpp
hid_logitech_dj hid_generic usbhid hid e1000e psmouse ahci libahci wmi video
[ 248.278211] CR2: 0000000000000130
[ 248.278221] ---[ end trace 1fbe72fe6f91091d ]---
[ 248.357226] RIP: 0010:dc_link_get_backlight_level+0x5/0x70 [amdgpu]
[ 248.357272] Code: 67 ff ff ff 41 b9 03 00 00 00 e9 45 ff ff ff d1 ea e9 55 ff ff ff 0f 1f 44 00 00 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 44 00 00 8b 87 30 01 00 00 48 8b 00 48 8b 88 88 03 00 00 48 8d 81 e8 01Signed-off-by: Kevin Wang
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin -
commit cc5f7e2fcbe396f2f461cd67c872af771a334bca upstream.
On the SII9022, the IOVCC and CVCC12 supplies must reach the correct
voltage before the reset sequence is initiated. On most boards, this
assumption is true at boot-up, so initialization succeeds.However, when we try to initialize the chip with incorrect supply
voltages, it will not respond to I2C requests. sii902x_probe() fails
with -ENXIO.To resolve this, look for the "iovcc" and "cvcc12" regulators, and
make sure they are enabled before starting the reset sequence. If
these supplies are not available in devicetree, then they will default
to dummy-regulator. In that case everything will work like before.This was observed on a STM32MP157C-DK2 booting in u-boot falcon mode.
On this board, the supplies would be set by the second stage
bootloader, which does not run in falcon mode.Signed-off-by: Alexandru Gagniuc
Signed-off-by: Sam Ravnborg
[Fix checkpatch warnings]
Link: https://patchwork.freedesktop.org/patch/msgid/20201020221501.260025-2-mr.nuke.me@gmail.com
Signed-off-by: Greg Kroah-Hartman -
commit 91b5e26731c5d409d6134603afc061617639933e upstream.
Separate the hardware initialization code from setting up the data
structures and parsing the device tree. The purpose of this change is
to provide a single exit point and avoid a waterfall of 'goto's in
the subsequent patch.Signed-off-by: Alexandru Gagniuc
Signed-off-by: Sam Ravnborg
Link: https://patchwork.freedesktop.org/patch/msgid/20201020221501.260025-1-mr.nuke.me@gmail.com
Signed-off-by: Greg Kroah-Hartman -
commit bb83d5fb550bb7db75b29e6342417fda2bbb691c upstream.
The pch_get_backlight(), lpt_get_backlight(), and lpt_set_backlight()
functions operate directly on the hardware registers. If inverting the
value is needed, using intel_panel_compute_brightness(), it should only
be done in the interface between hardware registers and
panel->backlight.level.The CPU mode takeover code added in commit 5b1ec9ac7ab5
("drm/i915/backlight: Fix backlight takeover on LPT, v3.") reads the
hardware register and converts to panel->backlight.level correctly,
however the value written back should remain in the hardware register
"domain".This hasn't been an issue, because GM45 machines are the only known
users of i915.invert_brightness and the brightness invert quirk, and
without one of them no conversion is made. It's likely nobody's ever hit
the problem.Fixes: 5b1ec9ac7ab5 ("drm/i915/backlight: Fix backlight takeover on LPT, v3.")
Cc: Maarten Lankhorst
Cc: Ville Syrjälä
Cc: Lyude Paul
Cc: # v5.1+
Reviewed-by: Lyude Paul
Signed-off-by: Jani Nikula
Link: https://patchwork.freedesktop.org/patch/msgid/20210108152841.6944-1-jani.nikula@intel.com
(cherry picked from commit 0d4ced1c5bfe649196877d90442d4fd618e19153)
Signed-off-by: Jani Nikula
Signed-off-by: Greg Kroah-Hartman -
commit ffaf97899c4a58b9fefb11534f730785443611a8 upstream.
MEDIA_STATE_VFE only accepts the 'maximum number of threads' in the
range [0, n-1] where n is #EU * (#threads/EU) with the number of threads
based on plaform and the number of EU based on the number of slices and
subslices. This is a fixed number per platform/gt, so appropriately
limit the number of threads we spawn to match the device.v2: Oversaturate the system with tasks to force execution on every HW
thread; if the thread idles it is returned to the pool and may be reused
again before an unused thread.v3: Fix more state commands, which was causing Baytrail to barf.
v4: STATE_CACHE_INVALIDATE requires a stall on IvybridgeCloses: https://gitlab.freedesktop.org/drm/intel/-/issues/2024
Fixes: 47f8253d2b89 ("drm/i915/gen7: Clear all EU/L3 residual contexts")
Signed-off-by: Chris Wilson
Cc: Mika Kuoppala
Cc: Prathap Kumar Valsan
Cc: Akeem G Abodunrin
Cc: Jon Bloomfield
Cc: Rodrigo Vivi
Cc: Randy Wright
Cc: stable@vger.kernel.org # v5.7+
Reviewed-by: Akeem G Abodunrin
Reviewed-by: Rodrigo Vivi
Link: https://patchwork.freedesktop.org/patch/msgid/20210111225220.3483-1-chris@chris-wilson.co.uk
(cherry picked from commit eebfb32e26851662d24ea86dd381fd0f83cd4b47)
Signed-off-by: Jani Nikula
Signed-off-by: Greg Kroah-Hartman -
commit 984cadea032b103c5824a5f29d0a36b3e9df6333 upstream.
The clear-residuals mitigation is a relatively heavy hammer and under some
circumstances the user may wish to forgo the context isolation in order
to meet some performance requirement. Introduce a generic module
parameter to allow selectively enabling/disabling different mitigations.To disable just the clear-residuals mitigation (on Ivybridge, Baytrail,
or Haswell) use the module parameter: i915.mitigations=auto,!residualsCloses: https://gitlab.freedesktop.org/drm/intel/-/issues/1858
Fixes: 47f8253d2b89 ("drm/i915/gen7: Clear all EU/L3 residual contexts")
Signed-off-by: Chris Wilson
Cc: Joonas Lahtinen
Cc: Jon Bloomfield
Cc: Rodrigo Vivi
Cc: stable@vger.kernel.org # v5.7
Reviewed-by: Jon Bloomfield
Reviewed-by: Rodrigo Vivi
Link: https://patchwork.freedesktop.org/patch/msgid/20210111225220.3483-3-chris@chris-wilson.co.uk
(cherry picked from commit f7452c7cbd5b5dfb9a6c84cb20bea04c89be50cd)
Signed-off-by: Jani Nikula
Signed-off-by: Greg Kroah-Hartman
