26 Mar, 2020
1 commit
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Now that we are using is_bin_visible callback, we do not need
nvmem_sysfs_get_groups() anymore so move all the relevant data-structures
and code to core.cSigned-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20200325131951.31887-3-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman
19 Mar, 2020
1 commit
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This patch brings support for the JZ4780 efuse. Currently it only exposes
a read only access to the entire 8K bits efuse memory and nvmem cells.To fetch for example the MAC address:
dd if=/sys/devices/platform/134100d0.efuse/jz4780-efuse0/nvmem bs=1 skip=34 count=6 status=none | xxd
Tested-by: Mathieu Malaterre
Signed-off-by: PrasannaKumar Muralidharan
Signed-off-by: Mathieu Malaterre
Signed-off-by: H. Nikolaus Schaller
Signed-off-by: Paul Cercueil
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20200310132257.23358-13-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman
17 Jan, 2020
1 commit
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QTI SDAM driver allows PMIC peripherals to access the shared memory
that is available on QTI PMICs.Use subsys_initcall as PMIC SDAM NV memory is accessed by multiple PMIC
drivers (charger, fuel gauge) to store/restore data across reboots
required during their initialization.Signed-off-by: Anirudh Ghayal
Signed-off-by: Shyam Kumar Thella
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20200116161100.30637-4-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman
06 Nov, 2019
2 commits
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Newer Rockchip socs like the px30 use a different one-time-programmable
memory controller for things like cpu-id and leakage information,
so add the necessary driver for it.Signed-off-by: Finley Xiao
[ported from vendor 4.4, converted to clock-bulk API and cleanups]
Signed-off-by: Heiko Stuebner
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20191029114240.14905-11-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
The Spreadtrum eFuse controller is widely used to dump chip ID,
configuration setting, function select and so on, as well as
supporting one-time programming.Signed-off-by: Freeman Liu
Signed-off-by: Baolin Wang
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20191029114240.14905-8-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman
20 Jun, 2019
1 commit
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This patch adds i.MX8 nvmem ocotp driver to access fuse via
RPC to i.MX8 system controller.Cc: Srinivas Kandagatla
Cc: Shawn Guo
Cc: Sascha Hauer
Cc: Pengutronix Kernel Team
Cc: Fabio Estevam
Cc: NXP Linux Team
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Peng Fan
Reviewed-by: Dong Aisheng
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
26 Apr, 2019
2 commits
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Many nvmem providers are not very keen on having default sysfs
nvmem entry, as most of the usecases for them are inside kernel
itself. And in some cases read/writes to some areas in nvmem are
restricted and trapped at secure monitor level, so accessing them
from userspace would result in board reboots.This patch adds new NVMEM_SYSFS Kconfig to make binary sysfs entry
an optional one. This provision will give more flexibility to users.
This patch also moves existing sysfs code to a new file so that its
not compiled in when its not really required.Signed-off-by: Srinivas Kandagatla
Reviewed-by: Mika Westerberg
Reviewed-by: Gaurav Kohli
Tested-by: Gaurav Kohli
Signed-off-by: Greg Kroah-Hartman -
Add a read only nvmem driver for STM32 factory-programmed memory area
(on-chip non-volatile storage).Signed-off-by: Fabrice Gasnier
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
05 Feb, 2019
1 commit
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This patch adds zynqmp nvmem firmware driver to access the
SoC revision information from the hardware register.Signed-off-by: Nava kishore Manne
Acked-by: Srinivas Kandagatla
Signed-off-by: Michal Simek
15 Jul, 2018
1 commit
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This patch add the efuse driver which is embeded in Spreadtrum SC27XX
series PMICs. The sc27xx efuse contains 32 blocks and each block's
data width is 16 bits.Signed-off-by: Freeman Liu
Signed-off-by: Baolin Wang
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
14 May, 2018
1 commit
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Add driver providing access to EEPROMs connected to RAVE SP devices
Cc: Srinivas Kandagatla
Cc: linux-kernel@vger.kernel.org
Cc: Chris Healy
Cc: Lucas Stach
Cc: Aleksander Morgado
Signed-off-by: Andrey Smirnov
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
17 Nov, 2017
1 commit
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…/git/gregkh/char-misc
Pull char/misc updates from Greg KH:
"Here is the big set of char/misc and other driver subsystem patches
for 4.15-rc1.There are small changes all over here, hyperv driver updates, pcmcia
driver updates, w1 driver updats, vme driver updates, nvmem driver
updates, and lots of other little one-off driver updates as well. The
shortlog has the full details.All of these have been in linux-next for quite a while with no
reported issues"* tag 'char-misc-4.15-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (90 commits)
VME: Return -EBUSY when DMA list in use
w1: keep balance of mutex locks and refcnts
MAINTAINERS: Update VME subsystem tree.
nvmem: sunxi-sid: add support for A64/H5's SID controller
nvmem: imx-ocotp: Update module description
nvmem: imx-ocotp: Enable i.MX7D OTP write support
nvmem: imx-ocotp: Add i.MX7D timing write clock setup support
nvmem: imx-ocotp: Move i.MX6 write clock setup to dedicated function
nvmem: imx-ocotp: Add support for banked OTP addressing
nvmem: imx-ocotp: Pass parameters via a struct
nvmem: imx-ocotp: Restrict OTP write to IMX6 processors
nvmem: uniphier: add UniPhier eFuse driver
dt-bindings: nvmem: add description for UniPhier eFuse
nvmem: set nvmem->owner to nvmem->dev->driver->owner if unset
nvmem: qfprom: fix different address space warnings of sparse
nvmem: mtk-efuse: fix different address space warnings of sparse
nvmem: mtk-efuse: use stack for nvmem_config instead of malloc'ing it
nvmem: imx-iim: use stack for nvmem_config instead of malloc'ing it
thunderbolt: tb: fix use after free in tb_activate_pcie_devices
MAINTAINERS: Add git tree for Thunderbolt development
...
08 Nov, 2017
1 commit
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Add eFuse driver for Socionext UniPhier series SoC.
Note that eFuse device is under soc-glue and this register
implements as read only.Signed-off-by: Keiji Hayashibara
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
02 Nov, 2017
1 commit
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Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.By default all files without license information are under the default
license of the kernel, which is GPL version 2.Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if
Reviewed-by: Philippe Ombredanne
Reviewed-by: Thomas Gleixner
Signed-off-by: Greg Kroah-Hartman
20 Oct, 2017
1 commit
-
This adds a driver to access the efuse on Amlogic Meson6, Meson8 and
Meson8b SoCs.
These SoCs are accessing the efuse IP block directly through the
registers in the "secbus" region. This makes it different from the Meson
GX efuse driver which uses the "secure monitor" firmware to access the
efuse.The efuse on Meson6 can only read one byte at a time, while the efuse on
Meson8 and Meson8b always reads 4 bytes at a time. The new driver
supports both, but due to lack of hardware Meson6 support was not tested.The hardware also supports writing. However, this is currently not
supported by the driver.Signed-off-by: Martin Blumenstingl
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
04 Oct, 2017
1 commit
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This is a driver for Low Power General Purpose Register (LPGPR)
available on i.MX6 SoCs in Secure Non-Volatile Storage (SNVS)
of this chip.It is a 32-bit read/write register located in the low power domain.
Since LPGPR is located in the battery-backed power domain, LPGPR can
be used by any application for retaining data during an SoC power-down
mode.Signed-off-by: Oleksij Rempel
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
08 Apr, 2017
1 commit
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This adds a readonly nvmem driver for the i.MX IC Identification Module
(IIM). The IIM is found on the older i.MX SoCs like the i.MX25, i.MX27,
i.MX31, i.MX35, i.MX51 and the i.MX53.The IIM can control up to 8 fuse banks with 256 bit each. Not all of the
banks are equipped on the different SoCs. The actual number of fuses
differ from 512 on the i.MX27 and 1152 on the i.MX53.The fuses are one time writable, but writing is currently not supported
in the driver.Signed-off-by: Michael Grzeschik
Signed-off-by: Sascha Hauer
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
10 Nov, 2016
2 commits
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Add support for 32 and 64-bit versions of Broadcom's On-Chip OTP
controller. These controllers are used on SoC's such as Cygnus and
Stingray.Reviewed-by: Ray Jui
Tested-by: Jonathan Richardson
Signed-off-by: Scott Branden
Signed-off-by: Oza Pawandeep
Signed-off-by: Jonathan Richardson
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Add simple read only driver for the internal OTP (One Time Programmable)
memory found on all NXP LPC18xx and LPC43xx devices.The OTP memory is split into 4 banks each with 4 32-bits word. Some of
the banks contain predefined data while others are for general purpose
and user programmable via the OTP API in ROM. Note that writing to the
OTP memory is not yet supported.Signed-off-by: Joachim Eastwood
Tested-by: Vladimir Zapolskiy
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
02 Sep, 2016
1 commit
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Add Amlogic EFUSE driver to access hardware data like ethernet address,
serial number or IDs.Acked-by: Srinivas Kandagatla
Signed-off-by: Carlo Caione
Signed-off-by: Kevin Hilman
08 Feb, 2016
2 commits
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Add Mediatek EFUSE driver to access hardware data like
thermal sensor calibration or HDMI impedance.Signed-off-by: Andrew-CT Chen
Reviewed-by: Sascha Hauer
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
This commit adds support for NXP LPC18xx EEPROM memory found in NXP
LPC185x/3x and LPC435x/3x/2x/1x devices.EEPROM size is 16384 bytes and it can be entirely read and
written/erased with 1 word (4 bytes) granularity. The last page
(128 bytes) contains the EEPROM initialization data and is not writable.Erase/program time is less than 3ms. The EEPROM device requires a
~1500 kHz clock (min 800 kHz, max 1600 kHz) that is generated dividing
the system bus clock by the division factor, contained in the divider
register (minus 1 encoded).EEPROM will be kept in Power Down mode except during read/write calls.
Signed-off-by: Ariel D'Alessandro
Acked-by: Stefan Wahren
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
04 Oct, 2015
4 commits
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There are some SoC specified values store in eFuse,
such as the cpu_leakage and cpu_version,
this driver can expose these values to /sys base on nvmem.Signed-off-by: Caesar Wang
Signed-off-by: ZhengShunQian
Acked-by: Srinivas Kandagatla
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
This patch brings read-only support for the On-Chip OTP cells
in the i.MX23 and i.MX28 processor. The driver implements the
new NVMEM provider API.Signed-off-by: Stefan Wahren
Reviewed-by: Marek Vasut
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
This driver handles the i.MX On-Chip OTP Controller found in
i.MX6Q/D, i.MX6S/DL, i.MX6SL, and i.MX6SX SoCs. Currently it
just returns the values stored in the shadow registers.Signed-off-by: Philipp Zabel
Acked-by: Srinivas Kandagatla
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
The patch adds support for the On Chip One Time Programmable Peripheral
(OCOTP) on the Vybrid platform.Signed-off-by: Sanchayan Maity
Acked-by: Srinivas Kandagatla
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
06 Aug, 2015
3 commits
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Now that we have the nvmem framework, we can consolidate the common
driver code. Move the driver to the framework, and hopefully, it will
fix the sysfs file creation race.Signed-off-by: Maxime Ripard
[srinivas.kandagatla: Moved to regmap based EEPROM framework]
Signed-off-by: Srinivas Kandagatla
Tested-by: Philipp Zabel
Tested-by: Rajendra Nayak
Signed-off-by: Greg Kroah-Hartman -
This patch adds QFPROM support driver which is used by other drivers
like thermal sensor and cpufreq.On MSM parts there are some efuses (called qfprom) these fuses store
things like calibration data, speed bins.. etc. Drivers like cpufreq,
thermal sensors would read out this data for configuring the driver.Signed-off-by: Srinivas Kandagatla
Reviewed-by: Stephen Boyd
Tested-by: Philipp Zabel
Tested-by: Rajendra Nayak
Signed-off-by: Greg Kroah-Hartman -
This patch adds just providers part of the framework just to enable easy
review.Up until now, NVMEM drivers like eeprom were stored in drivers/misc,
where they all had to duplicate pretty much the same code to register
a sysfs file, allow in-kernel users to access the content of the devices
they were driving, etc.This was also a problem as far as other in-kernel users were involved,
since the solutions used were pretty much different from on driver to
another, there was a rather big abstraction leak.This introduction of this framework aims at solving this. It also
introduces DT representation for consumer devices to go get the data
they require (MAC Addresses, SoC/Revision ID, part numbers, and so on)
from the nvmems.Having regmap interface to this framework would give much better
abstraction for nvmems on different buses.Signed-off-by: Maxime Ripard
[Maxime Ripard: intial version of eeprom framework]
Signed-off-by: Srinivas Kandagatla
Tested-by: Stefan Wahren
Tested-by: Philipp Zabel
Tested-by: Rajendra Nayak
Signed-off-by: Greg Kroah-Hartman
