31 Aug, 2020
1 commit
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Add a driver for PHY interface built into ahci controller implemented
in UniPhier SoCs. This supports PXs2 and PXs3 SoCs.Signed-off-by: Kunihiko Hayashi
Link: https://lore.kernel.org/r/1598352071-26675-3-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul
20 Mar, 2020
6 commits
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Since this phy is shared by multiple devices including USB and PCIe,
it is necessary to determine which device use this phy.
This patch adds SoC-dependent functions to determine a device using
this phy.When there is 'socionext,syscon' property in the pcie-phy node,
the driver calls SoC-dependt function instead of checking .has_syscon
in SoC-dependent data. The function configures the system controller
to use phy for PCIe.Signed-off-by: Kunihiko Hayashi
Signed-off-by: Kishon Vijay Abraham I -
Add legacy SoC support that needs to manage gio clock and reset and to skip
setting unimplemented phy parameters. This supports Pro5.This specifies only 1 port use because Pro5 doesn't set it in the power-on
sequence.Signed-off-by: Kunihiko Hayashi
Signed-off-by: Kishon Vijay Abraham I -
In case of using default parameters, communication failure might occur
in rare cases. This sets Rx sync mode parameter to avoid the issue.Signed-off-by: Kunihiko Hayashi
Signed-off-by: Kishon Vijay Abraham I -
Add legacy SoC support that needs to manage gio clock and reset.
This supports Pro5.Signed-off-by: Kunihiko Hayashi
Signed-off-by: Kishon Vijay Abraham I -
Pro5 SoC has same scheme of USB3 ss-phy as Pro4, so the data for Pro5 is
equivalent to Pro4.Signed-off-by: Kunihiko Hayashi
Signed-off-by: Kishon Vijay Abraham I -
Use devm_platform_ioremap_resource() to simplify the code.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Kishon Vijay Abraham I
21 May, 2019
1 commit
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Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:GPL-2.0-only
Signed-off-by: Thomas Gleixner
Signed-off-by: Greg Kroah-Hartman
17 Apr, 2019
1 commit
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Use devm_clk_get_optional() to get optional clock
Cc: Kunihiko Hayashi
Signed-off-by: Chunfeng Yun
Reviewed-by: Kunihiko Hayashi
Signed-off-by: Kishon Vijay Abraham I
12 Nov, 2018
1 commit
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The driver uses devm_ioremap_resource() which is only available when
CONFIG_HAS_IOMEM is set, so the driver depends on this option.Signed-off-by: Kunihiko Hayashi
Signed-off-by: Kishon Vijay Abraham I
25 Sep, 2018
1 commit
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Add a driver for PHY interface built into PCIe controller implemented
in UniPhier SoCs.Signed-off-by: Kunihiko Hayashi
Signed-off-by: Kishon Vijay Abraham I
10 Sep, 2018
2 commits
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Add a driver for PHY interface built into USB2 controller implemented on
UniPhier SoCs. This driver supports HS-PHY for Pro4 and LD11.Signed-off-by: Kunihiko Hayashi
Signed-off-by: Kishon Vijay Abraham I -
Add a driver for PHY interface built into USB3 controller
implemented in UniPhier SoCs.
This driver supports High-Speed PHY and Super-Speed PHY.Signed-off-by: Kunihiko Hayashi
Signed-off-by: Motoya Tanigawa
Signed-off-by: Masami Hiramatsu
Signed-off-by: Kishon Vijay Abraham I