30 Dec, 2020

1 commit

  • commit a4729c3506c3eb1a6ca5c0289f4e7cafa4115065 upstream.

    If the calls to devm_clk_get(), devm_spi_register_master() or
    clk_prepare_enable() fail on probe of the Mikrotik RB4xx SPI driver,
    the spi_master struct is erroneously not freed.

    Fix by switching over to the new devm_spi_alloc_master() helper.

    Fixes: 05aec357871f ("spi: Add SPI driver for Mikrotik RB4xx series boards")
    Signed-off-by: Lukas Wunner
    Cc: # v4.2+: 5e844cc37a5c: spi: Introduce device-managed SPI controller allocation
    Cc: # v4.2+
    Cc: Bert Vermeulen
    Link: https://lore.kernel.org/r/369bf26d71927f60943b1d9d8f51810f00b0237d.1607286887.git.lukas@wunner.de
    Signed-off-by: Mark Brown
    Signed-off-by: Greg Kroah-Hartman

    Lukas Wunner
     

22 May, 2020

2 commits


05 Sep, 2019

1 commit


19 Jun, 2019

1 commit

  • Based on 2 normalized pattern(s):

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license version 2 as
    published by the free software foundation

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license version 2 as
    published by the free software foundation #

    extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

    has been chosen to replace the boilerplate/reference in 4122 file(s).

    Signed-off-by: Thomas Gleixner
    Reviewed-by: Enrico Weigelt
    Reviewed-by: Kate Stewart
    Reviewed-by: Allison Randal
    Cc: linux-spdx@vger.kernel.org
    Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     

10 Oct, 2018

1 commit


02 May, 2015

1 commit


21 Apr, 2015

1 commit

  • As it turns out, the set_cs() enable parameter refers to the logic level
    on the CS pin, not the state of chip selection.

    This broke functionality of the LEDs behind the CPLD, or at least delayed
    the commands until another one came in to toggle CS.

    Signed-off-by: Bert Vermeulen
    Signed-off-by: Mark Brown

    Bert Vermeulen
     

18 Apr, 2015

1 commit

  • This driver mediates access between the connected CPLD and other devices
    on the bus.

    The m25p80-compatible boot flash and (some models) MMC use regular SPI,
    bitbanged as required by the SoC. However the SPI-connected CPLD has
    a two-wire mode, in which two bits are transferred per SPI clock
    cycle. The second bit is transmitted with the SoC's CS2 pin.

    Signed-off-by: Bert Vermeulen
    Signed-off-by: Mark Brown

    Bert Vermeulen