Eric Lee / smarc-fsl-linux-kernel

13 Aug, 2020

1 commit

  • 7f317d349   include/: replace HTTP links with HTTPS ones ... Browse Code »

    Rationale:
    Reduces attack surface on kernel devs opening the links for MITM
    as HTTPS traffic is much harder to manipulate.

    Signed-off-by: Alexander A. Klimov
    Signed-off-by: Andrew Morton
    Reviewed-by: Kees Cook
    Link: http://lkml.kernel.org/r/20200726110117.16346-1-grandmaster@al2klimov.de
    Signed-off-by: Linus Torvalds

    Alexander A. Klimov
     

27 Aug, 2019

1 commit

  • 174ae4e96   ARCv2: IDU-intc: Add support for edge-triggered interrupts ... Browse Code »

    This adds support for an optional extra interrupt cell to specify edge
    vs level triggered. It is backward compatible with dts files with only
    one cell, and will default to level-triggered in such a case.

    Note that I had to make a change to idu_irq_set_affinity as well, as
    this function was setting the interrupt type to "level" unconditionally,
    since this was the only type supported previously.

    Signed-off-by: Mischa Jonker
    Reviewed-by: Vineet Gupta
    Signed-off-by: Vineet Gupta

    Mischa Jonker
     

19 Jun, 2019

1 commit

  • d2912cb15   treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 ... Browse Code »

    Based on 2 normalized pattern(s):

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license version 2 as
    published by the free software foundation

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license version 2 as
    published by the free software foundation #

    extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

    has been chosen to replace the boilerplate/reference in 4122 file(s).

    Signed-off-by: Thomas Gleixner
    Reviewed-by: Enrico Weigelt
    Reviewed-by: Kate Stewart
    Reviewed-by: Allison Randal
    Cc: linux-spdx@vger.kernel.org
    Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     

01 Mar, 2018

2 commits

  • f3205de98   ARC: mcip: update MCIP debug mask when the new cpu came online ... Browse Code »

    As of today we use hardcoded MCIP debug mask, so if we launch
    kernel via debugger and kick fever cores than HW has all cpus
    hang at the momemt of setup MCIP debug mask.

    So update MCIP debug mask when the new cpu came online, instead of
    use hardcoded MCIP debug mask.

    Signed-off-by: Eugeniy Paltsev
    Signed-off-by: Vineet Gupta

    Eugeniy Paltsev
     
  • 07423d00a   ARC: mcip: halt GFRC counter when ARC cores halt ... Browse Code »

    In SMP systems, GFRC is used for clocksource. However by default the
    counter keeps running even when core is halted (say when debugging via a
    JTAG debugger). This confuses Linux timekeeping and triggers flase RCU stall
    splat such as below:

    | [ARCLinux]# while true; do ./shm_open_23-1.run-test ; done
    | Running with 1000 processes for 1000 objects
    | hrtimer: interrupt took 485060 ns
    |
    | create_cnt: 1000
    | Running with 1000 processes for 1000 objects
    | [ARCLinux]# INFO: rcu_preempt self-detected stall on CPU
    | 2-...: (1 GPs behind) idle=a01/1/0 softirq=135770/135773 fqs=0
    | INFO: rcu_preempt detected stalls on CPUs/tasks:
    | 0-...: (1 GPs behind) idle=71e/0/0 softirq=135264/135264 fqs=0
    | 2-...: (1 GPs behind) idle=a01/1/0 softirq=135770/135773 fqs=0
    | 3-...: (1 GPs behind) idle=4e0/0/0 softirq=134304/134304 fqs=0
    | (detected by 1, t=13648 jiffies, g=31493, c=31492, q=1)

    Starting from ARC HS v3.0 it's possible to tie GFRC to state of up-to 4
    ARC cores with help of GFRC's CORE register where we set a mask for
    cores which state we need to rely on.

    We update cpu mask every time new cpu came online instead of using
    hardcoded one or using mask generated from "possible_cpus" as we
    want it set correctly even if we run kernel on HW which has fewer cores
    than expected (or we launch kernel via debugger and kick fever cores
    than HW has)

    Note that GFRC halts when all cores have halted and thus relies on
    programming of Inter-Core-dEbug register to halt all cores when one
    halts.

    Signed-off-by: Alexey Brodkin
    Signed-off-by: Eugeniy Paltsev
    Signed-off-by: Vineet Gupta
    [vgupta: rewrote changelog]

    Eugeniy Paltsev
     

07 Feb, 2017

1 commit

  • 6f0310a12   ARCv2: IDU-intc: Use build registers for getting numbers of interrupts ... Browse Code »

    This enhancement is needed to allow masking all available common interrupts
    in IDU interrupt controller in boot time since the kernel can
    discover a number of them from the build register. Also now there
    is no need to specify in device tree a list of used core interrupts
    by IDU. E.g. before:

    idu_intc: idu-interrupt-controller {
    compatible = "snps,archs-idu-intc";
    interrupt-controller;
    interrupt-parent = ;
    #interrupt-cells = ;
    interrupts = ;
    };

    and after:

    idu_intc: idu-interrupt-controller {
    compatible = "snps,archs-idu-intc";
    interrupt-controller;
    interrupt-parent = ;
    #interrupt-cells = ;
    };

    Signed-off-by: Yuriy Kolerov
    Signed-off-by: Vineet Gupta

    Yuriy Kolerov
     

25 Jan, 2017

1 commit

01 Dec, 2016

3 commits