14 Dec, 2011
1 commit
-
No functionality change, this is done so that in a follow-on patch all
queued-up MCEs can be decoded after registering on the chain.Signed-off-by: Borislav Petkov
06 Oct, 2011
4 commits
-
Drop third nbcfg argument which is old remains and not required anymore.
No functionality change.
Signed-off-by: Borislav Petkov
-
MCE decoding code is reporting the core which encountered the error
unconditionally now so drop this piece. Besides, it reported the
coreid in the local processor package which is not that valuable as a
datapoint.Signed-off-by: Borislav Petkov
-
The MCi_STATUS bank has a AddrV bit which, when set, denotes that the
corresponding MCi_ADDR MSR contains a valid address belonging to the
MCE currently being reported. Dump it since it is definitely relevant
information.Signed-off-by: Borislav Petkov
-
Currently, correctable ECCs go through mcelog and do not print the scary
MCE banner. In that case, however, reporting the core where the CECC
happened is important information so dump it along with the decoded
string albeit at risk of having a minor redundancy.Signed-off-by: Borislav Petkov
17 Mar, 2011
2 commits
-
Add the PCI device ids required for driver registration. Remove
pvt->ctl_name and use the family descriptor directly, instead. Then,
bump driver version and fixup its format. Finally, enable DRAM ECC
decoding on F15h.Signed-off-by: Borislav Petkov
-
Remove reporting of errors with UC bit set - this is done by the MCE
decoding code anyway and this driver deals with DRAM ECC errors only. UC
(NB uncorrectable error) doesn't necessarily mean it is a DRAM error.
Remove unused macros while at it.Signed-off-by: Borislav Petkov
07 Jan, 2011
13 commits
-
Minor formatting fixup since the information which core was associated
with the MCE is not always valid.Signed-off-by: Borislav Petkov
-
Building for X86_32 produces shift count warnings, so use BIT_64() to
eliminate the warnings.drivers/edac/mce_amd.c:778: warning: left shift count >= width of type
drivers/edac/mce_amd.c:778: warning: left shift count >= width of typeSigned-off-by: Randy Dunlap
Cc: Doug Thompson
Cc: bluesmoke-devel@lists.sourceforge.net
Signed-off-by: Borislav Petkov -
Now that everything is inplace, enable MCE decoding on F15h. Make
initcall routine a bit more readable.Signed-off-by: Borislav Petkov
-
Shorten up MCi_STATUS flags and add BD's new deferred and poison types.
Also, simplify formatting.Signed-off-by: Borislav Petkov
-
Make macro names shorter thus making code shorter and more clear.
Signed-off-by: Borislav Petkov
-
Add decoder for FP MCEs.
Signed-off-by: Borislav Petkov
-
Integrate the single FIROB signature into an expanded table along with
the new BD MCE types.Signed-off-by: Borislav Petkov
-
by (almost) reusing the F10h one since the signatures are the same.
Signed-off-by: Borislav Petkov
-
F15h BD doesn't generate LS MCEs so warn about it.
Signed-off-by: Borislav Petkov
-
MCE bank 2 is redefined from a BU to a CU (Combined Unit) bank on F15h.
Add a decoder function for CU MCEs.Signed-off-by: Borislav Petkov
-
Add support for decoding F15h IC MCEs.
Signed-off-by: Borislav Petkov
-
Add a decoder for F15h DC MCEs to support the new types of DC MCEs
introduced by the BD microarchitecture.Signed-off-by: Borislav Petkov
-
F15h enlarges the extended error code of an MCE to a 5-bit field
(MCi_STATUS[20:16]). Add a mask variable which default 0xf is overridden
on F15h.Signed-off-by: Borislav Petkov
21 Oct, 2010
13 commits
-
Fix
drivers/edac/mce_amd.c:262: warning: left shift count >= width of type
on 32-bit builds.
Reported-by: Randy Dunlap
Signed-off-by: Borislav Petkov -
Turn on MCE decoding on F12h.
Signed-off-by: Borislav Petkov
-
F12h is completely covered by the generic path.
Signed-off-by: Borislav Petkov
-
... which is the same as for K8 and F10h.
Signed-off-by: Borislav Petkov
-
F12h DC MCE signatures are a subset of F10h's so reuse them.
Signed-off-by: Borislav Petkov
-
F11h has almost the same MCE signatures as K8 except DRAM ECC and MC5
bank errors. Reuse functionality from the other families.Signed-off-by: Borislav Petkov
-
Now that all decoders have been taught about F14h, models < 0x10
MCEs, enable decoding on this family of CPUs. Also, issue a short
informational message upon boot that MCE decoding gets enabled.Signed-off-by: Borislav Petkov
-
Those are N/A on K8, so don't decode them there.
Signed-off-by: Borislav Petkov
-
Add support for decoding F14h BU MCEs and improve decoding of the
remaining families.Signed-off-by: Borislav Petkov
-
F14h CPUs do not generate LS MCEs so exit early and warn the user in
case this path is ever hit that something else might be going haywire.Signed-off-by: Borislav Petkov
-
Add support for IC MCEs for F14h CPUs. K8 and F10h are almost identical
so use one function for both.Signed-off-by: Borislav Petkov
-
Add a per-family data cache decoders. Since there is a certain overlap
between the different DC MCE signatures, reuse functionality between the
families as far as possible.Signed-off-by: Borislav Petkov
-
Drop "edac_" string from the filenames since they're prefixed with edac/
in their pathname anyway.Signed-off-by: Borislav Petkov