24 Oct, 2019

7 commits

  • 1. the start command is mixed with transfer data,
    separate them and make code more clear
    2. some condition of start_code_bypass is missing.
    3. config the pStreamBuffDesc only before send start command

    Signed-off-by: ming_qian
    Reviewed-by: Shijie Qin
    (cherry picked from commit 775033eb3dcba27a2b7093caccbc81c1df55ba46)

    ming_qian
     
  • If firmware report sequence header twice,
    and the user don't support the format, such as 10-bit NV12,
    user may close vpu decoder directly, it will send stop cmd.
    but when driver receive the second sequence header event,
    it may waiting for resolution change done,
    it'll block the stop command, and cause it timeout.

    Signed-off-by: ming_qian
    Reviewed-by: Shijie Qin
    (cherry picked from commit 9e1d28861a6f89b9f25641131f8db1ef17b81d3a)

    ming_qian
     
  • Correct frame_byte typedef to int in order to align with
    update_stream_addr_vpu() typedef, it maybe negative.

    Signed-off-by: Shijie Qin
    Reviewed-by: ming_qian
    (cherry picked from commit b04249f00b7cb28a17d3b7b992d565ca0edbee28)

    Shijie Qin
     
  • change event

    If b_firstseq is cleared after sending source change event,
    user may get invalid frame size.

    Signed-off-by: ming_qian
    Reviewed-by: Shijie Qin
    Reviewed-by: Zhou Peng
    (cherry picked from commit 6794c08937d4b9b1f8509935ebaeb1072af0b4aa)

    ming_qian
     
  • Free space may not enough when (end - wptr < SCODE_SIZE),
    add this check.

    Signed-off-by: Shijie Qin
    (cherry picked from commit ce944686a765f514a70e4731379179df30dbba0a)

    Shijie Qin
     
  • 1. change to use list record performance info for better trace each
    time-point and not limited to a fixed flow.
    2. add total time from open device to each time-point.

    Signed-off-by: Shijie Qin
    Reviewed-by: Zhou Peng
    Reviewed-by: ming_qian
    (cherry picked from commit 563d17921b33e3b1be96414ef80535146f00edb5)

    Shijie Qin
     
  • There are no u/v planars in the pixel formats
    IPU_PIX_FMT_BGRA4444/IPU_PIX_FMT_BGRA5551/IPU_PIX_FMT_AYUV,
    so we should explicitly get zero u/v_offset from __ipu_ch_offset_calc()
    for those pixel formats. Without this patch, '-EINVAL' will be
    returned from __ipu_ch_offset_calc() as the function return value
    and input parameter u/v_offset will not be touched, which is not a
    good behavior, because the caller is likely to ignore the function
    return value and take the u/v_offset as valid value. The MXC IPUv3 fb
    driver is a such kind of caller, which may get the u/v_offset
    for those pixel formats without checking the function return value,
    and hence wrongly pass the u/v_offset to PRE driver(finally causes
    malfunction).

    Signed-off-by: Liu Ying
    (cherry picked from commit c1ff0b03944e5196497be4f606979f5cb0c1b413)

    Liu Ying
     

19 Oct, 2019

1 commit


11 Oct, 2019

1 commit


08 Oct, 2019

1 commit


23 Sep, 2019

1 commit


17 Sep, 2019

1 commit

  • Problems:
    - GPU hang when run Google Earth apk on 8MM EVK board
    - Android DEQP/SKQP CTS have random failures
    - Khronos ES20 CTS have random failures

    Analysis:
    GPU got stuck in shader module when process specific data format,
    this is caused by VSI GCNanoUltra Errata(HBN1286), which does not set
    the specific intermediate register to 0 in hardware reset sequence after power up,
    this wrong register will cause the unexpected result when process specific data type,
    wrong behavior will happen and may cause out of bound access in shader programming.

    Fix:
    GPU driver will submit the predefined command(dummy draw) with fake stream and shader,
    also set scissor with (0,0,0,0) to avoid draw out, no pixel output on hardware pipeline,
    this workaround can set the specific register to 0 as the effective SW remedy.

    Impact:
    No obvious functionality and performance impact with dummy draw workaround,
    it only takes several cycles in command fetch --> vertex shader --> primitive,
    and then cull out of reset of GPU pipelines.

    This patch can fix the same GPU problem for 7ULP.

    Signed-off-by: Xianzhong
    (cherry picked from commit b14813c419b1f733c0945e99fc403b7a25774d24)

    Xianzhong
     

11 Sep, 2019

2 commits


10 Sep, 2019

1 commit


30 Aug, 2019

3 commits


27 Aug, 2019

1 commit


23 Aug, 2019

2 commits


20 Aug, 2019

1 commit


19 Aug, 2019

2 commits


16 Aug, 2019

1 commit


15 Aug, 2019

2 commits


05 Aug, 2019

2 commits


02 Aug, 2019

3 commits


01 Aug, 2019

1 commit


29 Jul, 2019

1 commit


26 Jul, 2019

4 commits


25 Jul, 2019

1 commit

  • the amount of REL_FRAME_BUFF event may be much bigger the BUFF_RDY
    event.
    it means that some frame buffer are not used for decoding,
    and firmware just release it directly.

    The frame who is need to skip is decoded but not ready.

    Signed-off-by: ming_qian
    Reviewed-by: Shijie Qin

    ming_qian
     

23 Jul, 2019

1 commit