27 Sep, 2006
2 commits
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Restore PCI Express capability registers after PM event.
This includes maxumum MTU for PCI express and other vital data.Signed-off-by: Michael S. Tsirkin
Signed-off-by: Greg Kroah-Hartman -
* 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6: (225 commits)
[PATCH] Don't set calgary iommu as default y
[PATCH] i386/x86-64: New Intel feature flags
[PATCH] x86: Add a cumulative thermal throttle event counter.
[PATCH] i386: Make the jiffies compares use the 64bit safe macros.
[PATCH] x86: Refactor thermal throttle processing
[PATCH] Add 64bit jiffies compares (for use with get_jiffies_64)
[PATCH] Fix unwinder warning in traps.c
[PATCH] x86: Allow disabling early pci scans with pci=noearly or disallowing conf1
[PATCH] x86: Move direct PCI scanning functions out of line
[PATCH] i386/x86-64: Make all early PCI scans dependent on CONFIG_PCI
[PATCH] Don't leak NT bit into next task
[PATCH] i386/x86-64: Work around gcc bug with noreturn functions in unwinder
[PATCH] Fix some broken white space in ia32_signal.c
[PATCH] Initialize argument registers for 32bit signal handlers.
[PATCH] Remove all traces of signal number conversion
[PATCH] Don't synchronize time reading on single core AMD systems
[PATCH] Remove outdated comment in x86-64 mmconfig code
[PATCH] Use string instructions for Core2 copy/clear
[PATCH] x86: - restore i8259A eoi status on resume
[PATCH] i386: Split multi-line printk in oops output.
...
26 Sep, 2006
2 commits
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Some buggy systems can machine check when config space accesses
happen for some non existent devices. i386/x86-64 do some early
device scans that might trigger this. Allow pci=noearly to disable
this. Also when type 1 is disabling also don't do any early
accesses which are always type1.This moves the pci= configuration parsing to be a early parameter.
I don't think this can break anything because it only changes
a single global that is only used by PCI.Cc: gregkh@suse.de
Cc: Trammell HudsonSigned-off-by: Andi Kleen
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Convert some framework code to handle the new PRETHAW message.
- IDE just treats it like a FREEZE.
- The pci_choose_state() thingie still doesn't use PCI_D0 when it gets a
FREEZE (and now PRETHAW) event, which seems rather buglike but wasn't
something to change with this patch.Signed-off-by: David Brownell
Cc: "Rafael J. Wysocki"
Cc: Pavel Machek
Signed-off-by: Andrew Morton
Signed-off-by: Greg Kroah-Hartman
13 Jul, 2006
1 commit
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When changing power states from D0->DX and then from DX->D0, some
Intel PCIE chipsets will cause a device reset to occur. This will
cause problems for any D State other than D3, since any state
information that the driver will expect to be present coming from
a D1 or D2 state will have been cleared. This patch addes a
flag to the pci_dev structure to indicate that devices should
not use states D1 or D2, and will set that flag for the affected
chipsets. This patch also modifies pci_set_power_state() so that
when a device driver tries to set the power state on
a device that is downstream from an affected chipset, or on one
of the affected devices it only allows state changes to or
from D0 & D3. In addition, this patch allows the delay time
between D3->D0 to be changed via a quirk. These chipsets also
need additional time to change states beyond the normal 10ms.Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman
28 Jun, 2006
1 commit
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This is needed if we wish to change the size of the resource structures.
Based on an original patch from Vivek Goyal
Cc: Vivek Goyal
Signed-off-by: Andrew Morton
Signed-off-by: Greg Kroah-Hartman
27 Jun, 2006
1 commit
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acquired (aquired)
contiguous (contigious)
successful (succesful, succesfull)
surprise (suprise)
whether (weather)
some other misspellingsSigned-off-by: Andreas Mohr
Signed-off-by: Adrian Bunk
22 Jun, 2006
2 commits
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Brice said the pci_save_msi_state breaks his driver in his special usage
(not in suspend/resume), as pci_save_msi_state will disable msi mode. In
his usage, pci_save_state will be called at runtime, and later (after
the device operates for some time and has an error) pci_restore_state
will be called.
In another hand, suspend/resume needs disable msi mode, as device should
stop working completely. This patch try to workaround this issue.
Drivers are expected call pci_disable_device in suspend time after
pci_save_state.Signed-off-by: Shaohua Li
Signed-off-by: Greg Kroah-Hartman -
If a device is already enabled, don't bother reenabling it.
Signed-off-by: Kristen Carlson Accardi
Acked-By: Arjan van de Ven
Signed-off-by: Greg Kroah-Hartman
14 Jun, 2006
1 commit
12 Jun, 2006
2 commits
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According to Intel ICH spec, there are several rules that Base Address
should be programmed before IOSE (PCICMD register ) enabled.For example ICH7:
12.1.3 SATA : the base address register for the bus master register
should be programmed before this bit is set.11.1.3: PCICMD (USB): The base address register for USB should be
programmed before this bit is set.
....To make sure kernel code follow this rule , and prevent unnecessary
confusion. I proposal this patch.Signed-off-by: Luming Yu
Signed-off-by: Andrew Morton
Signed-off-by: Greg Kroah-Hartman -
At least one laptop blew up on resume from suspend with a black screen due
to a lack of this patch. By only writing back config space that is
different, we minimise the possibility of accidents like this.Signed-off-by: Dave Jones
Signed-off-by: Andrew Morton
Signed-off-by: Greg Kroah-Hartman
24 May, 2006
1 commit
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This patch revives pci_find_ext_capability (has been disabled a couple month
ago since it was not used anywhere. See http://lkml.org/lkml/2006/1/20/247).
It will now be used by the myri10ge driver.Signed-off-by: Brice Goglin
Signed-off-by: Andrew J. Gallatindrivers/pci/pci.c | 3 +--
include/linux/pci.h | 2 ++
2 files changed, 3 insertions(+), 2 deletions(-)
Signed-off-by: Jeff Garzik
15 Apr, 2006
3 commits
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* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (169 commits)
commit 78a596b4490e17b9990d87b9d468ef5bb70daa10
Author: Adrian Bunk
Date: Fri Mar 31 01:38:12 2006 -0800[PATCH] remove kernel/power/pm.c:pm_unregister()
Since the last user is removed in -mm, we can now remove this long deprecated
function.Signed-off-by: Adrian Bunk
Cc: Pavel Machek
Signed-off-by: Andrew Morton
Signed-off-by: Greg Kroah-Hartmancommit 21440d313358043b0ce5e43b00ff3c9b35a8616c
Author: David Brownell
Date: Sat Apr 1 10:21:52 2006 -0800[PATCH] dma doc updates
...
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Add MSI(X) configure sapce save/restore in generic PCI helper.
Signed-off-by: Shaohua Li
Signed-off-by: Greg Kroah-Hartman -
Print more diagnostic info to help identify the source of power management
suspend failures.Example:
usb_hcd_pci_suspend(): pci_set_power_state+0x0/0x1af() returns -22
pci_device_suspend(): usb_hcd_pci_suspend+0x0/0x11b() returns -22
suspend_device(): pci_device_suspend+0x0/0x34() returns -22Work-in-progress. It needs lots more suspend_report_result() calls sprinkled
everywhere.Cc: Patrick Mochel
Cc: Pavel Machek
Cc: Nigel Cunningham
Signed-off-by: Andrew Morton
Signed-off-by: Greg Kroah-Hartman
24 Mar, 2006
4 commits
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Add missing 'const' to pci_request_region[s] 'res_name' arg,
since we pass it directly to __request_region(), whose 'name' arg
is also const.Signed-off-by: Greg Kroah-Hartman
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Several drivers are starting to grow options to disable MSI. However,
it's often a host chipset issue, not something which individual drivers
should handle. So we add the pci=nomsi kernel parameter to allow the user
to disable MSI modes for systems we haven't added to the quirk list yet.Signed-off-by: Matthew Wilcox
Signed-off-by: Randy Dunlap
Acked-by: Jeff Garzik
Signed-off-by: Greg Kroah-Hartman -
Change the semantics of this call to return the max reserved
bus number instead of just the max assigned bus number.Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman -
Clean up: move assignments outside of if() statements.
AFAICT, no functional change. Easier to read/understand.Depends on "[PATCH 1/3] msi vector targeting abstractions"
by Mark Maule .
I expect one hunk to fail if applied against 2.6.15.This is essentially Joe Perches' patch.
I've cleaned up the one instance added by Mark's patch.Signed-off-by: Grant Grundler
Signed-off-by: Greg Kroah-Hartman
01 Feb, 2006
1 commit
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This patch #if 0's the unused global function pci_find_ext_capability().
Signed-off-by: Adrian Bunk
Signed-off-by: Greg Kroah-Hartman
10 Jan, 2006
2 commits
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This patch contains the following cleanups:
- hotplug/pciehp_core.c: make the needlessly global hpdriver_context
static
- #if 0 the following unused functions:
- pci.c: pci_bus_max_busnr()
- pci.c: pci_max_busnr()
- proc.c: pci_proc_attach_bus()
- remove.c: pci_remove_device_safeSigned-off-by: Adrian Bunk
Signed-off-by: Greg Kroah-Hartman -
Use the stored value of the interrupt pin rather than try to read
the config again.Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman
11 Nov, 2005
1 commit
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Some devices have more than one capability of the same type. For
example, the PCI header for the PathScale InfiniPath looks like:04:01.0 InfiniBand: Unknown device 1fc1:000d (rev 02)
Subsystem: Unknown device 1fc1:000d
Flags: bus master, fast devsel, latency 0, IRQ 193
Memory at fea00000 (64-bit, non-prefetchable) [size=2M]
Capabilities: [c0] HyperTransport: Slave or Primary Interface
Capabilities: [f8] HyperTransport: Interrupt Discovery and ConfigurationThere are _two_ HyperTransport capabilities, and the PathScale driver
wants to look at both of them.The current pci_find_capability() API doesn't work for this, since it
only allows us to get to the first capability of a given type. The
patch below introduces a new pci_find_next_capability(), which can be
used in a loop likefor (pos = pci_find_capability(pdev, );
pos;
pos = pci_find_next_capability(pdev, pos, )) {
/* ... */
}Signed-off-by: Roland Dreier
Signed-off-by: Matthew Wilcox
Signed-off-by: Greg Kroah-Hartman
31 Oct, 2005
1 commit
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I recently picked up my older work to remove unnecessary #includes of
sched.h, starting from a patch by Dave Jones to not include sched.h
from module.h. This reduces the number of indirect includes of sched.h
by ~300. Another ~400 pointless direct includes can be removed after
this disentangling (patch to follow later).
However, quite a few indirect includes need to be fixed up for this.In order to feed the patches through -mm with as little disturbance as
possible, I've split out the fixes I accumulated up to now (complete for
i386 and x86_64, more archs to follow later) and post them before the real
patch. This way this large part of the patch is kept simple with only
adding #includes, and all hunks are independent of each other. So if any
hunk rejects or gets in the way of other patches, just drop it. My scripts
will pick it up again in the next round.Signed-off-by: Tim Schmielau
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
29 Oct, 2005
2 commits
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PCI: add descriptions for missing function parameters.
Eliminate all kernel-doc warnings here.Signed-off-by: Randy Dunlap
Signed-off-by: Greg Kroah-Hartman -
Cleanup the need_restore switch statement in
pci_set_power_state(). This makes it more safe by explicitly handling
all the PCI power states instead of handling them as the default
case. It also reads a little better IMHO.Signed-off-by: John W. Linville
Signed-off-by: Greg Kroah-Hartman
15 Sep, 2005
1 commit
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Certain (SGI?) ia64 boxes object to having their PCI BARs
restored unless absolutely necessary. This patch restricts calling
pci_restore_bars from pci_set_power_state unless the current state
is PCI_UNKNOWN, the actual (i.e. physical) state of the device is
PCI_D3hot, and the device indicates that it will lose its configuration
when transitioning to PCI_D0.Signed-off-by: John W. Linville
Signed-off-by: Linus Torvalds
10 Sep, 2005
1 commit
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Previous INTx cleanup patch had a bug that was not caught. I found
this last night during testing and can confirm that it is now 100%
working.Signed-off-by: Brett Russ
Signed-off-by: Greg Kroah-Hartman
Acked-by: Jeff Garzik
Signed-off-by: Linus Torvalds
09 Sep, 2005
5 commits
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Simple cleanup to eliminate X copies of the pci_enable_intx() function
in libata. Moved ahci.c's pci_intx() to pci.c and use it throughout
libata and msi.c.Signed-off-by: Brett Russ
Signed-off-by: Greg Kroah-Hartman -
- support PCI PM CAP version 3 (as defined in PCI PM Interface Spec v1.2)
- pci/probe.c sets the PM state initially to 4 which is D3cold. add a
PCI_UNKNOWN- minor cleanups
Signed-off-by: Daniel Ritz
Signed-off-by: Andrew Morton
Signed-off-by: Greg Kroah-Hartman -
This patch (as552) fixes yet another small problem recently added. If an
attempt to put a PCI device back into D0 fails because the device doesn't
support PCI PM, it shouldn't count as error. Without this patch the UHCI
controllers on my Intel motherboard don't work.Signed-off-by: Alan Stern
Signed-off-by: Greg Kroah-Hartman -
Signed-off-by: Greg Kroah-Hartman
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Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration
(including BARs) when transitioning from D3hot->D0. This leaves such
a device in an inaccessible state. The patch below causes the BARs
to be restored when enabling such a device, so that its driver will
be able to access it.The patch also adds pci_restore_bars as a new global symbol, and adds a
correpsonding EXPORT_SYMBOL_GPL for that.Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a
(re)boot. Most drivers call pci_enable_device very early, so devices
left in D3hot that lose configuration during the D3hot->D0 transition
will be inaccessible to their drivers.Drivers could be modified to account for this, but it would
be difficult to know which drivers need modification. This is
especially true since often many devices are covered by the same
driver. It likely would be necessary to replicate code across dozens
of drivers.The patch below should trigger only when transitioning from D3hot->D0
(or at boot), and only for devices that have the "no soft reset" bit
cleared in the PM control register. I believe it is safe to include
this patch as part of the PCI infrastructure.The cleanest implementation of pci_restore_bars was to call
pci_update_resource. Unfortunately, that does not currently exist
for the sparc64 architecture. The patch below includes a null
implemenation of pci_update_resource for sparc64.Some have expressed interest in making general use of the the
pci_restore_bars function, so that has been exported to GPL licensed
modules.Signed-off-by: John W. Linville
Signed-off-by: Greg Kroah-Hartman
05 Sep, 2005
1 commit
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This adds type-checking to pm_message_t, so that people can't confuse it
with int or u32. It also allows us to fix "disk yoyo" during suspend (disk
spinning down/up/down).[We've tried that before; since that cpufreq problems were fixed and I've
tried make allyes config and fixed resulting damage.]Signed-off-by: Pavel Machek
Signed-off-by: Alexander Nyberg
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
09 Aug, 2005
1 commit
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Revert commit fec59a711eef002d4ef9eb8de09dd0a26986eb77, which is
breaking sparc64 that doesn't have a working pci_update_resource.We'll re-do this after 2.6.13 when we'll do it all properly.
05 Aug, 2005
1 commit
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Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration
(including BARs) when transitioning from D3hot->D0. This leaves such
a device in an inaccessible state. The patch below causes the BARs
to be restored when enabling such a device, so that its driver will
be able to access it.The patch also adds pci_restore_bars as a new global symbol, and adds a
correpsonding EXPORT_SYMBOL_GPL for that.Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a
(re)boot. Most drivers call pci_enable_device very early, so devices
left in D3hot that lose configuration during the D3hot->D0 transition
will be inaccessible to their drivers.Drivers could be modified to account for this, but it would
be difficult to know which drivers need modification. This is
especially true since often many devices are covered by the same
driver. It likely would be necessary to replicate code across dozens
of drivers.The patch below should trigger only when transitioning from D3hot->D0
(or at boot), and only for devices that have the "no soft reset" bit
cleared in the PM control register. I believe it is safe to include
this patch as part of the PCI infrastructure.The cleanest implementation of pci_restore_bars was to call
pci_update_resource. Unfortunately, that does not currently exist
for the sparc64 architecture. The patch below includes a null
implemenation of pci_update_resource for sparc64.Some have expressed interest in making general use of the the
pci_restore_bars function, so that has been exported to GPL licensed
modules.Signed-off-by: John W. Linville
Signed-off-by: Greg Kroah-Hartman
Signed-off-by: Linus Torvalds
13 Jul, 2005
1 commit
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Signed-off-by: Len Brown
12 Jul, 2005
2 commits
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Suggested-by: Greg KH
Signed-off-by: Len Brown -
platform_pci_set_power_state()
and ACPI can answerhttp://bugzilla.kernel.org/show_bug.cgi?id=4277
Signed-off-by: David Shaohua Li
Signed-off-by: Len Brown