Eric Lee / smarc-fsl-linux-kernel

27 Sep, 2006

2 commits

  • 6397c75cb   MSI: Blacklist PCI-E chipsets depending on Hypertransport MSI capability ... Browse Code »

    Introduce msi_ht_cap_enabled() to check the MSI capability in the
    Hypertransport configuration space.
    It is used in a generic quirk quirk_msi_ht_cap() to check whether
    MSI is enabled on hypertransport chipset, and a nVidia specific quirk
    quirk_nvidia_ck804_msi_ht_cap() where two 2 HT MSI mappings have to
    be checked.
    Both quirks set the PCI_BUS_FLAGS_NO_MSI bus flag when MSI is disabled.

    Signed-off-by: Brice Goglin
    Signed-off-by: Greg Kroah-Hartman

    Brice Goglin
     
  • 3f79e107f   MSI: Cleanup existing MSI quirks ... Browse Code »

    Move MSI quirks in CONFIG_PCI_MSI, document why the serverworks quirk
    does not simply set PCI_BUS_FLAGS_NO_MSI, and create a generic quirk
    for other chipsets where setting PCI_BUS_FLAGS_NO_MSI is fine.

    Signed-off-by: Brice Goglin
    Signed-off-by: Greg Kroah-Hartman

    Brice Goglin
     

04 Sep, 2006

1 commit

01 Sep, 2006

1 commit

  • 1ae4f9ba8   USB: Add VIA quirk fixup for VT8235 usb2 ... Browse Code »

    Patch to add VIA PCI quirk for Enhanced/Extended USB on VT8235
    southbridge. It is needed in order to use EHCI/USB 2.0 with ACPI.
    Without it IRQs are not routed correctly, you get an "Unlink after
    no-IRQ?" error and the device is unusable.

    I belive this could also be a fix for Bugzilla Bug 5835.

    Signed-off-by: Mark Hindley
    Signed-off-by: Greg Kroah-Hartman

    Mark Hindley
     

30 Aug, 2006

1 commit

27 Aug, 2006

1 commit

  • 65ae4dddb   [PATCH] PCI: fix ICH6 quirks ... Browse Code »

    - add the ICH6(R) LPC to the ICH6 ACPI quirks. currently only the ICH6-M
    is handled. [ PCI_DEVICE_ID_INTEL_ICH6_1 is the ICH6-M LPC, ICH6_0 is
    the ICH6(R) ]

    - remove the wrong quirk calling asus_hides_smbus_lpc() for ICH6. the
    register modified in asus_hides_smbus_lpc() has a different meaning in
    ICH6.

    Signed-off-by: Daniel Ritz
    Acked-by: Jean Delvare
    Signed-off-by: Andrew Morton
    Signed-off-by: Greg Kroah-Hartman

    Daniel Ritz
     

21 Aug, 2006

1 commit

20 Aug, 2006

1 commit

04 Aug, 2006

1 commit

26 Jul, 2006

1 commit

13 Jul, 2006

3 commits

  • ffadcc2ff   [PATCH] PCI: PCIE power management quirk ... Browse Code »

    When changing power states from D0->DX and then from DX->D0, some
    Intel PCIE chipsets will cause a device reset to occur. This will
    cause problems for any D State other than D3, since any state
    information that the driver will expect to be present coming from
    a D1 or D2 state will have been cleared. This patch addes a
    flag to the pci_dev structure to indicate that devices should
    not use states D1 or D2, and will set that flag for the affected
    chipsets. This patch also modifies pci_set_power_state() so that
    when a device driver tries to set the power state on
    a device that is downstream from an affected chipset, or on one
    of the affected devices it only allows state changes to or
    from D0 & D3. In addition, this patch allows the delay time
    between D3->D0 to be changed via a quirk. These chipsets also
    need additional time to change states beyond the normal 10ms.

    Signed-off-by: Kristen Carlson Accardi
    Signed-off-by: Greg Kroah-Hartman

    Kristen Carlson Accardi
     
  • 709cf5ea7   [PATCH] PCI: Clear abnormal poweroff flag on VIA southbridges, fix resume ... Browse Code »

    Some VIA southbridges contain a flag in the ACPI register space that
    indicates whether an abnormal poweroff has occured, presumably with the
    intention that it can be cleared on clean shutdown. Some BIOSes check this
    flag at resume time, and will re-POST the system rather than jump back to
    the OS if it's set. Clearing it at boot time appears to be sufficient.
    I'm not sure if drivers/pci/quirks.c is the right place to do it, but I'm
    not sure where would be cleaner.

    [akpm@osdl.org: cleanups, build fix]
    Signed-off-by: Matthew Garrett
    Cc: Greg KH
    Cc: "Brown, Len"
    Cc: "Yu, Luming"
    Signed-off-by: Andrew Morton
    Signed-off-by: Greg Kroah-Hartman

    Matthew Garrett
     
  • 15e0c6943   [PATCH] ide: fix Jmicron support ... Browse Code »

    Prior to 2.6.18rc1 you could install with devices on a JMicron chipset
    using the "all-generic-ide" option. As of this kernel the AHCI driver
    grabs the controller and rams it into AHCI mode losing the PATA ports
    and making CD drives and the like vanish. The all-generic-ide option
    fails because the AHCI driver grabbed the PCI device and reconfigured
    it.

    To fix this three things are needed.

    #1 We must put the chip into dual function mode
    #2 The AHCI driver must grab only function 0 (already in your rc1 tree)
    #3 Something must grab the PATA ports

    The attached patch is the minimal risk edition of this. It puts the chip
    into dual function mode so that AHCI will grab the SATA ports without
    losing the PATA ports. To keep the risk as low as possible the third
    patch adds the PCI identifiers for the PATA port and the FN check to the
    ide-generic driver. There is a more featured jmicron driver on its way
    but that adds risk and the ide-generic support is sufficient to install
    and run a system.

    The actual chip setup done by the quirk is the precise setup recommended
    by the vendor.

    (The JMB368 appears only in the ide-generic entry as it has no AHCI so
    does not need the quirk)

    Signed-off-by: Alan Cox
    Acked-by: Jeff Garzik
    Signed-off-by: Linus Torvalds

    Alan Cox
     

12 Jul, 2006

1 commit

  • c67646641   Add PIIX4 APCI quirk for the 440MX chipset too ... Browse Code »

    This is confirmed to fix a hang due to PCI resource conflicts with
    setting up the Cardbus bridge on old laptops with the 440MX chipsets.
    Original report by Alessio Sangalli, lspci debugging help by Pekka
    Enberg, and trial patch suggested by Daniel Ritz:

    "From the docs available i would _guess_ this thing is really similar
    to the 82443BX/82371AB combination. at least the SMBus base address
    register is hidden at the very same place (32bit at 0x90 in function
    3 of the "south" brigde)"

    The dang thing is largely undocumented, but the patch was corroborated
    by Asit Mallick:

    "I am trying to find the register information. 440MX is an integration of
    440BX north-bridge without AGP and PIIX4E (82371EB). PIIX4 quirk
    should cover the ACPI and SMBus related I/O registers."

    and verified to fix the problem by Alessio.

    Cc: Daniel Ritz
    Cc: Asit Mallick
    Cc: Pekka Enberg
    Cc: Ivan Kokshaysky
    Cc: Dmitry Torokhov
    Tested-by: Alessio Sangalli
    Signed-off-by: Linus Torvalds

    Linus Torvalds
     

01 Jul, 2006

1 commit

22 Jun, 2006

3 commits

  • cf34a8e07   [PATCH] PCI: nVidia quirk to make AER PCI-E extended capability visible ... Browse Code »

    The nVidia CK804 PCI-E chipset supports the AER extended capability
    but sometimes fails to link it (with some BIOS or after a warm reboot).
    It makes the AER cap invisible to pci_find_ext_capability().

    The patch adds a quirk to set the missing bit that controls the
    linking of the capability.
    By the way, it removes the corresponding code in the myri10ge driver.

    Signed-off-by: Brice Goglin
    Signed-off-by: Loic Prylli
    Signed-off-by: Greg Kroah-Hartman

    Brice Goglin
     
  • bd91fde95   [PATCH] PCI: MSI-K8T-Neo2-Fir: run only where needed ... Browse Code »

    Be more selective when running the MSI-K8T-Neo2Fir soundcard PCI quirk so
    as not to run this on hardware where it's probably not needed.

    Signed-off-by: Chris Wedgwood
    Signed-off-by: Andrew Morton
    Signed-off-by: Greg Kroah-Hartman

    Chris Wedgwood
     
  • bd8481e16   [PATCH] PCI Bus Parity Status-broken hardware attribute, EDAC foundation ... Browse Code »

    Currently, the EDAC (error detection and correction) modules that are in
    the kernel contain some features that need to be moved. After some good
    feedback on the PCI Parity detection code and interface
    (http://www.ussg.iu.edu/hypermail/linux/kernel/0603.1/0897.html) this
    patch ADDs an new attribute to the pci_dev structure: Namely the
    'broken_parity_status' bit.

    When set this indicates that the respective hardware generates false
    positives of Parity errors.

    The EDAC "blacklist" solution was inferior and will be removed in a
    future patch.

    Also in this patch is a PCI quirk.c entry for an Infiniband PCI-X card
    which generates false positive parity errors.

    I am requesting comments on this AND on the possibility of a exposing
    this 'broken_parity_status' bit to userland via the PCI device sysfs
    directory for devices. This access would allow for enabling of this
    feature on new devices and for old devices that have their drivers
    updated. (SLES 9 SP3 did this on an ATI motherboard video device). There
    is a need to update such a PCI attribute between kernel releases.

    This patch just adds a storage place for the attribute and a quirk entry
    for a known bad PCI device. PCI Parity reaper/harvestor operations are
    in EDAC itself and will be refactored to use this PCI attribute instead
    of its own mechanisms (which are currently disabled) in the future.

    Signed-off-by: Doug Thompson
    Signed-off-by: Greg Kroah-Hartman

    Doug Thompson
     

16 May, 2006

2 commits

  • ce007ea59   [PATCH] smbus unhiding kills thermal management ... Browse Code »

    Do not enable the SMBus device on Asus boards if suspend is used. We do
    not reenable the device on resume, leading to all sorts of undesirable
    effects, the worst being a total fan failure after resume on Samsung P35
    laptop.

    Signed-off-by: Carl-Daniel Hailfinger
    Signed-off-by: Pavel Machek
    Cc:
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Carl-Daniel Hailfinger
     
  • a7b862f66   [PATCH] VIA quirk fixup, additional PCI IDs ... Browse Code »

    An earlier commit (75cf7456dd87335f574dcd53c4ae616a2ad71a11) changed an
    overly-zealous PCI quirk to only poke those VIA devices that need it.
    However, some PCI devices were not included in what I hope is now the full
    list. Consequently we're failing to run the quirk on all machines which need
    it, causing IRQ routing failures.

    This should I hope correct this.

    Thanks to Masoud Sharbiani for pointing this out
    and testing the fix.

    Signed-off-by: Chris Wedgwood
    Cc: Greg KH
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Chris Wedgwood
     

28 Apr, 2006

1 commit

20 Apr, 2006

1 commit

  • 7daa0c4f5   [PATCH] MSI-K8T-Neo2-Fir OnboardSound and additional Soundcard ... Browse Code »

    On the MSI-K8T-NEO2 FIR ( Athlon-64, Socket 939 with VIA-K8T800- Chipset
    and onboard Sound,... ) the BIOS lets you choose "DISABLED" or "AUTO" for
    the On-Board Sound Device.

    If you add another PCI-Sound-Card the BIOS disables the on-board device.

    So far I have a Quirk, that does set the correspondent BIT in the
    PCI-registers to enable the soundcard.

    But how to ensure that the code is executed ONLY on excactly this kind of
    boards (not any other with similar Chipset)?

    Cc: Jaroslav Kysela
    Acked-by: Takashi Iwai
    Cc: Lee Revell
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Johannes Goecke
     

15 Apr, 2006

2 commits

24 Mar, 2006

4 commits

18 Jan, 2006

1 commit

10 Jan, 2006

1 commit

  • 9d265124d   [PATCH] PCI Quirk: 1K I/O space granularity on Intel P64H2 ... Browse Code »
    132

    I've implemented a quirk to take advantage of the 1KB I/O space
    granularity option on the Intel P64H2 PCI Bridge. I had to change
    probe.c because it sets the resource start and end to be aligned on 4k
    boundaries (after the quirk sets them to 1k boundaries). I've tested
    this patch on a Unisys ES7000-600 both with and without the 1KB option
    enabled. I also tested this on a 2 processor Dell box that doesn't have
    a P64H2 to make sure there were no negative affects there.

    Signed-off-by: Dan Yeisley
    Signed-off-by: Greg Kroah-Hartman

    Daniel Yeisley
     

13 Dec, 2005

1 commit

  • 2bd0fa3b6   [PATCH] add boot option to control Intel SATA/PATA combined mode ... Browse Code »

    Combined mode sucks. Especially when both libata and the legacy IDE
    drivers try to drive ports on the same device, since that makes DMA
    rather difficult.

    This patch addresses the problem by allowing the user to control which
    driver binds to the ports in a combined mode configuration. In many
    cases, they'll probably want the libata driver to control both ports
    since it can use DMA for talking with ATAPI devices (when
    libata.atapi_enabled=1 of course). It also allows the user to get old
    school behavior by letting the legacy IDE driver bind to both ports.
    But neither is forced, the patch doesn't change current behavior unless
    one of combined_mode=ide or combined_mode=libata is passed
    on the boot line. Either of those options may require you to access
    your devices via different device nodes (/dev/hd* in the ide case
    and /dev/sd* in the libata case), though of course if you have udev
    installed nicely you may not notice anything. :)

    Let me know if the documentation is too cryptic, I'd be happy to expand
    on it if necessary. I think most users will want to boot with
    'combined_mode=libata' and add 'options libata atapi_enabled=1'
    to their modules.conf to get good DVD playing and disk behavior
    (haven't tested CD or DVD writing though).

    I'd much rather things behave sanely by default (i.e. DMA for devices on
    both ports), but apparently that's difficult given the various chip
    bugs and hardware configs out there (not to mention that people's
    drives may suddenly change from /dev/hdc to /dev/sdb), so this boot
    option may be the correct long term fix.

    Signed-off-by: Jesse Barnes
    Signed-off-by: Jeff Garzik

    Jesse Barnes
     

11 Nov, 2005

2 commits

31 Oct, 2005

1 commit

29 Oct, 2005

4 commits

  • 7586269c0   [PATCH] USB: move handoff code ... Browse Code »

    This moves the PCI quirk handling for USB host controllers from the
    PCI directory to the USB directory. Follow-on patches will need to:

    (a) merge these copies with the originals in the HCD reset methods.
    they don't wholly agree, despite doing the very same thing; and

    (b) eventually change it so "usb-handoff" is the default, to help
    get more robust USB/BIOS/input/... interactions.

    Signed-off-by: David Brownell
    Signed-off-by: Greg Kroah-Hartman

    drivers/Makefile | 2
    drivers/pci/quirks.c | 253 ---------------------------------------
    drivers/usb/Makefile | 1
    drivers/usb/host/Makefile | 5
    drivers/usb/host/pci-quirks.c | 272 ++++++++++++++++++++++++++++++++++++++++++
    5 files changed, 280 insertions(+), 253 deletions(-)

    David Brownell
     
  • e3b1bd572   [PATCH] PCI: Add quirk for SMBus on HP D530 ... Browse Code »

    One more SMBus unhiding quirk, this time for the HP D530. Requested and
    successfully tested by Ben Cranston.

    Signed-off-by: Jean Delvare
    Signed-off-by: Greg Kroah-Hartman

    Jean Delvare
     
  • acc06632e   [PATCH] unhide ICH6 SMBus - take 2 ... Browse Code »

    This patch unhides hidden SMBus on ICH6 chipset installed in
    Asus M6V notebook. I would like to thank Michal Mleczko for
    testing and help.

    Signed-Off-By: Rudolf Marek
    Signed-off-by: Greg Kroah-Hartman

    drivers/pci/quirks.c | 24 ++++++++++++++++++++++++
    1 file changed, 24 insertions(+)

    R.Marek@sh.cvut.cz
     
  • 2cea752f6   [PATCH] PCI: ICH6 ACPI and GPIO quirk ... Browse Code »

    This patch just adds ACPI and GPIO regions to its LPC bridge, similar
    way as ICH4 did. I would like to thank Michal Mleczko for testing.

    Signed-off-by: Rudolf Marek
    Signed-off-by: Greg Kroah-Hartman

    drivers/pci/quirks.c | 12 ++++++++++++
    1 file changed, 12 insertions(+)

    R.Marek@sh.cvut.cz
     

26 Oct, 2005

1 commit

  • 6693e74a1   PCI: be more verbose about resource quirks ... Browse Code »

    When reserving an PCI quirk, note that in the kernel bootup messages.

    Also, parse the strange PIIX4 device resources - they should get their
    own PCI resource quirks, but for now just print out what it finds to
    verify that the code does the right thing.

    Signed-off-by: Linus Torvalds

    Linus Torvalds
     

18 Oct, 2005

1 commit

  • cc675230a   [PATCH] Fix and clean up quirk_intel_ide_combined() configuration ... Browse Code »

    This change makes quirk_intel_ide_combined() dependent on the precise
    conditions under which it is needed:

    * IDE is built in
    * IDE SATA option is not set
    * ata_piix or ahci drivers are enabled

    This fixes an issue where some modular configurations would not cause
    the quirk to be enabled.

    Signed-off-by: Jeff Garzik
    Signed-off-by: Linus torvalds

    Jeff Garzik