24 Sep, 2009

2 commits

  • Add support for the Freescale MPC83xx memory controller to the existing
    driver for the Freescale MPC85xx memory controller. The only difference
    between the two processors are in the CS_BNDS register parsing code, which
    has been changed so it will work on both processors.

    The L2 cache controller does not exist on the MPC83xx, but the OF
    subsystem will not use the driver if the device is not present in the OF
    device tree.

    I had to change the nr_pages calculation to make the math work out. I
    checked it on my board and did the math by hand for a 64GB 85xx using 64K
    pages. In both cases, nr_pages * PAGE_SIZE comes out to the correct
    value.

    Signed-off-by: Ira W. Snyder
    Signed-off-by: Doug Thompson
    Cc: Kumar Gala
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Ira W. Snyder
     
  • Based on Kumar's new compatible types patch, add P2020 into MPC85xx EDAC
    compatible lists so that EDAC can recognize P2020 meomry controller and L2
    cache controller and export the relevant fields to sysfs.

    EDAC MPC85xx DDR3 support is needed if DDR3 memory stick is installed on a
    P2020DS board so that EDAC core can recognize DDR3 memory type.

    Signed-off-by: Yang Shi
    Acked-by: Dave Jiang
    Signed-off-by: Doug Thompson
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Yang Shi
     

01 Jul, 2009

1 commit


22 Apr, 2009

1 commit

  • Error found by Jeff Haran.

    The error detect register is 0s when no errors are detected. The check
    code is incorrect, so reverse check sense.

    Reported-by: Jeff Haran
    Signed-off-by: Dave Jiang
    Signed-off-by: Doug Thompson
    Cc: Benjamin Herrenschmidt
    Acked-by: Kumar Gala
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Dave Jiang
     

25 Mar, 2009

1 commit


07 Jan, 2009

1 commit

  • All other compatibles that are uniquely identifying the processor use a
    prefix of the form fsl,mpc85...'. We add support for it so we can
    deprecate the older 'fsl,85...' that was improperly used here.

    Additionally added mpc8536 & mpc8560 to the compatible lists.

    This patch is based on Nate's 8572 patch.

    Signed-off-by: Kumar Gala
    Signed-off-by: Doug Thompson
    Acked-by: Dave Jiang
    Cc: Nate Case
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Kumar Gala
     

17 Oct, 2008

1 commit

  • This adds support for the dual-core MPC8572 processor. We have
    to support making SPR changes on each core. Also, since we can
    have multiple memory controllers sharing an interrupt, flag the
    interrupts with IRQF_SHARED.

    Signed-off-by: Andrew Kilkenny
    Signed-off-by: Nate Case
    Acked-by: Dave Jiang
    Signed-off-by: Doug Thompson
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Andrew Kilkenny
     

26 Jul, 2008

1 commit

  • Convert PCI err device from platform to open firmware of_dev to comply
    with powerpc schemes.

    [akpm@linux-foundation.org: coding-style fixes]
    Signed-off-by: Dave Jiang
    Signed-off-by: Doug Thompson
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Dave Jiang
     

25 May, 2008

1 commit

  • including of causes build problems since it doesn't exist.

    Also removed warning:
    drivers/edac/mpc85xx_edac.c:45: warning: 'mpc85xx_ctl_name' defined but not used

    Signed-off-by: Kumar Gala
    Acked-by: Doug Thompson
    Acked-by: Dave Jiang
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Kumar Gala
     

08 Feb, 2008

2 commits