11 Feb, 2015

3 commits

  • This patch introduces generic code to perform PM domain look-up using
    device tree and automatically bind devices to their PM domains.

    Generic device tree bindings are introduced to specify PM domains of
    devices in their device tree nodes.

    Backwards compatibility with legacy Samsung-specific PM domain bindings
    is provided, but for now the new code is not compiled when
    CONFIG_ARCH_EXYNOS is selected to avoid collision with legacy code.
    This will change as soon as the Exynos PM domain code gets converted to
    use the generic framework in further patch.

    This patch was originally submitted by Tomasz Figa when he was employed
    by Samsung.

    Link: http://marc.info/?l=linux-pm&m=139955349702152&w=2
    Signed-off-by: Ulf Hansson
    Acked-by: Rob Herring
    Tested-by: Philipp Zabel
    Reviewed-by: Kevin Hilman
    Signed-off-by: Rafael J. Wysocki
    (cherry picked from commit aa42240ab2544a8bcb2efb400193826f57f3175e)
    (cherry picked from commit 4a2d7a846761e3b86e08b903e5a1a088686e2181)

    Tomasz Figa
     
  • Keep all power-domains already enabled by bootloader on, even if no
    driver has claimed them. This is useful for debug and development, but
    should not be needed on a platform with proper driver support.

    Signed-off-by: Tushar Behera
    Signed-off-by: Rafael J. Wysocki
    (cherry picked from commit 39ac5ba51b69a77a30d2e783aed02ec73c9f6d70)
    (cherry picked from commit 8507e882be1aa8363d229e6dbc8367c963e37bd3)

    Tushar Behera
     
  • This reverts commit 4aa055cb0634bc8d0389070104fe6aa7cfa99b8c.
    Signed-off-by: Robin Gong

    (cherry picked from commit e599f64de890a60a3b9884dd5838c43472f145e2)

    Robin Gong
     

28 Jan, 2015

1 commit


26 Jan, 2015

1 commit


21 Jan, 2015

2 commits


16 Jan, 2015

33 commits

  • The 'big-endian-data' property is originally used to indicate whether the
    LSB firstly or MSB firstly will be transmitted to the CODEC or received
    from the CODEC, and there has nothing relation to the memory data.

    Generally, if the audio data in big endian format, which will be using the
    bytes reversion, Here this can only be used to bits reversion.

    So using the 'lsb-first' instead of 'big-endian-data' can make the code
    to be readable easier and more easy to understand what this property is
    used to do.

    This property used for configuring whether the LSB or the MSB is transmitted
    first for the fifo data.

    Signed-off-by: Xiubo Li
    Acked-by: Nicolin Chen
    Signed-off-by: Mark Brown
    (cherry picked from commit eadb0019d206591e34e864b62059b292e157d8fc)

    Xiubo Li
     
  • Signed-off-by: Xiubo Li
    Signed-off-by: Mark Brown
    (cherry picked from commit 014fd22ef9c6a7e9536b7e16635714a1a34810a8)

    Xiubo Li
     
  • It is used to indicate whether we use SoC's usb charger
    detection or not. Besides, we add anatop phandle since
    we need to use anatop register to do most of charger detect operations.

    Signed-off-by: Peter Chen

    Li Jun
     
  • The new property "ddrsmp" was added into device tree. Update the doc
    accordingly.

    Signed-off-by: Ye.Li
    (cherry picked from commit 4239df12c5d6c3ac19a25e120ffe17df93c358a3)

    Ye.Li
     
  • Add compatible string for imx6sx-usbmisc.

    Signed-off-by: Peter Chen

    Peter Chen
     
  • Add the example for how to enable USB as system wakeup source.

    Signed-off-by: Peter Chen

    Peter Chen
     
  • Enable DMA support on i.mx6. The read speed can increase from 600KB/s
    to 1.2MB/s on i.mx6q. You can disable or enable dma function in dts.
    If not set "dma-names" in dts, spi will use PIO mode. This patch only
    validate on i.mx6, not i.mx5, but encourage ones to apply this patch
    on i.mx5 since they share the same IP.

    Note:
    Sometime, there is a weid data in rxfifo after one full tx/rx
    transfer finish by DMA on i.mx6dl, so we disable dma functhion on
    i.mx6dl.

    Signed-off-by: Frank Li
    Signed-off-by: Robin Gong
    Acked-by: Marek Vasut
    Signed-off-by: Mark Brown
    (cherry picked from commit f62caccd12c17e4cb516d43a6e4dd8a3abc1f7e0)
    (cherry picked from commit b87c98a8944c76840ed1375ed4792ef608de5c01)

    Robin Gong
     
  • add optional property devicetree for SPI slave nodes
    into devicetree so that LSB mode can be enabled by devicetree.

    Signed-off-by: Zhao Qiang
    Signed-off-by: Mark Brown
    (cherry picked from commit cd6339e6ced387ad67b5551dd2931cfd7e8b970b)
    (cherry picked from commit 09623c20b3e6b11a914343d4b0f15b63e683f0d8)

    Zhao Qiang
     
  • Support for Wake-on-LAN using Magic Packet. ENET IP supports sleep mode
    in low power status, when system enter suspend status, Magic packet can
    wake up system even if all SOC clocks are gate. The patch doing below things:
    - flagging the device as a wakeup source for the system, as well as
    its Wake-on-LAN interrupt
    - prepare the hardware for entering WoL mode
    - add standard ethtool WOL interface
    - enable the ENET interrupt to wake us

    Tested on i.MX6q/dl sabresd, sabreauto boards, i.MX6SX arm2 boards.

    Signed-off-by: Fugang Duan
    Signed-off-by: David S. Miller

    Fugang Duan
     
  • Document the device tree binding for the WM8960 codec, and modify the
    driver to extract the platform data from device tree, if present.

    Signed-off-by: Zidan Wang
    Signed-off-by: Mark Brown
    (cherry picked from commit e2280c9040d8bc5039617af35ccf7b8ac4abb428)

    Zidan Wang
     
  • - imx6sx pcie phy has its own power regulator. Add the
    pcie phy power suppy into im6sx pcie dts and binding.
    - in order to align with imx6qdl's pcie dts, re-format
    imx6sx pcie dts.
    - in order to align with imx6qdl pcie dts format and
    keep clean of imx6 pcie driver, keep the pcie phy clock
    in imx6sx pcie dts, although it's the parent clk of the
    pcie bus clock now, and would be enabled automatically
    when pcie bus clock is enabled. secondly, it's
    possible that the external osc maybe used as source
    of the pcie_bus clk in board design in future.
    - disp_axi clock is required by pcie inbound axi port.
    Add one more clock named pcie_inbound_axi for imx6sx pcie.

    Signed-off-by: Richard Zhu

    Richard Zhu
     
  • This allows to explicitly specify the covered bus numbers in the
    devicetree, which will come in handy once we see a SoC with more than one
    PCIe host controller instance.

    Previously the driver relied on the behavior of pci_scan_root_bus() to fill
    in a range of 0x00-0xff if no valid range was found. We fall back to the
    same range if no valid DT entry was found to keep backwards compatibility,
    but now do it explicitly.

    [bhelgaas: use %pR in error message to avoid duplication]
    Signed-off-by: Lucas Stach
    Signed-off-by: Bjorn Helgaas
    Reviewed-by: Pratyush Anand
    Acked-by: Mohit Kumar
    (cherry picked from commit 4f2ebe00597c44f7dc6f88a052a2981ddcf6a0b6)

    Lucas Stach
     
  • Add support for PCIe controller in DRA7xx. This driver re-uses the
    designware core code that is already present in kernel.

    Signed-off-by: Kishon Vijay Abraham I
    Signed-off-by: Bjorn Helgaas
    Acked-by: Jingoo Han
    Cc: Rob Herring
    Cc: Pawel Moll
    Cc: Mark Rutland
    Cc: Ian Campbell
    Cc: Kumar Gala
    Cc: Jason Gunthorpe
    Cc: Mohit Kumar
    Cc: Marek Vasut
    Cc: Arnd Bergmann
    (cherry picked from commit 47ff3de911a728cdf9ecc6ad777131902cff62b4)

    Kishon Vijay Abraham I
     
  • The configuration address space has so far been specified in *ranges*,
    however it should be specified in *reg* making it a platform MEM resource.
    Hence used 'platform_get_resource_*' API to get configuration address space
    in the designware driver.

    Signed-off-by: Kishon Vijay Abraham I
    Signed-off-by: Bjorn Helgaas
    Acked-by: Mohit Kumar
    Acked-by: Jingoo Han
    Cc: Jason Gunthorpe
    Cc: Marek Vasut
    Cc: Arnd Bergmann
    (cherry picked from commit 4dd964df36d0e548e1806ec2ec275b62d4dc46e8)

    Kishon Vijay Abraham I
     
  • The glue around the core designware IP is significantly different between
    the Exynos and i.MX implementation, which is reflected in the DT bindings.

    This changes the i.MX6 binding to reuse as much as possible from the common
    designware binding and removes old cruft.

    I removed the optional GPIOs with the following reasoning:
    - disable-gpio: endpoint specific GPIO, not currently wired up in any code.
    Should be handled by the PCI device driver, not the host controller
    driver.
    - wake-up-gpio: same as above.
    - power-on-gpio: No user in any upstream DT. This should be handled by a
    regulator which shouldn't be controlled by the host driver, but rather by
    the PCI device driver.

    [bhelgaas: whitespace fixes]
    Signed-off-by: Lucas Stach
    Signed-off-by: Bjorn Helgaas

    (cherry picked from commit 1db823ee9f677e1a863cd04fda391a7520fcd0e8)

    Lucas Stach
     
  • ARM based ST Microelectronics's SPEAr1310 and SPEAr1340 SOCs have onchip
    designware PCIe controller. To make that usable, this patch adds a wrapper
    driver based on existing designware driver.

    Adds bindings for this new driver and update MAINTAINERS as well.

    Cc: linux-pci@vger.kernel.org
    Acked-by: Arnd Bergmann
    Acked-by: Bjorn Helgaas
    Acked-by: Jingoo Han
    Signed-off-by: Pratyush Anand
    Signed-off-by: Mohit Kumar
    [viresh: fixed logs/cclist/checkpatch warnings, broken into smaller patches]
    Signed-off-by: Viresh Kumar

    (cherry picked from commit 51b66a6ce12570e5ee1a249c811f7f2d74814a43)

    Conflicts:
    MAINTAINERS

    Pratyush Anand
     
  • Add support for a generic PCI host controller, such as a
    firmware-initialised device with static windows or an emulation by
    something such as kvmtool.

    The controller itself has no configuration registers and has its address
    spaces described entirely by the device-tree (using the bindings from
    ePAPR). Both CAM and ECAM are supported for Config Space accesses.

    Add corresponding documentation for the DT binding.

    [bhelgaas: currently uses the ARM-specific pci_common_init_dev() interface]
    Signed-off-by: Will Deacon
    Signed-off-by: Bjorn Helgaas
    Reviewed-by: Liviu Dudau
    (cherry picked from commit ce292991d88b77160f348fb8a3a2cf6e78f4b456)

    Conflicts:
    drivers/pci/host/Kconfig
    drivers/pci/host/Makefile

    Will Deacon
     
  • Implement machine driver for mqs, which use the sai as cpu dai.
    sai work on master mode.

    Signed-off-by: Shengjiu Wang
    (cherry picked from commit cac9eb41debc6444d753dc936cdf76874260b9e4)

    Shengjiu Wang
     
  • Implement codec driver for mqs. mqs is a very simple IP. which support:

    Word length: 16bit.
    DAI format: Left-Justified, slave mode.

    Signed-off-by: Shengjiu Wang
    (cherry picked from commit 9da6bdd2072b850e9bb910512123eff7d80a0e2f)

    Shengjiu Wang
     
  • The previous patch (ASoC: fsl_sai: Add asynchronous mode support) added
    new Device Tree bindings for Asynchronous and Synchronous modes support.
    However, these two shall not be present at the same time.

    So this patch just simply makes them exclusive so as to avoid incorrect
    Device Tree binding usage.

    Signed-off-by: Nicolin Chen
    Signed-off-by: Mark Brown
    (cherry picked from commit ce7344a4ebabe90e064d3e087727f45624cdc942)

    Nicolin Chen
     
  • SAI supports these operation modes:
    1) asynchronous mode
    Both Tx and Rx are set to be asynchronous.
    2) synchronous mode (Rx sync with Tx)
    Tx is set to be asynchronous, Rx is set to be synchronous.
    3) synchronous mode (Tx sync with Rx)
    Rx is set to be asynchronous, Tx is set to be synchronous.
    4) synchronous mode (Tx/Rx sync with another SAI's Tx)
    5) synchronous mode (Tx/Rx sync with another SAI's Rx)

    * 4) and 5) are beyond this patch because they are related with another SAI.

    As the initial version of this SAI driver, it supported 2) as default while
    the others were totally missing.

    So this patch just adds supports for 1) and 3).

    Signed-off-by: Nicolin Chen
    Signed-off-by: Mark Brown
    (cherry picked from commit 08fdf65e37d560581233e06a659f73deeb3766f9)

    Nicolin Chen
     
  • add snvs power key driver since ic team has fix some issues of SNVS on i.mx6sx

    Signed-off-by: Robin Gong
    (cherry picked from commit 3d259d1673fe9d14251f65871b77f80b0d779a22)

    Robin Gong
     
  • Adds chipidea to the list of DT vendor prefixes.

    Signed-off-by: Peter Chen
    Signed-off-by: Greg Kroah-Hartman

    Peter Chen
     
  • TPL (Targeted Peripheral List) is needed for targets host
    (OTG and Embedded Hosts) for usb certification and other
    vendor specific requirements.

    Signed-off-by: Peter Chen
    Signed-off-by: Greg Kroah-Hartman

    Peter Chen
     
  • fsl,usbphy is no optional property. This patch moves it to the list of
    required properties.

    Signed-off-by: Markus Pargmann
    Signed-off-by: Peter Chen
    Signed-off-by: Greg Kroah-Hartman

    Markus Pargmann
     
  • This adds Vybrid VF610 SoC support. The IP is very similar to i.MX6,
    however, the non-core registers are spread in two different register
    areas. Hence we support multiple instances of the USB misc driver
    and add the driver instance to the imx_usbmisc_data structure.

    Signed-off-by: Peter Chen
    Signed-off-by: Stefan Agner
    Signed-off-by: Greg Kroah-Hartman

    Stefan Agner
     
  • When tried to enable OTG FSM, we need to rebuild both kernel Image
    and modules, since there are some codes at gadget modules which are
    controlled by related configurations.

    Signed-off-by: Peter Chen
    Signed-off-by: Greg Kroah-Hartman

    Peter Chen
     
  • This patch adds a file chipidea.txt for how to demo chipidea usb OTG HNP and SRP
    functions via sysfs input files, any other possible information should be
    documented for chipidea usb driver in future can be added into this file.

    Signed-off-by: Peter Chen
    Signed-off-by: Li Jun
    Signed-off-by: Greg Kroah-Hartman

    Li Jun
     
  • This patch adds sysfs interface description for chipidea USB OTG HNP and SRP.

    Signed-off-by: Peter Chen
    Signed-off-by: Li Jun
    Signed-off-by: Greg Kroah-Hartman

    Li Jun
     
  • This patch makes it possible to set the chipidea udc into full-speed only mode.
    It is set by the oftree property "maximum-speed = full-speed".

    Signed-off-by: Peter Chen
    Signed-off-by: Michael Grzeschik
    Signed-off-by: Marc Kleine-Budde
    Signed-off-by: Greg Kroah-Hartman

    Michael Grzeschik
     
  • Add compatible string for imx6sx-usbphy.

    Signed-off-by: Peter Chen
    Signed-off-by: Felipe Balbi

    Conflicts:

    Documentation/devicetree/bindings/usb/mxs-phy.txt

    Peter Chen
     
  • This adds support for the USB PHY in Vybrid VF610. We assume that
    the disconnection without VBUS is also needed for Vybrid.

    Tests showed, without MXS_PHY_NEED_IP_FIX, enumeration of devices
    behind a USB Hub fails with errors:

    [ 215.163507] usb usb1-port1: cannot reset (err = -32)
    [ 215.170498] usb usb1-port1: cannot reset (err = -32)
    [ 215.185120] usb usb1-port1: cannot reset (err = -32)
    [ 215.191345] usb usb1-port1: cannot reset (err = -32)
    [ 215.202487] usb usb1-port1: cannot reset (err = -32)
    [ 215.207718] usb usb1-port1: Cannot enable. Maybe the USB cable is bad?
    [ 215.219317] usb usb1-port1: unable to enumerate USB device

    Hence we also enable the MXS_PHY_NEED_IP_FIX flag.

    Acked-by: Peter Chen
    Signed-off-by: Stefan Agner
    Signed-off-by: Felipe Balbi

    Stefan Agner
     
  • The current imx-sgtl5000 driver always attaches the cpu-dai to ssi while
    in fact it could be attached to other cpu-dais like SAI. Thus this patch
    use a general code to support another cpu-dai. And meanwhile update the
    devicetree for i.MX6 Series.

    Acked-by: Wang Shengjiu
    Signed-off-by: Nicolin Chen
    (cherry picked from commit cb5dfaf44d2fdbce4329c2e4762e8450c8cd3b3c)

    Nicolin Chen