22 Dec, 2013

1 commit

• ed93b7149   powercap / RAPL: add support for ValleyView Soc ... Browse Code »

  This patch adds support for RAPL on Intel ValleyView based SoC
  platforms, such as Baytrail.

  Besides adding CPU ID, special energy unit encoding is handled
  for ValleyView.

  Signed-off-by: Jacob Pan
  Signed-off-by: Rafael J. Wysocki

  Jacob Pan

  2013-12-22 08:27:51 +0800  

05 Dec, 2013

1 commit

• 95677a9a3   PowerCap: Fix mode for energy counter ... Browse Code »

  As per the documentation of powercap sysfs, energy_uj field is read only,
  if it can't be reset. Currently it always allows write but will fail,
  if there is no reset callback.
  Changing mode field, to read only if there is no reset callback.

  Signed-off-by: Srinivas Pandruvada
  Reported-by: Dirk Brandewie
  Signed-off-by: Rafael J. Wysocki

  Srinivas Pandruvada

  2013-12-05 09:05:48 +0800  

05 Nov, 2013

1 commit

• 08ff4cbe1   PowerCap: Fix build error with option -Werror=format-security ... Browse Code »

  Fix compile error with gcc option: -Werror=format-security for
  dev_set_name(&control_type->dev, name).

  Changed to dev_set_name(&control_type->dev, "%s", name).

  Signed-off-by: Srinivas Pandruvada
  Acked-by: Kees Cook
  Signed-off-by: Rafael J. Wysocki

  Srinivas Pandruvada

  2013-11-05 09:36:57 +0800  

26 Oct, 2013

1 commit

• 9e3410b76   PowerCap: Convert class code to use dev_groups ... Browse Code »

  The newly added power capping framework uses the obsolete .dev_attrs
  field of struct class. However this field will be removed in 3.13, so
  convert the code to use the .dev_groups field instead.

  Signed-off-by: Thierry Reding
  Acked-by: Greg Kroah-Hartman
  Signed-off-by: Rafael J. Wysocki

  Thierry Reding

  2013-10-26 05:16:31 +0800  

18 Oct, 2013

1 commit

• 2d281d819   PowerCap: Introduce Intel RAPL power capping driver ... Browse Code »

  The Intel Running Average Power Limit (RAPL) technology provides platform
  software with the ability to monitor, control, and get notifications on
  power usage.

  This feature is present in all Sandy Bridge and later Intel processors.
  Newer models allow more fine grained controls to be applied. In RAPL,
  power control is divided into domains, which include package, DRAM
  controller, CPU core (Power Plane 0), graphics uncore (power plane 1), etc.

  The purpose of this driver is to expose the RAPL settings to userspace.
  Overall, RAPL fits in the new powercap class driver in that platform
  level power capping controls are exposed via this generic interface.

  This driver is based on an earlier patch from Zhang Rui.

  However, while the previous work was mainly focused on thermal monitoring
  the focus here is on the usability from user space perspective.

  References: https://lkml.org/lkml/2011/5/26/93
  Signed-off-by: Srinivas Pandruvada
  Signed-off-by: Jacob Pan
  Reviewed-by: Rafael J. Wysocki
  Signed-off-by: Rafael J. Wysocki

  Jacob Pan

  2013-10-18 19:29:52 +0800  

17 Oct, 2013

1 commit

• 75d2364ea   PowerCap: Add class driver ... Browse Code »

  The power capping framework providing a consistent interface between the
  kernel and user space that allows power capping drivers to expose their
  settings to user space in a uniform way.
  The overall design of the framework is described in the documentation
  added by the previous patch in this series.

  Signed-off-by: Srinivas Pandruvada
  Signed-off-by: Jacob Pan
  Reviewed-by: Rafael J. Wysocki
  Signed-off-by: Rafael J. Wysocki

  Srinivas Pandruvada

  2013-10-17 06:36:06 +0800