23 Jul, 2011

1 commit

• 3ad55155b   Merge branch 'devel-stable' into for-next ... Browse Code »

  Conflicts:
  arch/arm/kernel/entry-armv.S

  Russell King

  2011-07-23 06:09:07 +0800  

19 Jul, 2011

1 commit

• 4348810a2   ARM: btc: avoid invalidating the branch target cache on kernel TLB maintanence ... Browse Code »

  Kernel space needs very little in the way of BTC maintanence as most
  mappings which are created and destroyed are non-executable, and so
  could never enter the instruction stream.

  The case which does warrant BTC maintanence is when a module is loaded.
  This creates a new executable mapping, but at that point the pages have
  not been initialized with code and data, so at that point they contain
  unpredictable information. Invalidating the BTC at this stage serves
  little useful purpose.

  Before we execute module code, we call flush_icache_range(), which deals
  with the BTC maintanence requirements. This ensures that we have a BTC
  maintanence operation before we execute code via the newly created
  mapping.

  Signed-off-by: Russell King

  Russell King

  2011-07-19 18:44:06 +0800  

07 Jul, 2011

1 commit

• 2ba564b90   ARM: mm: tlb-v7: Use the new processor struct macros ... Browse Code »

  Signed-off-by: Dave Martin

  Dave Martin

  2011-07-07 22:31:12 +0800  

05 Oct, 2010

1 commit

• f00ec48fa   ARM: Allow SMP kernels to boot on UP systems ... Browse Code »

  UP systems do not implement all the instructions that SMP systems have,
  so in order to boot a SMP kernel on a UP system, we need to rewrite
  parts of the kernel.

  Do this using an 'alternatives' scheme, where the kernel code and data
  is modified prior to initialization to replace the SMP instructions,
  thereby rendering the problematical code ineffectual. We use the linker
  to generate a list of 32-bit word locations and their replacement values,
  and run through these replacements when we detect a UP system.

  Signed-off-by: Russell King

  Russell King

  2010-10-05 03:23:36 +0800  

08 May, 2010

1 commit

• b8349b569   ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP ... Browse Code »

  The standard I-cache Invalidate All (ICIALLU) and Branch Predication
  Invalidate All (BPIALL) operations are not automatically broadcast to
  the other CPUs in an ARMv7 MP system. The patch adds the Inner Shareable
  variants, ICIALLUIS and BPIALLIS, if ARMv7 and SMP.

  Signed-off-by: Catalin Marinas
  Signed-off-by: Russell King

  Catalin Marinas

  2010-05-08 17:44:30 +0800  

06 Jan, 2010

1 commit

• 070f1f178   ARM: 5858/1: Remove unused vma_vm_flags macro from v7wbi_flush_user_tlb_range ... Browse Code »

  Signed-off-by: Bahadir Balban
  Signed-off-by: Russell King

  Bahadir Balban

  2010-01-06 04:52:06 +0800  

30 May, 2009

1 commit

• faa7bc51c   Check whether the TLB operations need broadcasting on SMP systems ... Browse Code »

  ARMv7 SMP hardware can handle the TLB maintenance operations
  broadcasting in hardware so that the software can avoid the costly IPIs.
  This patch adds the necessary checks (the MMFR3 CPUID register) to avoid
  the broadcasting if already supported by the hardware.

  (this patch is based on the work done by Tony Thompson @ ARM)

  Signed-off-by: Catalin Marinas

  Catalin Marinas

  2009-05-30 21:00:14 +0800  

28 Apr, 2009

1 commit

• 991da17ec   arm: Use __INIT macro instead of .text.init. ... Browse Code »

  arm is placing some code in the .text.init section, but it does not
  reference that section in its linker scripts.

  This change moves this code from the .text.init section to the
  .init.text section, which is presumably where it belongs.

  Signed-off-by: Tim Abbott
  Acked-by: Russell King
  Acked-by: Sam Ravnborg
  Signed-off-by: Linus Torvalds

  Tim Abbott

  2009-04-28 10:51:58 +0800  

01 Sep, 2008

1 commit

• 93ed39701   [ARM] 5227/1: Add the ENDPROC declarations to the .S files ... Browse Code »

  This declaration specifies the "function" type and size for various
  assembly functions, mainly needed for generating the correct branch
  instructions in Thumb-2.

  Signed-off-by: Catalin Marinas
  Signed-off-by: Russell King

  Catalin Marinas

  2008-09-01 19:06:34 +0800  

30 May, 2007

1 commit

• 2ccdd1e77   [ARM] 4394/1: ARMv7: Add the TLB range operations ... Browse Code »

  We are currently using the ARMv6 operations but need to duplicate some
  of the code because of the introduction of the new CPU barrier
  instructions in ARMv7.

  Signed-off-by: Catalin Marinas
  Signed-off-by: Russell King

  Catalin Marinas

  2007-05-30 21:32:07 +0800