Eric Lee / smarc-fsl-linux-kernel

23 Jul, 2011

1 commit

07 Oct, 2009

1 commit

  • 96f1050d3   Blackfin: mass clean up of copyright/licensing info ... Browse Code »

    Bill Gatliff & David Brownell pointed out we were missing some
    copyrights, and licensing terms in some of the files in
    ./arch/blackfin, so this fixes things, and cleans them up.

    It also removes:
    - verbose GPL text(refer to the top level ./COPYING file)
    - file names (you are looking at the file)
    - bug url (it's in the ./MAINTAINERS file)
    - "or later" on GPL-2, when we did not have that right

    It also allows some Blackfin-specific assembly files to be under a BSD
    like license (for people to use them outside of Linux).

    Signed-off-by: Robin Getz
    Signed-off-by: Mike Frysinger

    Robin Getz
     

17 Sep, 2009

2 commits

  • 01b9f4b0e   Blackfin: improve double fault debug handling ... Browse Code »

    Since the hardware only provides reporting for the last exception handled,
    and the values are valid only when executing the exception handler, we
    need to save the context for reporting at a later point. While we do this
    for one exception, it doesn't work properly when handling a second one as
    the original exception is clobbered by the double fault. So when double
    fault debugging is enabled, create a dedicated shadow of these values and
    save/restore out of there. Now the crash report properly displays the
    first exception as well as the second one.

    Signed-off-by: Graf Yang
    Signed-off-by: Mike Frysinger

    Graf Yang
     
  • ae4f073c4   Blackfin: make EVT3->EVT5 lowering more robust wrt IPEND[4] ... Browse Code »

    We handle many exceptions at EVT5 (hardware error level) so that we can
    catch exceptions in our exception handling code. Today - if the global
    interrupt enable bit (IPEND[4]) is set (interrupts disabled) our trap
    handling code goes into a infinite loop, since we need interrupts to be
    on to defer things to EVT5.

    Normal kernel code should not trigger this for any reason as IPEND[4] gets
    cleared early (when doing an interrupt context save) and the kernel stack
    there should be sane (or something much worse is happening in the system).
    But there have been a few times where this has happened, so this change
    makes sure we dump a proper crash message even when things have gone south.

    Signed-off-by: Robin Getz
    Signed-off-by: Mike Frysinger

    Robin Getz
     

18 Nov, 2008

1 commit

09 Oct, 2008

1 commit

07 May, 2008

1 commit

29 Apr, 2008

1 commit

12 Jul, 2007

1 commit

10 May, 2007

1 commit

  • c9f4f06d3   wrap access to thread_info ... Browse Code »

    Recently a few direct accesses to the thread_info in the task structure snuck
    back, so this wraps them with the appropriate wrapper.

    Signed-off-by: Roman Zippel
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Roman Zippel
     

08 May, 2007

1 commit

  • 1394f0322   blackfin architecture ... Browse Code »

    This adds support for the Analog Devices Blackfin processor architecture, and
    currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
    (Dual Core) devices, with a variety of development platforms including those
    avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
    BF561-EZKIT), and Bluetechnix! Tinyboards.

    The Blackfin architecture was jointly developed by Intel and Analog Devices
    Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
    December of 2000. Since then ADI has put this core into its Blackfin
    processor family of devices. The Blackfin core has the advantages of a clean,
    orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
    (Multiply/Accumulate), state-of-the-art signal processing engine and
    single-instruction, multiple-data (SIMD) multimedia capabilities into a single
    instruction-set architecture.

    The Blackfin architecture, including the instruction set, is described by the
    ADSP-BF53x/BF56x Blackfin Processor Programming Reference
    http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf

    The Blackfin processor is already supported by major releases of gcc, and
    there are binary and source rpms/tarballs for many architectures at:
    http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
    documentation, including "getting started" guides available at:
    http://docs.blackfin.uclinux.org/ which provides links to the sources and
    patches you will need in order to set up a cross-compiling environment for
    bfin-linux-uclibc

    This patch, as well as the other patches (toolchain, distribution,
    uClibc) are actively supported by Analog Devices Inc, at:
    http://blackfin.uclinux.org/

    We have tested this on LTP, and our test plan (including pass/fails) can
    be found at:
    http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel

    [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
    Signed-off-by: Bryan Wu
    Signed-off-by: Mariusz Kozlowski
    Signed-off-by: Aubrey Li
    Signed-off-by: Jie Zhang
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Bryan Wu