08 Dec, 2011

1 commit


18 May, 2011

1 commit

  • The 'size' variable contains the correct register size for both AR7
    and Titan, but we never used it to ioremap the correct register size.
    This problem only shows up on Titan.

    [ralf@linux-mips.org: Fixed the fix. The original patch as in patchwork
    recognizes the problem correctly then fails to fix it ...]

    Reported-by: Alexander Clouter
    Signed-off-by: Florian Fainelli
    Patchwork: https://patchwork.linux-mips.org/patch/2380/
    Signed-off-by: Ralf Baechle

    Florian Fainelli
     

30 Oct, 2010

2 commits

  • Add support for Titan TNETV1050,1055,1056,1060 variants. This SoC is almost
    completely identical to AR7 except on a few points:
    - a second bank of gpios is available
    - vlynq0 on titan is vlynq1 on ar7
    - different PHY addresses for cpmac0

    This SoC can be found on commercial products like the Linksys WRTP54G

    Original patch by Xin with improvments by Florian.

    Signed-off-by: Xin Zhen
    Signed-off-by: Florian Fainelli
    Patchwork: http://patchwork.linux-mips.org/patch/1563/
    Signed-off-by: Ralf Baechle

    ---

    Florian Fainelli
     
  • In order to detect the Titan variant, we must initialize GPIOs earlier since
    detection relies on some GPIO values to be set.

    Signed-off-by: Florian Fainelli
    Patchwork: http://patchwork.linux-mips.org/patch/1562/
    Signed-off-by: Ralf Baechle

    ---

    Florian Fainelli
     

27 Feb, 2010

2 commits


03 Jul, 2009

1 commit