08 Dec, 2011
1 commit
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Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled],
We run all interrupt handlers with interrupts disabled and we even check
and yell when an interrupt handler returns with interrupts enabled (see
commit [b738a50a: genirq: Warn when handler enables interrupts]).So now this flag is a NOOP and can be removed.
[ralf@linux-mips.org: Fixed up conflicts in
arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and
arch/mips/kernel/perf_event.c.]Signed-off-by: Yong Zhang
To: linux-kernel@vger.kernel.org
Cc: tglx@linutronix.de
linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2835/
Signed-off-by: Ralf Baechle
04 Aug, 2009
1 commit
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They tend to get not updated when files are moved around or copied and
lack any obvious use. While at it zap some only too obvious comments and
as per Shinya's suggestion, add a copyright header to extable.c.Signed-off-by: Ralf Baechle
Acked-by: Shinya Kuribayashi
Acked-by: Thadeu Lima de Souza Cascardo
11 Oct, 2008
1 commit
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Signed-off-by: Atsushi Nemoto
Signed-off-by: Ralf Baechle
31 Jul, 2008
1 commit
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From: Atsushi Nemoto
Date: Thu, 24 Jul 2008 00:25:16 +0900
Subject: [PATCH] txx9: PCI error handlingAdd more control and detailed report on PCI error interrupt.
Signed-off-by: Atsushi Nemoto
Signed-off-by: Ralf Baechle
16 Jul, 2008
1 commit
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Split out PCIC dependent code and SoC dependent code from board dependent
code. Now TX4927 PCIC code is independent from TX4927/TX4938 SoC code.
Also fix some build problems on CONFIG_PCI=n.As a bonus, "FPCIB0 Backplane Support" is available for all TX39/TX49 boards
and PCI66 support is available for all TX49 boards.Signed-off-by: Atsushi Nemoto
Signed-off-by: Ralf Baechle