03 Aug, 2010

1 commit

  • Moorestown has PMIC chip which contains GPIO blocks. The PMIC chip is
    connected to Langwell by SPI interface. So this GPIO driver will be regarded
    as SPI GPIO expander though the actual GPIO access is through IPC and SRAM.
    The SPI master contoller will probe this device driver by parsing SPIB table.

    Cleaned up for new IPC, GPE removed and some printk and other tidying by
    Alan Cox. Fixes for points noted by Matthew Garrett

    Signed-off-by: Alek Du
    Signed-off-by: Alan Cox
    Signed-off-by: Matthew Garrett

    Alek Du