26 Oct, 2022
1 commit
-
Signed-off-by: Xiaobo Xie
30 Sep, 2022
1 commit
-
This is the 5.15.71 stable release
* tag 'v5.15.71': (144 commits)
Linux 5.15.71
ext4: use locality group preallocation for small closed files
ext4: avoid unnecessary spreading of allocations among groups
...Signed-off-by: Jason Liu
Conflicts:
drivers/net/phy/aquantia_main.c
drivers/tty/serial/fsl_lpuart.c
28 Sep, 2022
4 commits
-
[ Upstream commit 37f071ec327b04c83d47637c5e5c2199b39899ca ]
The i2c-mlxbf.c driver is currently broken because there is a bug
in the calculation of the frequency. core_f, core_r and core_od
are components read from hardware registers and are used to
compute the frequency used to compute different timing parameters.
The shifting mechanism used to get core_f, core_r and core_od is
wrong. Use FIELD_GET to mask and shift the bitfields properly.Fixes: b5b5b32081cd206b (i2c: mlxbf: I2C SMBus driver for Mellanox BlueField SoC)
Reviewed-by: Khalil Blaiech
Signed-off-by: Asmaa Mnebhi
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit de24aceb07d426b6f1c59f33889d6a964770547b ]
memcpy() is called in a loop while 'operation->length' upper bound
is not checked and 'data_idx' also increments.Fixes: b5b5b32081cd206b ("i2c: mlxbf: I2C SMBus driver for Mellanox BlueField SoC")
Reviewed-by: Khalil Blaiech
Signed-off-by: Asmaa Mnebhi
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit 2a5be6d1340c0fefcee8a6489cff7fd88a0d5b85 ]
Correct the base address used during io write.
This bug had no impact over the overall functionality of the read and write
transactions. MLXBF_I2C_CAUSE_OR_CLEAR=0x18 so writing to (smbus->io + 0x18)
instead of (mst_cause->ioi + 0x18) actually writes to the sc_low_timeout
register which just sets the timeout value before a read/write aborts.Fixes: b5b5b32081cd206b (i2c: mlxbf: I2C SMBus driver for Mellanox BlueField SoC)
Reviewed-by: Khalil Blaiech
Signed-off-by: Asmaa Mnebhi
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit 085aacaa73163f4b8a89dec24ecb32cfacd34017 ]
pm_runtime_get_sync() returning 1 also means the device is powered. So
resetting the chip registers in .remove() is possible and should be
done.Reported-by: Dan Carpenter
Fixes: d98bdd3a5b50 ("i2c: imx: Make sure to unregister adapter on remove()")
Signed-off-by: Uwe Kleine-König
Acked-by: Oleksij Rempel
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin
27 Sep, 2022
1 commit
-
This is the 5.15.70 stable release
* tag 'v5.15.70': (2444 commits)
Linux 5.15.70
ALSA: hda/sigmatel: Fix unused variable warning for beep power change
cgroup: Add missing cpus_read_lock() to cgroup_attach_task_all()
...Signed-off-by: Jason Liu
Conflicts:
arch/arm/boot/dts/imx6ul.dtsi
arch/arm/mm/mmu.c
arch/arm64/boot/dts/freescale/imx8mp-evk.dts
drivers/gpu/drm/imx/dcss/dcss-kms.c
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.c
drivers/media/platform/nxp/imx-jpeg/mxc-jpeg.h
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
drivers/soc/fsl/Kconfig
drivers/soc/imx/gpcv2.c
drivers/usb/dwc3/host.c
net/dsa/slave.c
sound/soc/fsl/imx-card.c
25 Aug, 2022
1 commit
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commit d98bdd3a5b50446d8e010be5b04ce81c4eabf728 upstream.
If for whatever reasons pm_runtime_resume_and_get() fails and .remove() is
exited early, the i2c adapter stays around and the irq still calls its
handler, while the driver data and the register mapping go away. So if
later the i2c adapter is accessed or the irq triggers this results in
havoc accessing freed memory and unmapped registers.So unregister the software resources even if resume failed, and only skip
the hardware access in that case.Fixes: 588eb93ea49f ("i2c: imx: add runtime pm support to improve the performance")
Signed-off-by: Uwe Kleine-König
Acked-by: Oleksij Rempel
Signed-off-by: Wolfram Sang
Signed-off-by: Greg Kroah-Hartman
17 Aug, 2022
6 commits
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[ Upstream commit 6435319c34704994e19b0767f6a4e6f37439867b ]
In i2c_mux_probe(), we should call of_node_put() when breaking out
of for_each_child_of_node() which will automatically increase and
decrease the refcount.Fixes: ac8498f0ce53 ("i2c: i2c-mux-gpmux: new driver")
Signed-off-by: Liang He
Acked-by: Peter Rosin
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit 9fdf6d97f03035ad5298e2d1635036c74c2090ed ]
SMBus packet error checking (PEC) is implemented by appending one
additional byte of checksum data at the end of the message. This provides
additional protection and allows to detect data corruption on the I2C bus.SMBus block reads support variable length reads. The first byte in the read
message is the number of available data bytes.The combination of PEC and block read is currently not supported by the
Cadence I2C driver.
* When PEC is enabled the maximum transfer length for block reads
increases from 33 to 34 bytes.
* The I2C core smbus emulation layer relies on the driver updating the
`i2c_msg` `len` field with the number of received bytes. The updated
length is used when checking the PEC.Add support to the Cadence I2C driver for handling SMBus block reads with
PEC. To determine the maximum transfer length uses the initial `len` value
of the `i2c_msg`. When PEC is enabled this will be 2, when it is disabled
it will be 1.Once a read transfer is done also increment the `len` field by the amount
of received data bytes.This change has been tested with a UCM90320 PMBus power monitor, which
requires block reads to access certain data fields, but also has PEC
enabled by default.Fixes: df8eb5691c48 ("i2c: Add driver for Cadence I2C controller")
Signed-off-by: Lars-Peter Clausen
Tested-by: Shubhrajyoti Datta
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit e4c72c06c367758a14f227c847f9d623f1994ecf ]
Free the adap structure only after we are done using it.
This patch just moves the put_device() down a bit to avoid the
use after free.Fixes: 611e12ea0f12 ("i2c: core: manage i2c bus device refcount in i2c_[get|put]_adapter")
Signed-off-by: Xu Wang
[wsa: added comment to the code, added Fixes tag]
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit 3d43273d7d1e1a5374d531e901d3c537b4c97bbf ]
Change the of_device_get_match_data() cast to (uintptr_t)
to silence the following clang warning:drivers/i2c/busses/i2c-mxs.c:802:18: warning: cast to smaller integer type 'enum mxs_i2c_devtype' from 'const void *' [-Wvoid-pointer-to-enum-cast]
Reported-by: kernel test robot
Fixes: c32abd8b5691 ("i2c: mxs: Remove unneeded platform_device_id")
Signed-off-by: Fabio Estevam
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit d7aa1b149b8fc04d802879cf4662010aa4a42deb ]
Correct the slave transaction logic to be compatible with the generic
slave backend driver.Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver")
Signed-off-by: Tali Perry
Signed-off-by: Tyrone Ting
Reviewed-by: Andy Shevchenko
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit 47d506d1a28fd10a9fb1f33df5622d88fae72095 ]
NPCM can support up to 10 own slave addresses. In practice, only one
address is actually being used. In order to access addresses 2 and above,
need to switch register banks. The switch needs spinlock.
To avoid using spinlock for this useless feature removed support of SA >=
2. Also fix returned slave event enum.Remove some comment since the bank selection is not required. The bank
selection is not required since the supported slave addresses are reduced.Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver")
Signed-off-by: Tali Perry
Signed-off-by: Tyrone Ting
Reviewed-by: Andy Shevchenko
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin
05 Aug, 2022
1 commit
-
Conflicts:
arch/x86/kernel/cpu/mshyperv.c
crypto/cryptd.c
drivers/char/random.c
drivers/hv/vmbus_drv.c
include/linux/random.h
kernel/irq/handle.c
kernel/irq/manage.c
kernel/printk/printk.c
net/core/dev.c
net/ipv4/inet_hashtables.cSigned-off-by: Xiaobo Xie
04 Aug, 2022
1 commit
-
Since the Mcore images of 8qxp/8qm/8dxl platforms are not maintained
and cannot support a maximum buffer size of 478bytes of i2c buffer,
these platforms are using origin compatible string.
The v1 version only supports I2C buffer with a fixed length of 16 bytes.For the two platforms of 8mp/8ulp, the mcore image supports a maximum
i2c buffer size of 478bytes.
Therefore, use v2 compatible string to add support for dynamic i2c
buffer sizes.Signed-off-by: Clark Wang
Reviewed-by: Haibo Chen
03 Aug, 2022
2 commits
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Expand the transfer buffer of I2C over rpmsg bus to 478 bytes.
Correct and update the protocol in comment.
Signed-off-by: Clark Wang
Acked-by: Haibo Chen -
When do system suspend/resume, the runtime pm will be disabled after
dpm_suspend_late() and before dpm_resume_early(). If still need some
i2c transfers between these two phases, it will failed to request runtime
wakeup. Then data transfer will failed.
So enable runtime pm temporarily when try to do i2c transfer.Signed-off-by: Clark Wang
Reviewed-by: Jun Li
29 Jul, 2022
2 commits
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[ Upstream commit 4ca8ca873d454635c20d508261bfc0081af75cf8 ]
Problems were observed on the Xilinx ZynqMP platform with large I2C reads.
When a read of 277 bytes was performed, the controller NAKed the transfer
after only 252 bytes were transferred and returned an ENXIO error on the
transfer.There is some code in cdns_i2c_master_isr to handle this case by resetting
the transfer count in the controller before it reaches 0, to allow larger
transfers to work, but it was conditional on the CDNS_I2C_BROKEN_HOLD_BIT
quirk being set on the controller, and ZynqMP uses the r1p14 version of
the core where this quirk is not being set. The requirement to do this to
support larger reads seems like an inherently required workaround due to
the core only having an 8-bit transfer size register, so it does not
appear that this should be conditional on the broken HOLD bit quirk which
is used elsewhere in the driver.Remove the dependency on the CDNS_I2C_BROKEN_HOLD_BIT for this transfer
size reset logic to fix this problem.Fixes: 63cab195bf49 ("i2c: removed work arounds in i2c driver for Zynq Ultrascale+ MPSoC")
Signed-off-by: Robert Hancock
Reviewed-by: Shubhrajyoti Datta
Acked-by: Michal Simek
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit e1f77ecc75aaee6bed04e8fd7830e00032af012e ]
Fix setting of 'Half Cycle' register for 400KHz frequency.
Fixes: fa1049135c15 ("i2c: mlxcpld: Modify register setting for 400KHz frequency")
Signed-off-by: Vadim Pasternak
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin
12 Jul, 2022
2 commits
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[ Upstream commit 3501f0c663063513ad604fb1b3f06af637d3396d ]
This patch ensures that the clock notifier is unregistered
when driver probe is returning error.Fixes: df8eb5691c48 ("i2c: Add driver for Cadence I2C controller")
Signed-off-by: Satish Nagireddy
Tested-by: Lars-Peter Clausen
Reviewed-by: Michal Simek
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit 8ad59b397f86a4d8014966fdc0552095a0c4fb2b ]
The recently added support for EFCH MMIO regions introduced a memory
leak in that code path. The leak is caused by the fact that
release_resource() merely removes the resource from the tree but does
not free its memory. We need to call release_mem_region() instead,
which does free the memory. As a nice side effect, this brings back
some symmetry between the legacy and MMIO paths.Signed-off-by: Jean Delvare
Reported-by: Yi Zhang
Tested-by: Yi Zhang
Reviewed-by: Terry Bowman
Tested-by: Terry Bowman
Fixes: 7c148722d074 ("i2c: piix4: Add EFCH MMIO support to region request and release")
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin
11 Jul, 2022
4 commits
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To reduce the time taken to run isr, is_ndf will be set when an NDF
is detected. Then handle the error in the xfer function.
Clean up the logic in lpi2c_dma_xfer();Signed-off-by: Clark Wang
Reviewed-by: Haibo Chen
(cherry picked from commit e024449d6774d943362e75e27bbb5269c4d3d33d) -
There is a special case that can cause problems.
When the message num that needs to be sent by DMA in an I2C message queue
is greater than 1, the previous code will cause only one message to be
sent and then the sending will be ended.Add a switch to handle the result of dma xfer.
Signed-off-by: Clark Wang
Reviewed-by: Haibo Chen
(cherry picked from commit 9e06e2c7cf9c2f7931869f1b767a616436a65ec9) -
On imx93, if set MDER too early, it will trigger an extra rx DMA request
in front of all rx data.
So only setting MDER before dma transfer to avoid this issue.Signed-off-by: Clark Wang
Reviewed-by: Haibo Chen
(cherry picked from commit cf7a2a128eac35ade7c543b292762b6abca64494) -
When configuring DMA read operations, there is no need to decrease 1
as configuring MTDR.
Otherwise, the last byte of data will be missed.Signed-off-by: Clark Wang
Reviewed-by: Haibo Chen
(cherry picked from commit 87f19119590af25c011593e0747e3311585e4227)
30 Jun, 2022
2 commits
-
This is the 5.15.50 stable release
* tag 'v5.15.50': (1395 commits)
Linux 5.15.50
arm64: mm: Don't invalidate FROM_DEVICE buffers at start of DMA transfer
serial: core: Initialize rs485 RTS polarity already on probe
...Signed-off-by: Jason Liu
Conflicts:
drivers/bus/fsl-mc/fsl-mc-bus.c
drivers/crypto/caam/ctrl.c
drivers/pci/controller/dwc/pci-imx6.c
drivers/spi/spi-fsl-qspi.c
drivers/tty/serial/fsl_lpuart.c
include/uapi/linux/dma-buf.h -
This is the 5.15.41 stable release
* tag 'v5.15.41': (1977 commits)
Linux 5.15.41
usb: gadget: uvc: allow for application to cleanly shutdown
usb: gadget: uvc: rename function to be more consistent
...Signed-off-by: Jason Liu
Conflicts:
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
arch/arm64/configs/defconfig
drivers/clk/imx/clk-imx8qxp-lpcg.c
drivers/dma/imx-sdma.c
drivers/gpu/drm/bridge/nwl-dsi.c
drivers/mailbox/imx-mailbox.c
drivers/net/phy/at803x.c
drivers/tty/serial/fsl_lpuart.c
security/keys/trusted-keys/trusted_core.c
22 Jun, 2022
2 commits
-
[ Upstream commit 27071b5cbca59d8e8f8750c199a6cbf8c9799963 ]
Even though the DW I2C controller reference clock source is requested by
the method devm_clk_get() with non-optional clock requirement the way the
clock handler is used afterwards has a pure optional clock semantic
(though in some circumstances we can get a warning about the clock missing
printed in the system console). There is no point in reimplementing that
functionality seeing the kernel clock framework already supports the
optional interface from scratch. Thus let's convert the platform driver to
using it.Note by providing this commit we get to fix two problems. The first one
was introduced in commit c62ebb3d5f0d ("i2c: designware: Add support for
an interface clock"). It causes not having the interface clock (pclk)
enabled/disabled in case if the reference clock isn't provided. The second
problem was first introduced in commit b33af11de236 ("i2c: designware: Do
not require clock when SSCN and FFCN are provided"). Since that
modification the deferred probe procedure has been unsupported in case if
the interface clock isn't ready.Fixes: c62ebb3d5f0d ("i2c: designware: Add support for an interface clock")
Fixes: b33af11de236 ("i2c: designware: Do not require clock when SSCN and FFCN are provided")
Signed-off-by: Serge Semin
Reviewed-by: Andy Shevchenko
Acked-by: Jarkko Nikula
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit 6ba12b56b9b844b83ed54fb7ed59fb0eb41e4045 ]
As platform_driver_register() could fail, it should be better
to deal with the return value in order to maintain the code
consisitency.Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver")
Signed-off-by: Jiasheng Jiang
Acked-by: Tali Perry
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin
15 Jun, 2022
1 commit
-
[ Upstream commit 96789dce043f5bff8b7d62aa28d52a7c59403a84 ]
Timeout as 1 second sets an upper limit on the length
of the transfer executed, but there is no maximum length
of a write or read message set in i2c_adapter_quirks for
this controller.This upper limit affects devices that require sending
large firmware blobs over I2C.To remove that limitation, calculate the minimal time
necessary, plus some wiggle room, for every message and
use it instead of the default one second, if more than
one second.Signed-off-by: Lucas Tanure
Acked-by: Michal Simek
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin
09 Jun, 2022
6 commits
-
[ Upstream commit 3fe2ec59db1a7569e18594b9c0cf1f4f1afd498e ]
We have to take care of ID_P_PM_BLOCKED when bailing out during probe.
Fixes: 7ee24eb508d6 ("i2c: rcar: disable PM in multi-master mode")
Signed-off-by: Kuninori Morimoto
Signed-off-by: Wolfram Sang
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit e5222d408de2a88e6b206c38217b48d092184553 ]
On some platforms in rare cases (1 to 100,000 transactions),
the i2c gets a spurious interrupt which means that we enter an interrupt
but in the interrupt handler we don't find any status bit that points to
the reason we got this interrupt.This may be a case of a rare HW issue or signal integrity issue that is
still under investigation.In order to overcome this we are doing the following:
1. Disable incoming interrupts in master mode only when slave mode is not
enabled.
2. Clear end of busy (EOB) after every interrupt.
3. Clear other status bits (just in case since we found them cleared)
4. Return correct status during the interrupt that will finish the
transaction.On next xmit transaction if the bus is still busy the master will issue a
recovery process before issuing the new transaction.Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver")
Signed-off-by: Tali Perry
Signed-off-by: Tyrone Ting
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit ea9f8426d17620214ee345ffb77ee6cc196ff14f ]
The SMBnCTL3 register is 8-bit wide and the 32-bit access was always
incorrect, but simply didn't cause a visible error on the 32-bit machine.On the 64-bit machine, the kernel message reports that ESR value is
0x96000021. Checking Arm Architecture Reference Manual Armv8 suggests that
it's the alignment fault.SMBnCTL3's address is 0xE.
Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver")
Signed-off-by: Tyrone Ting
Reviewed-by: Jonathan Neuschäfer
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit 288b204492fddf28889cea6dc95a23976632c7a0 ]
Use adap.timeout for timeout calculation instead of hard-coded
value of 35ms.Fixes: 56a1485b102e ("i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver")
Signed-off-by: Tali Perry
Signed-off-by: Tyrone Ting
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit 6977262c2eee111645668fe9e235ef2f5694abf7 ]
Clang warns:
drivers/i2c/busses/i2c-at91-master.c:707:6: warning: variable 'dma_buf' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized]
if (dev->use_dma) {
^~~~~~~~~~~~
drivers/i2c/busses/i2c-at91-master.c:717:27: note: uninitialized use occurs here
i2c_put_dma_safe_msg_buf(dma_buf, m_start, !ret);
^~~~~~~Initialize dma_buf to NULL, as i2c_put_dma_safe_msg_buf() is a no-op
when the first argument is NULL, which will work for the !dev->use_dma
case.Fixes: 03fbb903c8bf ("i2c: at91: use dma safe buffers")
Link: https://github.com/ClangBuiltLinux/linux/issues/1629
Signed-off-by: Nathan Chancellor
Reviewed-by: Michael Walle
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit 03fbb903c8bf7e53e101e8d9a7b261264317c411 ]
The supplied buffer might be on the stack and we get the following error
message:
[ 3.312058] at91_i2c e0070600.i2c: rejecting DMA map of vmalloc memoryUse i2c_{get,put}_dma_safe_msg_buf() to get a DMA-able memory region if
necessary.Fixes: 60937b2cdbf9 ("i2c: at91: add dma support")
Signed-off-by: Michael Walle
Reviewed-by: Codrin Ciubotariu
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin
06 Jun, 2022
3 commits
-
commit 690b2549b19563ec5ad53e5c82f6a944d910086e upstream.
The "data->block[0]" variable comes from the user and is a number
between 0-255. It needs to be capped to prevent writing beyond the end
of dma_buffer[].Fixes: 5e9a97b1f449 ("i2c: ismt: Adding support for I2C_SMBUS_BLOCK_PROC_CALL")
Reported-and-tested-by: Zheyu Ma
Signed-off-by: Dan Carpenter
Reviewed-by: Mika Westerberg
Signed-off-by: Linus Torvalds
Signed-off-by: Greg Kroah-Hartman -
[ Upstream commit 03a35bc856ddc09f2cc1f4701adecfbf3b464cb3 ]
Due to i2c->adap.dev.fwnode not being set, ACPI_COMPANION() wasn't properly
found for TWSI controllers.Signed-off-by: Szymon Balcerak
Signed-off-by: Piyush Malgujar
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin -
[ Upstream commit 17a0f3acdc6ec8b89ad40f6e22165a4beee25663 ]
Before sending a MSI the hardware writes information pertinent to the
interrupt cause to a memory location pointed by SMTICL register. This
memory holds three double words where the least significant bit tells
whether the interrupt cause of master/target/error is valid. The driver
does not use this but we need to set it up because otherwise it will
perform DMA write to the default address (0) and this will cause an
IOMMU fault such as below:DMAR: DRHD: handling fault status reg 2
DMAR: [DMA Write] Request device [00:12.0] PASID ffffffff fault addr 0
[fault reason 05] PTE Write access is not setTo prevent this from happening, provide a proper DMA buffer for this
that then gets mapped by the IOMMU accordingly.Signed-off-by: Mika Westerberg
Reviewed-by: From: Andy Shevchenko
Signed-off-by: Wolfram Sang
Signed-off-by: Sasha Levin
