18 Sep, 2020

1 commit

  • In preparation for unconditionally passing the
    struct tasklet_struct pointer to all tasklet
    callbacks, switch to using the new tasklet_setup()
    and from_tasklet() to pass the tasklet pointer explicitly.

    Signed-off-by: Romain Perier
    Signed-off-by: Allen Pais
    Acked-by: Chen-Yu Tsai
    Link: https://lore.kernel.org/r/20200831103542.305571-27-allen.lkml@gmail.com
    Signed-off-by: Vinod Koul

    Allen Pais
     

31 Jul, 2019

1 commit

  • We don't need dev_err() messages when platform_get_irq() fails now that
    platform_get_irq() prints an error message itself when something goes
    wrong. Let's remove these prints with a simple semantic patch.

    //
    @@
    expression ret;
    struct platform_device *E;
    @@

    ret =
    (
    platform_get_irq(E, ...)
    |
    platform_get_irq_byname(E, ...)
    );

    if ( \( ret < 0 \| ret

    While we're here, remove braces on if statements that only have one
    statement (manually).

    Cc: Vinod Koul
    Cc: Dan Williams
    Cc: dmaengine@vger.kernel.org
    Cc: Greg Kroah-Hartman
    Signed-off-by: Stephen Boyd
    Link: https://lore.kernel.org/r/20190730181557.90391-11-swboyd@chromium.org
    Signed-off-by: Vinod Koul

    Stephen Boyd
     

18 Jul, 2019

1 commit

  • Pull dmaengine updates from Vinod Koul:

    - Add support in dmaengine core to do device node checks for DT devices
    and update bunch of drivers to use that and remove open coding from
    drivers

    - New driver/driver support for new hardware, namely:
    - MediaTek UART APDMA
    - Freescale i.mx7ulp edma2
    - Synopsys eDMA IP core version 0
    - Allwinner H6 DMA

    - Updates to axi-dma and support for interleaved cyclic transfers

    - Greg's debugfs return value check removals on drivers

    - Updates to stm32-dma, hsu, dw, pl330, tegra drivers

    * tag 'dmaengine-5.3-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits)
    dmaengine: Revert "dmaengine: fsl-edma: add i.mx7ulp edma2 version support"
    dmaengine: at_xdmac: check for non-empty xfers_list before invoking callback
    Documentation: dmaengine: clean up description of dmatest usage
    dmaengine: tegra210-adma: remove PM_CLK dependency
    dmaengine: fsl-edma: add i.mx7ulp edma2 version support
    dt-bindings: dma: fsl-edma: add new i.mx7ulp-edma
    dmaengine: fsl-edma-common: version check for v2 instead
    dmaengine: fsl-edma-common: move dmamux register to another single function
    dmaengine: fsl-edma: add drvdata for fsl-edma
    dmaengine: Revert "dmaengine: fsl-edma: support little endian for edma driver"
    dmaengine: rcar-dmac: Reject zero-length slave DMA requests
    dmaengine: dw: Enable iDMA 32-bit on Intel Elkhart Lake
    dmaengine: dw-edma: fix semicolon.cocci warnings
    dmaengine: sh: usb-dmac: Use [] to denote a flexible array member
    dmaengine: dmatest: timeout value of -1 should specify infinite wait
    dmaengine: dw: Distinguish ->remove() between DW and iDMA 32-bit
    dmaengine: fsl-edma: support little endian for edma driver
    dmaengine: hsu: Revert "set HSU_CH_MTSR to memory width"
    dmagengine: pl330: add code to get reset property
    dt-bindings: pl330: document the optional resets property
    ...

    Linus Torvalds
     

04 Jun, 2019

4 commits


31 May, 2019

1 commit

  • Based on 1 normalized pattern(s):

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license as published by
    the free software foundation either version 2 of the license or at
    your option any later version

    extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-or-later

    has been chosen to replace the boilerplate/reference in 3029 file(s).

    Signed-off-by: Thomas Gleixner
    Reviewed-by: Allison Randal
    Cc: linux-spdx@vger.kernel.org
    Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     

23 Oct, 2017

1 commit

  • To avoid introduction of a new compatible for each small SoC/DMA controller
    variation, move the definition of the channel count to the devicetree.

    The number of vchans is no longer explicit, but limited by the highest
    port/DMA request number. The result is a slight overallocation for SoCs
    with a sparse port mapping.

    Signed-off-by: Stefan Brüns
    Acked-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Stefan Brüns
     

16 Oct, 2017

6 commits

  • The A64 SoC has the same dma engine as the H3 (sun8i), with a
    reduced amount of physical channels. To allow future reuse of the
    compatible, leave the channel count etc. in the config data blank
    and retrieve it from the devicetree.

    Signed-off-by: Stefan Brüns
    Acked-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Stefan Brüns
     
  • Preparatory patch: If the same compatible is used for different SoCs which
    have a common register layout, but different number of channels, the
    channel count can no longer be stored in the config. Store it in the
    device structure instead.

    Signed-off-by: Stefan Brüns
    Acked-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Stefan Brüns
     
  • The H3 supports bursts lengths of 1, 4, 8 and 16 transfers, each with
    a width of 1, 2, 4 or 8 bytes.

    The register value for the the width is log2-encoded, change the
    conversion function to provide the correct value for width == 8.

    Signed-off-by: Stefan Brüns
    Acked-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Stefan Brüns
     
  • The current code mixes three distinct operations when transforming
    the slave config to register settings:

    1. special handling of DMA_SLAVE_BUSWIDTH_UNDEFINED, maxburst == 0
    2. range checking
    3. conversion of raw to register values

    As the range checks depend on the specific SoC, move these out of the
    conversion to distinct operations.

    Signed-off-by: Stefan Brüns
    Acked-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Stefan Brüns
     
  • For the H3, the burst lengths field offsets in the channel configuration
    register differs from earlier SoC generations.

    Using the A31 register macros actually configured the H3 controller
    do to bursts of length 1 always, which although working leads to higher
    bus utilisation.

    Signed-off-by: Stefan Brüns
    Acked-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Stefan Brüns
     
  • The H83T uses a compatible string different from the A23, but requires
    the same clock autogating register setting.

    The H3 also requires setting the clock autogating register, but has
    the register at a different offset.

    Add three suitable callbacks for the existing controller generations
    and set it in the controller config structure.

    Signed-off-by: Stefan Brüns
    Acked-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Stefan Brüns
     

22 Sep, 2017

1 commit


05 Sep, 2017

2 commits


14 Nov, 2016

1 commit

  • dma_pool_alloc does not initialize the value of the newly allocated
    block for the v_lli, and the uninitilize value make the tests failed
    which is on pine64 with dmatest.
    we can fix it just change the "|=" to "=" for the v_lli->cfg.

    Signed-off-by: Hao Zhang
    Acked-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Axl-zhang
     

27 Sep, 2016

1 commit


22 Jun, 2016

1 commit


02 May, 2016

3 commits


26 Apr, 2016

3 commits


01 Oct, 2015

1 commit


05 Aug, 2015

1 commit

  • Most drivers need to set constraints on the buffer alignment for async tx
    operations. However, even though it is documented, some drivers either use
    a defined constant that is not matching what the alignment variable expects
    (like DMA_BUSWIDTH_* constants) or fill the alignment in bytes instead of
    power of two.

    Add a new enum for these alignments that matches what the framework
    expects, and convert the drivers to it.

    Signed-off-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Maxime Ripard
     

08 May, 2015

1 commit


19 Mar, 2015

3 commits


22 Dec, 2014

2 commits


13 Dec, 2014

1 commit

  • Pull dmaengine updates from Vinod Koul:
    "Main features this time are:

    - BAM v1.3.0 support form qcom bam dma
    - support for Allwinner sun8i dma
    - atmels eXtended DMA Controller driver
    - chancnt cleanup by Maxime
    - fixes spread over drivers"

    * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (56 commits)
    dmaenegine: Delete a check before free_percpu()
    dmaengine: ioatdma: fix dma mapping errors
    dma: cppi41: add a delay while setting the TD bit
    dma: cppi41: wait longer for the HW to return the descriptor
    dmaengine: fsl-edma: fixup reg offset and hw S/G support in big-endian model
    dmaengine: fsl-edma: fix calculation of remaining bytes
    drivers/dma/pch_dma: declare pch_dma_id_table as static
    dmaengine: ste_dma40: fix error return code
    dma: imx-sdma: clarify about firmware not found error
    Documentation: devicetree: Fix Xilinx VDMA specification
    dmaengine: pl330: update author info
    dmaengine: clarify the issue_pending expectations
    dmaengine: at_xdmac: Add DMA_PRIVATE
    ARM: dts: at_xdmac: fix bad value of dma-cells in documentation
    dmaengine: at_xdmac: fix missing spin_unlock
    dmaengine: at_xdmac: fix a bug in transfer residue computation
    dmaengine: at_xdmac: fix software lockup at_xdmac_tx_status()
    dmaengine: at_xdmac: remove chancnt affectation
    dmaengine: at_xdmac: prefer usage of readl/writel_relaxed
    dmaengine: xdmac: fix print warning on dma_addr_t variable
    ...

    Linus Torvalds
     

17 Nov, 2014

2 commits


12 Nov, 2014

1 commit

  • The prep_memcpy call was not setting any meaningful burst and width because it
    was relying on the dma_slave_config was not set already.

    Rework the needed conversion functions, and hardcode the width and burst to
    use.

    Signed-off-by: Maxime Ripard
    Cc: stable@vger.kernel.org
    Signed-off-by: Vinod Koul

    Maxime Ripard
     

06 Nov, 2014

1 commit