03 Aug, 2017

1 commit

  • Remove unnecessary static on local variable sha_dd. Such variable
    is initialized before being used, on every execution path throughout
    the function. The static has no benefit and, removing it reduces the
    object file size.

    This issue was detected using Coccinelle and the following semantic patch:
    https://github.com/GustavoARSilva/coccinelle/blob/master/static/static_unused.cocci

    In the following log you can see a significant difference in the object
    file size. This log is the output of the size command, before and after
    the code change:

    before:
    text data bss dec hex filename
    30005 10264 128 40397 9dcd drivers/crypto/atmel-sha.o

    after:
    text data bss dec hex filename
    29934 10208 64 40206 9d0e drivers/crypto/atmel-sha.o

    Signed-off-by: Gustavo A. R. Silva
    Signed-off-by: Herbert Xu

    Gustavo A. R. Silva
     

12 Jul, 2017

1 commit


15 Feb, 2017

2 commits

  • This patch clarifies and fixes how errors should be handled by
    atmel_sha_start().

    For update operations, the previous code wrongly assumed that
    (err != -EINPROGRESS) implies (err == 0). It's wrong because that doesn't
    take the error cases (err < 0) into account.

    This patch also adds many comments to detail all the possible returned
    values and what should be done in each case.

    Especially, when an error occurs, since atmel_sha_complete() has already
    been called, hence releasing the hardware, atmel_sha_start() must not call
    atmel_sha_finish_req() later otherwise atmel_sha_complete() would be
    called a second time.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • This patch fixes a previous patch: "crypto: atmel-sha - update request
    queue management to make it more generic".

    Indeed the patch above should have replaced the "return -EINVAL;" lines by
    "return atmel_sha_complete(dd, -EINVAL);" but instead replaced them by a
    simple call of "atmel_sha_complete(dd, -EINVAL);".
    Hence all "return" instructions were missing.

    Reported-by: Dan Carpenter
    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     

11 Feb, 2017

1 commit

  • When we enable COMPILE_TEST building for the Atmel sha and tdes implementations,
    we run into a couple of warnings about incorrect format strings, e.g.

    In file included from include/linux/platform_device.h:14:0,
    from drivers/crypto/atmel-sha.c:24:
    drivers/crypto/atmel-sha.c: In function 'atmel_sha_xmit_cpu':
    drivers/crypto/atmel-sha.c:571:19: error: format '%d' expects argument of type 'int', but argument 6 has type 'size_t {aka long unsigned int}' [-Werror=format=]
    In file included from include/linux/printk.h:6:0,
    from include/linux/kernel.h:13,
    from drivers/crypto/atmel-tdes.c:17:
    drivers/crypto/atmel-tdes.c: In function 'atmel_tdes_crypt_dma_stop':
    include/linux/kern_levels.h:4:18: error: format '%u' expects argument of type 'unsigned int', but argument 2 has type 'size_t {aka long unsigned int}' [-Werror=format=]

    These are all fixed by using the "%z" modifier for size_t data.

    There are also a few uses of min()/max() with incompatible types:

    drivers/crypto/atmel-tdes.c: In function 'atmel_tdes_crypt_start':
    drivers/crypto/atmel-tdes.c:528:181: error: comparison of distinct pointer types lacks a cast [-Werror]

    Where possible, we should use consistent types here, otherwise we can use
    min_t()/max_t() to get well-defined behavior without a warning.

    Signed-off-by: Arnd Bergmann
    Signed-off-by: Herbert Xu

    Arnd Bergmann
     

03 Feb, 2017

10 commits

  • When VERBOSE_DEBUG is defined and SHA_FLAGS_DUMP_REG flag is set in
    dd->flags, this patch prints the register names and values when performing
    IO accesses.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • This patchs allows to combine the AES and SHA hardware accelerators on
    some Atmel SoCs. Doing so, AES blocks are only written to/read from the
    AES hardware. Those blocks are also transferred from the AES to the SHA
    accelerator internally, without additionnal accesses to the system busses.

    Hence, the AES and SHA accelerators work in parallel to process all the
    data blocks, instead of serializing the process by (de)crypting those
    blocks first then authenticating them after like the generic
    crypto/authenc.c driver does.

    Of course, both the AES and SHA hardware accelerators need to be available
    before we can start to process the data blocks. Hence we use their crypto
    request queue to synchronize both drivers.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • This patch adds support to the hmac(shaX) algorithms.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • This patch adds a simple function to perform data transfer with the DMA
    controller.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • This patch adds a simple function to perform data transfer with PIO, hence
    handled by the CPU.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • This patch simply defines a helper function to test the 'Data Ready' flag
    of the Status Register. It also gives a chance for the crypto request to
    be processed synchronously if this 'Data Ready' flag is already set when
    polling the Status Register. Indeed, running synchronously avoid the
    latency of the 'Data Ready' interrupt.

    When the 'Data Ready' flag has not been set yet, we enable the associated
    interrupt and resume processing the crypto request asynchronously from the
    'done' task just as before.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • This patch modifies the SHA_FLAGS_SHA* flags: those algo flags are now
    organized as values of a single bitfield instead of individual bits.
    This allows to reduce the number of bits needed to encode all possible
    values. Also the new values match the SHA_MR_ALGO_SHA* values hence
    the algorithm bitfield of the SHA_MR register could simply be set with:

    mr = (mr & ~SHA_FLAGS_ALGO_MASK) | (ctx->flags & SHA_FLAGS_ALGO_MASK)

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • This patch is a transitional patch. It updates atmel_sha_done_task() to
    make it more generic. Indeed, it adds a new .resume() member in the
    atmel_sha_dev structure. This hook is called from atmel_sha_done_task()
    to resume processing an asynchronous request.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • This patch is a transitional patch. It splits the atmel_sha_handle_queue()
    function. Now atmel_sha_handle_queue() only manages the request queue and
    calls a new .start() hook from the atmel_sha_ctx structure.
    This hook allows to implement different kind of requests still handled by
    a single queue.

    Also when the req parameter of atmel_sha_handle_queue() refers to the very
    same request as the one returned by crypto_dequeue_request(), the queue
    management now gives a chance to this crypto request to be handled
    synchronously, hence reducing latencies. The .start() hook returns 0 if
    the crypto request was handled synchronously and -EINPROGRESS if the
    crypto request still need to be handled asynchronously.

    Besides, the new .is_async member of the atmel_sha_dev structure helps
    tagging this asynchronous state. Indeed, the req->base.complete() callback
    should not be called if the crypto request is handled synchronously.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • This is a transitional patch: it creates the atmel_sha_find_dev() function,
    which will be used in further patches to share the source code responsible
    for finding a Atmel SHA device.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     

18 Mar, 2016

1 commit

  • Pull crypto update from Herbert Xu:
    "Here is the crypto update for 4.6:

    API:
    - Convert remaining crypto_hash users to shash or ahash, also convert
    blkcipher/ablkcipher users to skcipher.
    - Remove crypto_hash interface.
    - Remove crypto_pcomp interface.
    - Add crypto engine for async cipher drivers.
    - Add akcipher documentation.
    - Add skcipher documentation.

    Algorithms:
    - Rename crypto/crc32 to avoid name clash with lib/crc32.
    - Fix bug in keywrap where we zero the wrong pointer.

    Drivers:
    - Support T5/M5, T7/M7 SPARC CPUs in n2 hwrng driver.
    - Add PIC32 hwrng driver.
    - Support BCM6368 in bcm63xx hwrng driver.
    - Pack structs for 32-bit compat users in qat.
    - Use crypto engine in omap-aes.
    - Add support for sama5d2x SoCs in atmel-sha.
    - Make atmel-sha available again.
    - Make sahara hashing available again.
    - Make ccp hashing available again.
    - Make sha1-mb available again.
    - Add support for multiple devices in ccp.
    - Improve DMA performance in caam.
    - Add hashing support to rockchip"

    * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (116 commits)
    crypto: qat - remove redundant arbiter configuration
    crypto: ux500 - fix checks of error code returned by devm_ioremap_resource()
    crypto: atmel - fix checks of error code returned by devm_ioremap_resource()
    crypto: qat - Change the definition of icp_qat_uof_regtype
    hwrng: exynos - use __maybe_unused to hide pm functions
    crypto: ccp - Add abstraction for device-specific calls
    crypto: ccp - CCP versioning support
    crypto: ccp - Support for multiple CCPs
    crypto: ccp - Remove check for x86 family and model
    crypto: ccp - memset request context to zero during import
    lib/mpi: use "static inline" instead of "extern inline"
    lib/mpi: avoid assembler warning
    hwrng: bcm63xx - fix non device tree compatibility
    crypto: testmgr - allow rfc3686 aes-ctr variants in fips mode.
    crypto: qat - The AE id should be less than the maximal AE number
    lib/mpi: Endianness fix
    crypto: rockchip - add hash support for crypto engine in rk3288
    crypto: xts - fix compile errors
    crypto: doc - add skcipher API documentation
    crypto: doc - update AEAD AD handling
    ...

    Linus Torvalds
     

11 Mar, 2016

1 commit


17 Feb, 2016

2 commits

  • When (!ctx->bufcnt && !(ctx->flags & SHA_FLAGS_PAD)), the former source
    code used to set the SHA_FLAGS_BUSY without checking whether this flag was
    already set. If so, the hardware is already processing another hash
    request so the processing of the req argument of atmel_sha_final() should
    be delayed by queueing this request, the same way as done for the
    (ctx->bufcnt != 0) case.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • Using only the digest, digcnt[], bufcnt and buffer[] fields of the
    struct atmel_sha_reqctx was not enough to import/export the request state,
    so now we use the whole structure.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     

06 Feb, 2016

2 commits

  • clk_prepare()/clk_unprepare() must not be called within atomic context.

    This patch calls clk_prepare() once for all from atmel_sha_probe() and
    clk_unprepare() from atmel_sha_remove().

    Then calls of clk_prepare_enable()/clk_disable_unprepare() were replaced
    by calls of clk_enable()/clk_disable().

    Cc: stable@vger.kernel.org
    Signed-off-by: Cyrille Pitchen
    Reported-by: Matthias Mayr
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • Since atmel_sha_probe() uses devm_xxx functions to allocate resources,
    atmel_sha_remove() should no longer explicitly release them.

    Cc: stable@vger.kernel.org
    Signed-off-by: Cyrille Pitchen
    Fixes: b0e8b3417a62 ("crypto: atmel - use devm_xxx() managed function")
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     

30 Jan, 2016

1 commit

  • This patch implements the missing .import() and .export() mandatory
    hooks for asynchronous hash algorithms. It also sets the relevant, non
    zero, value for the .statesize field when declaring the supported SHA
    algorithms. Indeed a zero value of .statesize prevents the algorithm from
    being registered.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     

25 Jan, 2016

4 commits

  • This patch saves the value of the internal hash register at the end of an
    'update' operation then restores this value before starting the next
    'update'. This way the driver can now properly handle context switches.

    WARNING: only hardware versions from sama5d4x and later provide the
    needed interface to update the internal hash value. Especially, sama5d3x
    cannot implement this feature so context switches are still broken.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • This patch adds support of hardware version 5.1.x embedded inside sama5d2x
    SoCs.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • The 'done' tasklet handler used to check the 'BUSY' flag to either
    finalize the processing of a crypto request which had just completed or
    manage the crypto queue to start the next crypto request.

    On request R1 completion, the driver calls atmel_sha_finish_req(), which:
    1 - clears the 'BUSY' flag since the hardware is no longer used and is
    ready again to process new crypto requests.
    2 - notifies the above layer (the client) about the completion of the
    asynchronous crypto request R1 by calling its base.complete()
    callback.
    3 - schedules the 'done' task to check the crypto queue and start to
    process the next crypto request (the 'BUSY' flag is supposed to be
    cleared at that moment) if such a pending request exists.

    However step 2 might wake the client up so it can now ask our driver to
    process a new crypto request R2. This request is enqueued by calling the
    atmel_sha_handle_queue() function, which sets the 'BUSY' flags then
    starts to process R2.

    If the 'done' tasklet, scheduled by step 3, runs just after, it would see
    that the 'BUSY' flag is set then understand that R2 has just completed,
    which is wrong!

    So the state of 'BUSY' flag is not a proper way to detect and handle
    crypto request completion.

    This patch fixes this race condition by using two different tasklets, one
    to handle the crypto request completion events, the other to manage the
    crypto queue if needed.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     
  • This patch fixes a crash which occured during the computation of the
    digest of an empty message.

    Indeed, when processing an empty message, the atmel_sha_handle_queue()
    function was never called, hence the dd->req pointer remained
    uninitialized.

    Later, when the atmel_sha_final_req() function was called, it used
    to crash while using this uninitialized dd->req pointer.

    Hence this patch adds missing initializations of dd->req before calls of
    the atmel_sha_final_req() function.

    This bug prevented us from passing the tcrypt test suite on SHA algo.

    Signed-off-by: Cyrille Pitchen
    Signed-off-by: Herbert Xu

    Cyrille Pitchen
     

17 Dec, 2015

1 commit


14 Oct, 2015

1 commit


08 Oct, 2015

1 commit


08 Apr, 2015

5 commits

  • The maximum source and destination burst size is 16
    according to the datasheet of Atmel DMA. And the value
    is also checked in function at_xdmac_csize of Atmel
    DMA driver. With the restrict, the value beyond maximum
    value will not be processed in DMA driver, so SHA384 and
    SHA512 will not work and the program will wait forever.

    So here change the max burst size of all the cases to 16
    in order to make SHA384 and SHA512 work and keep consistent
    with DMA driver and datasheet.

    Signed-off-by: Leilei Zhao
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Leilei Zhao
     
  • Kernel will report "BUG: spinlock lockup suspected on CPU#0"
    when CONFIG_DEBUG_SPINLOCK is enabled in kernel config and the
    spinlock is used at the first time. It's caused by uninitialized
    spinlock, so just initialize it in probe.

    Signed-off-by: Leilei Zhao
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Leilei Zhao
     
  • Having a zero length sg doesn't mean it is the end of the sg list. This
    case happens when calculating HMAC of IPSec packet.

    Signed-off-by: Leilei Zhao
    Signed-off-by: Ludovic Desroches
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Leilei Zhao
     
  • When a hash is requested on data bigger than the buffer allocated by the
    SHA driver, the way DMA transfers are performed is quite strange:
    The buffer is filled at each update request. When full, a DMA transfer
    is done. On next update request, another DMA transfer is done. Then we
    wait to have a full buffer (or the end of the data) to perform the dma
    transfer. Such a situation lead sometimes, on SAMA5D4, to a case where
    dma transfer is finished but the data ready irq never comes. Moreover
    hash was incorrect in this case.

    With this patch, dma transfers are only performed when the buffer is
    full or when there is no more data. So it removes the transfer whose size
    is equal the update size after the full buffer transmission.

    Signed-off-by: Ludovic Desroches
    Signed-off-by: Leilei Zhao
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Ludovic Desroches
     
  • Add new version of atmel-sha available with SAMA5D4 devices.

    Signed-off-by: Leilei Zhao
    Signed-off-by: Ludovic Desroches
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Leilei Zhao
     

04 Mar, 2015

1 commit


22 Dec, 2014

1 commit


20 Oct, 2014

1 commit


01 Aug, 2014

1 commit


13 Dec, 2013

2 commits