12 Feb, 2019
1 commit
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Add support for unbinding the generic PCI host controller. This is
particularly useful when working in virtual environments where the
controller may come and go, but possibly not only there.Signed-off-by: Jan Kiszka
Signed-off-by: Bjorn Helgaas
CC: Will Deacon
CC: Lorenzo Pieralisi
(cherry picked from commit 01fcb7f777a9f5d216a1ff41228f15656e50fb63)
(cherry picked from commit 6a8a0e11c827908864cdd45623aa17b5bc80d2e5)
Signed-off-by: Peng Fan
19 Apr, 2017
1 commit
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pci_host_common_probe() is defined when CONFIG_PCI_HOST_COMMON=y;
therefore the function declaration should match that.drivers/pci/host/pcie-tango.c:300:9: error:
implicit declaration of function 'pci_host_common_probe'Signed-off-by: Marc Gonzalez
Signed-off-by: Bjorn Helgaas
23 Mar, 2017
1 commit
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struct pci_ecam_ops embeds a struct pci_ops. Explicitly request the
definition for struct pci_ops, otherwise gcc might complain:include/linux/pci-ecam.h:29:19: error: field 'pci_ops' has incomplete type
Signed-off-by: Marc Gonzalez
Signed-off-by: Bjorn Helgaas
07 Dec, 2016
5 commits
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PCIe controllers in X-Gene SoCs are not ECAM compliant: software needs to
configure additional controller's register to address device at
bus:dev:function.Add a quirk to discover controller MMIO register space and configure
controller registers to select and address the target secondary device.The quirk will only be applied for X-Gene PCIe MCFG table with
OEM revison 1, 2, 3 or 4 (PCIe controller v1 and v2 on X-Gene SoCs).Tested-by: Jon Masters
Signed-off-by: Duc Dang
Signed-off-by: Bjorn Helgaas -
ThunderX pass1.x requires to emulate the EA headers for on-chip devices
hence it has to use custom pci_thunder_ecam_ops for accessing PCI config
space (pci-thunder-ecam.c). Add new entries to MCFG quirk array where it
can be applied while probing ACPI based PCI host controller.ThunderX pass1.x is using the same way for accessing off-chip devices
(so-called PEM) as silicon pass-2.x so we need to add PEM quirk entries
too.Quirk is considered for ThunderX silicon pass1.x only which is identified
via MCFG revision 2.ThunderX pass 1.x requires the following accessors:
NUMA node 0 PCI segments 0- 3: pci_thunder_ecam_ops (MCFG quirk)
NUMA node 0 PCI segments 4- 9: thunder_pem_ecam_ops (MCFG quirk)
NUMA node 1 PCI segments 10-13: pci_thunder_ecam_ops (MCFG quirk)
NUMA node 1 PCI segments 14-19: thunder_pem_ecam_ops (MCFG quirk)[bhelgaas: change Makefile/ifdefs so quirk doesn't depend on
CONFIG_PCI_HOST_THUNDER_ECAM]
Signed-off-by: Tomasz Nowicki
Signed-off-by: Bjorn Helgaas -
ThunderX PCIe controller to off-chip devices (so-called PEM) is not fully
compliant with ECAM standard. It uses non-standard configuration space
accessors (see thunder_pem_ecam_ops) and custom configuration space
granulation (see bus_shift = 24). In order to access configuration space
and probe PEM as ACPI-based PCI host controller we need to add MCFG quirk
infrastructure. This involves:
1. A new thunder_pem_acpi_init() init function to locate PEM-specific
register ranges using ACPI.
2. Export PEM thunder_pem_ecam_ops structure so it is visible to MCFG quirk
code.
3. New quirk entries for each PEM segment. Each contains platform IDs,
mentioned thunder_pem_ecam_ops and CFG resources.Quirk is considered for ThunderX silicon pass2.x only which is identified
via MCFG revision 1.ThunderX pass 2.x requires the following accessors:
NUMA Node 0 PCI segments 0- 3: pci_generic_ecam_ops (ECAM-compliant)
NUMA Node 0 PCI segments 4- 9: thunder_pem_ecam_ops (MCFG quirk)
NUMA Node 1 PCI segments 10-13: pci_generic_ecam_ops (ECAM-compliant)
NUMA Node 1 PCI segments 14-19: thunder_pem_ecam_ops (MCFG quirk)[bhelgaas: adapt to use acpi_get_rc_resources(), update Makefile/ifdefs so
quirk doesn't depend on CONFIG_PCI_HOST_THUNDER_PEM]
Signed-off-by: Tomasz Nowicki
Signed-off-by: Bjorn Helgaas -
The PCIe controller in Hip05/Hip06/Hip07 SoCs is not completely
ECAM-compliant. It is non-ECAM only for the RC bus config space; for any
other bus underneath the root bus it does support ECAM access.Add specific quirks for PCI config space accessors. This involves:
1. New initialization call hisi_pcie_init() to obtain RC base
addresses from PNP0C02 at the root of the ACPI namespace (under \_SB).
2. New entry in common quirk array.[bhelgaas: move to pcie-hisi.c and change Makefile/ifdefs so quirk doesn't
depend on CONFIG_PCI_HISI]
Signed-off-by: Dongdong Liu
Signed-off-by: Gabriele Paoloni
Signed-off-by: Bjorn Helgaas -
The Qualcomm Technologies QDF2432 SoC does not support accesses smaller
than 32 bits to the PCI configuration space. Register the appropriate
quirk.[bhelgaas: add QCOM_ECAM32 macro, ifdef for ACPI and PCI_QUIRKS]
Signed-off-by: Christopher Covington
Signed-off-by: Bjorn Helgaas
11 Jun, 2016
2 commits
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Add a parent device field to struct pci_config_window. The parent is not
saved now, but will be useful to save it in some cases. For ACPI on ARM64,
it can be used to setup ACPI companion and domain.Since the parent dev is in struct pci_config_window now, we need not pass
it to the init function as a separate argument.Signed-off-by: Jayachandran C
Signed-off-by: Bjorn Helgaas
Acked-by: Lorenzo Pieralisi -
This header will be used from arch/arm64 for ACPI PCI implementation so it
needs to be moved out of drivers/pci.Update users of the header file to use the new name. No functional
changes.Signed-off-by: Jayachandran C
Signed-off-by: Bjorn Helgaas
Acked-by: Lorenzo Pieralisi
