Eric Lee / smarc-fsl-linux-kernel

24 Jul, 2016

2 commits

  • a9f2fc628   xtensa: cleanup MMU setup and kernel layout macros ... Browse Code »

    Make kernel load address explicit, independent of the selected MMU
    configuration and configurable from Kconfig. Do not restrict it to the
    first 512MB of the physical address space.

    Cleanup kernel memory layout macros:

    - rename VECBASE_RESET_VADDR to VECBASE_VADDR, XC_VADDR to VECTOR_VADDR;
    - drop VIRTUAL_MEMORY_ADDRESS and LOAD_MEMORY_ADDRESS;
    - introduce PHYS_OFFSET and use it in __va and __pa definitions;
    - synchronize MMU/noMMU vectors, drop unused NMI vector;
    - replace hardcoded vectors offset of 0x3000 with Kconfig symbol.

    Signed-off-by: Max Filippov

    Max Filippov
     
  • d39af9026   xtensa: add alternative kernel memory layouts ... Browse Code »

    MMUv3 is able to support low memory bigger than 128MB.
    Implement 256MB and 512MB KSEG layouts:

    - add Kconfig selector for KSEG layout;
    - add KSEG base address, size and alignment definitions to
    arch/xtensa/include/asm/kmem_layout.h;
    - use new definitions in TLB initialization;
    - add build time memory map consistency checks.

    See Documentation/xtensa/mmu.txt for the details of new memory layouts.

    Signed-off-by: Max Filippov

    Max Filippov
     

15 Jan, 2014

2 commits

  • 6cb971114   xtensa: remap io area defined in device tree ... Browse Code »

    Use the simple-bus node to discover the io area, and remap the cached and
    bypass io ranges. The parent-bus-address value of the first triplet in the
    "ranges" property is used. This value is rounded down to the nearest 256MB
    boundary. The length of the io area is fixed at 256MB; the "ranges" property
    length value is ignored.

    Other limitations: (1) only the first simple-bus node is considered, and (2)
    only the first triplet of the "ranges" property is considered.

    See ePAPR 1.1 §6.5 for the simple-bus node description, and §2.3.8 for the
    "ranges" property description.

    Signed-off-by: Baruch Siach
    Signed-off-by: Max Filippov

    Baruch Siach
     
  • 5f42146e7   xtensa: fix ATOMCTL register documentation ... Browse Code »

    Make the WT entry match table 4-52 of the Xtensa ISA RM (RD-2012.5).

    Signed-off-by: Baruch Siach
    Signed-off-by: Max Filippov

    Baruch Siach
     

09 May, 2013

1 commit

19 Dec, 2012

1 commit