19 May, 2015
1 commit
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The PWM hardware on Pistachio platform has a maximum timebase steps
value to 255. To fix it, let's introduce a compatible-specific
data structure to contain the SoC-specific details and use it to
specify a maximum timebase.Also, let's limit the minimum timebase to 16 steps, to allow a sane
range of duty cycle steps.Fixes: 277bb6a29e00 ("pwm: Imagination Technologies PWM DAC driver")
Signed-off-by: Naidu Tellapati
Signed-off-by: Ezequiel Garcia
Signed-off-by: Thierry Reding
23 Apr, 2015
1 commit
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For platforms that don't support DT, some early MFD modules can register
lookup tables. Remove the __init annotation so that this works. This is
similar to gpio_add_lookup_table() which allows late additions.CC: Samuel Ortiz
Cc: Linus Walleij
Cc: Alexandre Courbot
Cc: Thierry Reding
Signed-off-by: Shobhit Kumar
Signed-off-by: Thierry Reding
27 Mar, 2015
1 commit
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When disabling the Samsung PWM the output state remains at the level it
was at the end of a PWM cycle. In other words, calling pwm_disable()
when at 100% duty cycle will keep the output active, while at all other
settings the output will go/stay inactive. On top of that the Samsung
PWM settings are double-buffered, which means the new settings only get
applied at the start of a new PWM cycle.This results in a race if the PWM is at 100% duty cycle and a driver
calls:pwm_config(pwm, 0, period);
pwm_disable(pwm);In this case the PWMs output will unexpectedly stay active, unless a new
PWM cycle happened to start between the register writes in pwm_config()
and pwm_disable(). As far as I can tell this is a regression introduced
by 3bdf878, before that a call to pwm_config() would call
pwm_samsung_enable() which, while heavy-handed, made sure the expected
settings were live.To resolve this, while not re-introducing the issues 3bdf878 (flickering
as the PWM got reset while in a PWM cycle) fixed, only force an update
of the settings when at 100% duty cycle, which shouldn't have any
noticeable effect on the output but is enough to ensure the behaviour is
as expected on disable.Signed-off-by: Sjoerd Simons
Reviewed-by: Javier Martinez Canillas
Acked-by: Lukasz Majewski
Signed-off-by: Thierry Reding
11 Mar, 2015
3 commits
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The driver computes which clock divider it sould be using from the
requested period. This computation assumes that the link between the
register value and the actual divider value is raising 2 to the power of
the registry value.div = 1 << regvalue
This is true only for the first 5 values out of 8. Next values are 64,
256 and, 1024 - instead of 32, 64, 128.
This affects only the users requesting a period > 0.04369s.Replace the computation with a look-up table.
Signed-off-by: Gaetan Hug
Acked-by: Shawn Guo
Signed-off-by: Thierry Reding -
sama5d4 SoC also has an errata on the HLCDC PWM. It is the same as the
sama5d3 that is forbidding the use of div1 prescaler.Signed-off-by: Nicolas Ferre
Acked-by: Boris Brezillon
Signed-off-by: Thierry Reding -
The regmap_config struct may be const because it is not modified by the
driver and regmap_init() accepts pointer to const.Signed-off-by: Krzysztof Kozlowski
Signed-off-by: Thierry Reding
18 Feb, 2015
1 commit
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Instead of using the literal value for the number of nanoseconds per
second, use the macro instead to increase readability.Signed-off-by: Thierry Reding
03 Feb, 2015
1 commit
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The of_node_put() function tests whether its argument is NULL and then
returns immediately. Thus the test around the call is not needed.This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
Signed-off-by: Thierry Reding
30 Jan, 2015
5 commits
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The Pistachio SOC from Imagination Technologies includes a Pulse Width
Modulation DAC which produces 1 to 4 digital bit-outputs which represent
digital waveforms. These PWM outputs are primarily in charge of controlling
backlight LED devices.Reviewed-by: Andrew Bresticker
Signed-off-by: Naidu Tellapati
Signed-off-by: Sai Masarapu
Signed-off-by: Ezequiel Garcia
Reviewed-by: Vladimir Zapolskiy
[thierry.reding: fixup license header as discussed on list]
Signed-off-by: Thierry Reding -
This patch introduces a bitmap which is used to keep track of the
pwm channels which have been configured in a pwm chip.The method used earlier to find the number of configured channels,
was to count the pwmdevices with PWMF_REQUESTED field set
and period value configured. This was not correct and failed
when of_pwm_get()/pwm_get() and then pwm_config() was used.Signed-off-by: Ajit Pal Singh
Signed-off-by: Thierry Reding -
This adds a generic PWM framework driver for the PWM controller
found on Allwinner SoCs.Signed-off-by: Alexandre Belloni
Acked-by: Maxime Ripard
Signed-off-by: Thierry Reding -
The slow and system clock should never return a rate of zero, but this
might happen if the clocks property defined in the DT is referencing the
wrong clocks.Prevent any division by zero from happening by testing the clk_freq
value before calling do_div().Signed-off-by: Boris Brezillon
Signed-off-by: Thierry Reding -
The include/linux/clk.h header defines dummy implementations for the
various clk_*() functions if HAVE_CLK is not selected to improve build
coverage in randconfig builds.The dummy implementation of clk_get_rate() returns 0, which causes the
Atmel HLCDC PWM driver's atmel_hlcdc_pwm_config() implementation to end
up calling:do_div(clk_period_ns, 0)
On x86, do_div(n, base) will end up evaluating to this:
n >>= ilog2(base)
with base = 0, the implementation of ilog2() will call ____ilog2_NaN(),
which is purposely undefined and results in a linker failure:ERROR: "____ilog2_NaN" [drivers/pwm/pwm-atmel-hlcdc.ko] undefined!
The implementation of do_div() checks that base is a power of 2 before
calling ilog2(). The compiler doesn't optimize this away, presumably
because is_power_of_2() is an inline function and the compiler doesn't
or can't inspect it closely enough. ilog2() being a macro it still ends
up generating the ____ilog2_NaN() because of the constant 0.The root of the problem is that the driver really should be checking
before possibly dividing by zero. That should eventually be fixed, but
for now just assume that the clock runs at a sensible frequency when
available.Reported-by: Jim Davis
Acked-by: Boris Brezillon
Signed-off-by: Thierry Reding
18 Dec, 2014
1 commit
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…ierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"There are two new drivers, one for the BCM2835 (Raspberry Pi) and one
used in conjunction with the LCD controller on various Atmel SoCs.
The Samsung PWM driver can now be built for 64-bit ARM (Exynos7).A couple of fixes have been applied to the FTM PWM driver and system
sleep support was added"* tag 'pwm/for-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
pwm: atmel-hlcdc: add at91sam9x5 and sama5d3 errata handling
pwm: ftm: Add Power Management support for FTM PWM
pwm: ftm: Add regmap rbtree type cache support
pwm: ftm: Correctly track usage count
pwm: samsung: Allow Samsung PWM driver to be enabled on Exynos7
pwm: add DT bindings documentation for atmel-hlcdc-pwm driver
pwm: add support for atmel-hlcdc-pwm device
pwm: Add BCM2835 PWM driver
04 Dec, 2014
1 commit
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at91sam9x5 has an errata forbidding the use of slow clk as a clk source and
sama5d3 SoCs has another errata forbidding the use of div1 prescaler.Take both of these erratas into account.
Signed-off-by: Boris Brezillon
Acked-by: Nicolas Ferre
Signed-off-by: Thierry Reding
01 Dec, 2014
3 commits
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Add PM support for FTM PWM driver using callback function suspend
and resume in .driver.pm of platform_driver.Signed-off-by: Xiubo Li
Signed-off-by: Thierry Reding -
This patch is to prepare for adding PM support for FTM PWM driver using
callback function suspend and resume in .driver.pm of platform_driver.Signed-off-by: Xiubo Li
Signed-off-by: Thierry Reding -
No matter how many times the FTM PWM is enabled, the use_count will
always be one.Signed-off-by: Xiubo Li
Signed-off-by: Thierry Reding
17 Nov, 2014
3 commits
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To re-use the existing PWM driver for 64-bit ARM based Exynos7 SoC, make
the driver depend on ARCH_EXYNOS along with PLAT_SAMSUNG.Signed-off-by: Abhilash Kesavan
Signed-off-by: Thierry Reding -
The HLCDC IP available in some Atmel SoCs (i.e. at91sam9x5, at91sam9n12
or sama5d3 families for instance) provides a PWM device.This driver add support for a PWM chip exposing a single PWM device (which
will most likely be used to drive a backlight device).Signed-off-by: Boris Brezillon
Tested-by: Anthony Harivel
Tested-by: Ludovic Desroches
Acked-by: Thierry Reding
Acked-by: Nicolas Ferre
Signed-off-by: Thierry Reding -
Add PWM driver for Broadcom BCM2835 processor (Raspberry Pi)
Signed-off-by: Bart Tanghe
Acked-by: Stephen Warren
Signed-off-by: Thierry Reding
04 Nov, 2014
1 commit
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…l/git/wsa/linux into driver-core-next
Remove all .owner fields from platform drivers
21 Oct, 2014
1 commit
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…ierry.reding/linux-pwm
Pull pwm changes from Thierry Reding:
"There are no new drivers here, only a couple of fixes all over the
place"* tag 'pwm/for-3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm:
pwm: Let PWM_CLPS711X depend on HAS_IOMEM
pwm: atmel: Fix calculation of prescale value
pwm: Fix uninitialized warnings in pwm_get()
pwm: rockchip: Allow polarity invert on rk3288
pwm: imx: Avoid sample FIFO overflow for i.MX PWM version2
pwm: imx: Cleanup indentation for register definitions
pwm: imx: Fix the macro MX3_PWMCR_PRESCALER(x) definition
pwm: Fix possible ZERO_SIZE_PTR pointer dereferencing error.
pwm: lpss: make it buildable only on X86
pwm: lpss: use c99 initializers in structures
pwm: lpss: Fix build failure on PowerPC
pwm: lpss: pci: Move to use pcim_enable_device()
pwm: lpss: Properly split driver to parts
pwm: lpss: Add ACPI and PCI IDs for Intel Braswell
pwm: fsl-ftm: Select REGMAP_MMIO
pwm: fsl-ftm: Document 'big-endian' property
pwm: fsl-ftm: Convert to direct regmap API usage
pwm: fsl-ftm: Clean up the code
20 Oct, 2014
2 commits
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A platform_driver does not need to set an owner, it will be populated by the
driver core.Signed-off-by: Wolfram Sang
-
PWM_CLPS711X needs HAS_IOMEM, so depend on it, the related error (with
allmodconfig under um):MODPOST 1205 modules
ERROR: "devm_ioremap_resource" [drivers/pwm/pwm-clps711x.ko] undefined!
ERROR: "devm_ioremap" [drivers/net/phy/mdio-bcm-unimac.ko] undefined!Signed-off-by: Chen Gang
Signed-off-by: Thierry Reding
25 Sep, 2014
1 commit
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The prescale value used for calculating the period was incremented
afterwards, thus the resulting prescale value is by one too high.
This resulted in a PWM frequency only half as high as requested.This patch moves the 64 bit division out of the prescale loop to
correct the above issue and make the calculation more efficient.Signed-off-by: Nikolaus Voss
Tested-by: Bo Shen
Acked-by: Bo Shen
Signed-off-by: Thierry Reding
09 Sep, 2014
1 commit
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Pull "Second batch of AT91 cleanup for 3.18" from Nicolas Ferre:
- Timer Counter (TC) fixup and cleanup:
- fix segmentation fault when kexec-ing a kernel by masking
TC interrupts at shutdown and probe time
- use modern driver model: devm_*, probe function, sanitize IRQ requestSigned-off-by: Arnd Bergmann
* tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91:
clocksource: tcb_clksrc: sanitize IRQ request
ARM: at91/tclib: mask interruptions at shutdown and probe
ARM: at91/tclib: move initialization from alloc to probe
ARM: at91/tclib: prefer using of devm_* functions
08 Sep, 2014
1 commit
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Move resource retrieval from atmel_tc_alloc to tc_probe to avoid lately
reporting resource related issues when a TC block user request a TC block.Moreover, resources retrieval are usually done in the probe function,
thus moving them add some consistency with other drivers.Initialization is done once, ie not every time a tc block is requested.
If it fails, the device is not appended to the list of tc blocks.Furhermore, the device id is retrieved at probe as well, avoiding parsing
DT every time the user requests of tc block.Signed-off-by: Gaël PORTAY
Acked-by: Thierry Reding
Acked-by: Boris Brezillon
Signed-off-by: Nicolas Ferre
29 Aug, 2014
1 commit
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With some versions of gcc (e.g. 4.1.2):
drivers/pwm/core.c: In function ‘pwm_get’:
drivers/pwm/core.c:610: warning: ‘polarity’ may be used uninitialized in this function
drivers/pwm/core.c:609: warning: ‘period’ may be used uninitialized in this functionWhile these are false positives, we can get rid of them by refactoring
the code to store a pointer to the best match, as suggested before by
Thierry Reding. This does require moving the mutex_unlock() down.Fixes: d717ea73e36dd565 ("pwm: Fix period and polarity in pwm_get() for non-perfect matches")
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Thierry Reding
26 Aug, 2014
1 commit
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The rk3288 has the ability to invert the polarity of the PWM. Let's
enable that ability. Note that this increases pwm_cells to 3 for
rk3288.Signed-off-by: Doug Anderson
Reviewed-by: Caesar Wang
Signed-off-by: Thierry Reding
25 Aug, 2014
6 commits
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The i.MX PWM version2 is embedded in several i.MX SoCs, such as i.MX27,
i.MX51 and i.MX6SL. There is a 4-word (16 bit) sample FIFO in this IP.
Each FIFO slot determines the duty period of a PWM waveform in one full
cycle. The IP spec mentions that we should not write a fourth sample
because the FIFO will become full and triggers a FIFO write error (FWE)
which will prevent the PWM from starting once it is enabled. In order
to avoid any sample FIFO overflow issue, this patch clears all sample
FIFO by doing software reset in the configuration hook when the
controller is disabled or waits for a full PWM cycle to get a
relinquished FIFO slot when the controller is enabled and the FIFO is
fully loaded.The FIFO overflow issue can be reproduced by the following commands on
the i.MX6SL EVK platform, assuming we use PWM2 for the debug LED which
is driven by the pin HSIC_STROBE and the maximal brightness is 255.echo 0 > /sys/class/leds/user/brightness
echo 0 > /sys/class/leds/user/brightness
echo 0 > /sys/class/leds/user/brightness
echo 0 > /sys/class/leds/user/brightness
echo 255 > /sys/class/leds/user/brightnessHere, FWE happens (PWMSR register reads 0x58) and the LED can not be
lighten.Another way to reproduce the FIFO overflow issue is to run this script:
while true;
do echo 255 > /sys/class/leds/user/brightness;
doneCc: Thierry Reding
Cc: Sascha Hauer
Cc: Shawn Guo
Cc: Lothar Waßmann
Cc: linux-pwm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Liu Ying
Acked-by: Shawn Guo
Signed-off-by: Thierry Reding -
This patch contains no logic change to cleanup indentation for register
definitions only.Cc: Thierry Reding
Cc: Sascha Hauer
Cc: Shawn Guo
Cc: Lothar Waßmann
Cc: linux-pwm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Liu Ying
Acked-by: Shawn Guo
Signed-off-by: Thierry Reding -
This patch adds missing parentheses around the argument of the macro
MX3_PWMCR_PRESCALER(x) to avoid any potential macro expansion issue.Reported-by: Lothar Waßmann
Cc: Thierry Reding
Cc: Sascha Hauer
Cc: Shawn Guo
Cc: Lothar Waßmann
Cc: linux-pwm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Liu Ying
Acked-by: Shawn Guo
Signed-off-by: Thierry Reding -
Since we cannot make sure the 'chip->npwm' will always be none zero here,
and then if either equal to zero, the kzalloc() will return ZERO_SIZE_PTR,
which equals to ((void *)16).So this patch fix this with just doing the zero check before calling kzalloc().
Signed-off-by: Xiubo Li
Signed-off-by: Thierry Reding -
There is no sign of this IP block on non-x86 architectures and rather will not
be. Thus, make this explicit by applying a direct dependency to X86.Signed-off-by: Andy Shevchenko
Signed-off-by: Thierry Reding -
Use c99 initializers for structures.
A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)//
@decl@
identifier i1,fld;
type T;
field list[n] fs;
@@struct i1 {
fs
T fld;
...};@bad@
identifier decl.i1,i2;
expression e;
initializer list[decl.n] is;
@@struct i1 i2 = { is,
+ .fld = e
- e
,...};
//Signed-off-by: Julia Lawall
[thierry.reding: rebased and applied same fix for Braswell]
Signed-off-by: Thierry Reding
23 Aug, 2014
3 commits
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An x86 build seems to pull in the linux/io.h include indirectly. On
PowerPC that doesn't happen and the build breaks due to the readl() and
writel() functions not being declared. Fix this by explicitly including
linux/io.h.Reported-by: Stephen Rothwell
Signed-off-by: Thierry Reding -
Let's use managed functions for this driver.
Signed-off-by: Andy Shevchenko
Reviewed-by: Mika Westerberg
Signed-off-by: Thierry Reding -
The driver consists of core, PCI, and platform parts. It would be better
to split them into separate files.The platform driver is now called pwm-lpss-platform. Thus, previously
set CONFIG_PWM_LPSS=m is not enough to build it. But we are on the safe
side since it seems no one from outside Intel is using it for now.While here, move to use macros module_pci_driver() and
module_platform_driver().Signed-off-by: Andy Shevchenko
Reviewed-by: Mika Westerberg
Acked-by: Alan Cox
[thierry.reding: change select to depends on PWM_LPSS, cleanup]
Signed-off-by: Thierry Reding
22 Aug, 2014
1 commit
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This is pretty much the same as Baytrail PWM. Only difference is that the
input clock runs on different frequency.Signed-off-by: Alan Cox
Signed-off-by: Mika Westerberg
Signed-off-by: Thierry Reding