24 Sep, 2016
2 commits
-
Instead of comparing the name to a magic string, use archdata to
explicitly communicate whether the arch timer is suitable for
direct vdso access.Acked-by: Will Deacon
Acked-by: Russell King
Acked-by: Marc Zyngier
Signed-off-by: Scott Wood
Signed-off-by: Will Deacon -
Erratum A-008585 says that the ARM generic timer counter "has the
potential to contain an erroneous value for a small number of core
clock cycles every time the timer value changes". Accesses to TVAL
(both read and write) are also affected due to the implicit counter
read. Accesses to CVAL are not affected.The workaround is to reread TVAL and count registers until successive
reads return the same value. Writes to TVAL are replaced with an
equivalent write to CVAL.The workaround is to reread TVAL and count registers until successive reads
return the same value, and when writing TVAL to retry until counter
reads before and after the write return the same value.The workaround is enabled if the fsl,erratum-a008585 property is found in
the timer node in the device tree. This can be overridden with the
clocksource.arm_arch_timer.fsl-a008585 boot parameter, which allows KVM
users to enable the workaround until a mechanism is implemented to
automatically communicate this information.This erratum can be found on LS1043A and LS2080A.
Acked-by: Marc Zyngier
Signed-off-by: Scott Wood
[will: renamed read macro to reflect that it's not usually unstable]
Signed-off-by: Will Deacon
01 Aug, 2016
1 commit
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The ARM architected timer produces level-triggered interrupts (this
is mandated by the architecture). Unfortunately, a number of
device-trees get this wrong, and expose an edge-triggered interrupt.Until now, this wasn't too much an issue, as the programming of the
trigger would fail (the corresponding PPI cannot be reconfigured),
and the kernel would be happy with this. But we're about to change
this, and trust DT a lot if the driver doesn't provide its own
trigger information. In that context, the timer breaks badly.While we do need to fix the DTs, there is also some userspace out
there (kvmtool) that generates the same kind of broken DT on the
fly, and that will completely break with newer kernels.As a safety measure, and to keep buggy software alive as well as
buying us some time to fix DTs all over the place, let's check
what trigger configuration has been given us by the firmware.
If this is not a level configuration, then we know that the
DT/ACPI configuration is bust, and we pick some defaults which
won't be worse than the existing setup.Signed-off-by: Marc Zyngier
Cc: Andrew Lunn
Cc: Liu Gang
Cc: Mark Rutland
Cc: Masahiro Yamada
Cc: Wenbin Song
Cc: Mingkai Hu
Cc: Florian Fainelli
Cc: Kevin Hilman
Cc: Daniel Lezcano
Cc: Michal Simek
Cc: Jon Hunter
Cc: arm@kernel.org
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: Sebastian Hesselbarth
Cc: Jason Cooper
Cc: Ray Jui
Cc: "Hou Zhiqiang"
Cc: Tirumalesh Chalamarla
Cc: linux-samsung-soc@vger.kernel.org
Cc: Yuan Yao
Cc: Jan Glauber
Cc: Gregory Clement
Cc: linux-amlogic@lists.infradead.org
Cc: soren.brinkmann@xilinx.com
Cc: Rajesh Bhagat
Cc: Scott Branden
Cc: Duc Dang
Cc: Kukjin Kim
Cc: Carlo Caione
Cc: Dinh Nguyen
Link: http://lkml.kernel.org/r/1470045256-9032-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner
15 Jul, 2016
1 commit
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Install the callbacks via the state machine and let the core invoke
the callbacks on the already online CPUs.Signed-off-by: Richard Cochran
Signed-off-by: Anna-Maria Gleixner
Reviewed-by: Sebastian Andrzej Siewior
Cc: Daniel Lezcano
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: rt@linutronix.de
Link: http://lkml.kernel.org/r/20160713153336.048259040@linutronix.de
Signed-off-by: Ingo Molnar
28 Jun, 2016
3 commits
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Disabling the eventstream can be useful for both remotely debugging a
deployed production system and development of code using WFE-based
polling loops. Whilst this can currently be controlled via a Kconfig
option (CONFIG_ARM_ARCH_TIMER_EVTSTREAM), it's often desirable to toggle
the feature on the command line, so this patch adds a new command-line
option ("clocksource.arm_arch_timer.evtstrm") to do just that. The
default behaviour is determined based on CONFIG_ARM_ARCH_TIMER_EVTSTREAM.Cc: Marc Zyngier
Cc: Mark Rutland
Signed-off-by: Will Deacon
Signed-off-by: Daniel Lezcano -
All the clocksource drivers's init function are now converted to return
an error code. CLOCKSOURCE_OF_DECLARE is no longer used as well as the
clksrc-of table.Let's convert back the names:
- CLOCKSOURCE_OF_DECLARE_RET => CLOCKSOURCE_OF_DECLARE
- clksrc-of-ret => clksrc-ofSigned-off-by: Daniel Lezcano
For exynos_mct and samsung_pwm_timer:
Acked-by: Krzysztof KozlowskiFor arch/arc:
Acked-by: Vineet GuptaFor mediatek driver:
Acked-by: Matthias BruggerFor the Rockchip-part
Acked-by: Heiko StuebnerFor STi :
Acked-by: Patrice ChotardFor the mps2-timer.c and versatile.c changes:
Acked-by: Liviu DudauFor the OXNAS part :
Acked-by: Neil ArmstrongFor LPC32xx driver:
Acked-by: Sylvain LemieuxFor Broadcom Kona timer change:
Acked-by: Ray JuiFor Sun4i and Sun5i:
Acked-by: Chen-Yu TsaiFor Meson6:
Acked-by: Carlo CaioneFor Keystone:
Acked-by: Santosh ShilimkarFor NPS:
Acked-by: Noam CamusFor bcm2835:
Acked-by: Eric Anholt -
The init functions do not return any error. They behave as the following:
- panic, thus leading to a kernel crash while another timer may work and
make the system boot up correctlyor
- print an error and let the caller unaware if the state of the system
Change that by converting the init functions to return an error conforming
to the CLOCKSOURCE_OF_RET prototype.Proper error handling (rollback, errno value) will be changed later case
by case, thus this change just return back an error or success in the init
function.Signed-off-by: Daniel Lezcano
03 May, 2016
3 commits
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The only call of arch_timer_get_timecounter (in KVM) has been removed.
Signed-off-by: Julien Grall
Acked-by: Christoffer Dall
Signed-off-by: Christoffer Dall -
Currently, the firmware table is parsed by the virtual timer code in
order to retrieve the virtual timer interrupt. However, this is already
done by the arch timer driver.To avoid code duplication, extend arch_timer_kvm_info to get the virtual
IRQ.Note that the KVM code will be modified in a subsequent patch.
Signed-off-by: Julien Grall
Acked-by: Christoffer Dall
Signed-off-by: Christoffer Dall -
Introduce a structure which are filled up by the arch timer driver and
used by the virtual timer in KVM.The first member of this structure will be the timecounter. More members
will be added later.A stub for the new helper isn't introduced because KVM requires the arch
timer for both ARM64 and ARM32.The function arch_timer_get_timecounter is kept for the time being and
will be dropped in a subsequent patch.Signed-off-by: Julien Grall
Acked-by: Christoffer Dall
Signed-off-by: Christoffer Dall
17 Mar, 2016
1 commit
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Pull KVM updates from Paolo Bonzini:
"One of the largest releases for KVM... Hardly any generic
changes, but lots of architecture-specific updates.ARM:
- VHE support so that we can run the kernel at EL2 on ARMv8.1 systems
- PMU support for guests
- 32bit world switch rewritten in C
- various optimizations to the vgic save/restore code.PPC:
- enabled KVM-VFIO integration ("VFIO device")
- optimizations to speed up IPIs between vcpus
- in-kernel handling of IOMMU hypercalls
- support for dynamic DMA windows (DDW).s390:
- provide the floating point registers via sync regs;
- separated instruction vs. data accesses
- dirty log improvements for huge guests
- bugfixes and documentation improvements.x86:
- Hyper-V VMBus hypercall userspace exit
- alternative implementation of lowest-priority interrupts using
vector hashing (for better VT-d posted interrupt support)
- fixed guest debugging with nested virtualizations
- improved interrupt tracking in the in-kernel IOAPIC
- generic infrastructure for tracking writes to guest
memory - currently its only use is to speedup the legacy shadow
paging (pre-EPT) case, but in the future it will be used for
virtual GPUs as well
- much cleanup (LAPIC, kvmclock, MMU, PIT), including ubsan fixes"* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (217 commits)
KVM: x86: remove eager_fpu field of struct kvm_vcpu_arch
KVM: x86: disable MPX if host did not enable MPX XSAVE features
arm64: KVM: vgic-v3: Only wipe LRs on vcpu exit
arm64: KVM: vgic-v3: Reset LRs at boot time
arm64: KVM: vgic-v3: Do not save an LR known to be empty
arm64: KVM: vgic-v3: Save maintenance interrupt state only if required
arm64: KVM: vgic-v3: Avoid accessing ICH registers
KVM: arm/arm64: vgic-v2: Make GICD_SGIR quicker to hit
KVM: arm/arm64: vgic-v2: Only wipe LRs on vcpu exit
KVM: arm/arm64: vgic-v2: Reset LRs at boot time
KVM: arm/arm64: vgic-v2: Do not save an LR known to be empty
KVM: arm/arm64: vgic-v2: Move GICH_ELRSR saving to its own function
KVM: arm/arm64: vgic-v2: Save maintenance interrupt state only if required
KVM: arm/arm64: vgic-v2: Avoid accessing GICH registers
KVM: s390: allocate only one DMA page per VM
KVM: s390: enable STFLE interpretation only if enabled for the guest
KVM: s390: wake up when the VCPU cpu timer expires
KVM: s390: step the VCPU timer while in enabled wait
KVM: s390: protect VCPU cpu timer with a seqcount
KVM: s390: step VCPU cpu timer during kvm_run ioctl
...
01 Mar, 2016
1 commit
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With the ARMv8.1 VHE, the kernel can run in HYP mode, and thus
use the HYP timer instead of the normal guest timer in a mostly
transparent way, except for the interrupt line.This patch reworks the arch timer code to allow the selection of
the HYP PPI, possibly falling back to the guest timer if not
available.Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
25 Feb, 2016
2 commits
-
set_state_oneshot_stopped() is called by the clkevt core, when the next
event is required at an expiry time of 'KTIME_MAX'. This normally
happens with NO_HZ_{IDLE|FULL} in both LOWRES/HIGHRES modes.This patch makes the clockevent device to stop on such an event, to
avoid spurious interrupts, as explained by: commit 8fff52fd5093
("clockevents: Introduce CLOCK_EVT_STATE_ONESHOT_STOPPED state").Signed-off-by: Viresh Kumar
Signed-off-by: Daniel Lezcano -
So far, we have been blindly assuming that having access to a
memory-mapped timer frame implies that the individual elements of that
frame frame are already enabled. Whilst it's the firmware's job to give
us non-secure access to frames in the first place, we should not rely
on implementations always being generous enough to also configure CNTACR
for those non-secure frames (e.g. [1]).Explicitly enable feature-level access per-frame, and verify that the
access we want is really implemented before trying to make use of it.[1]:https://github.com/ARM-software/tf-issues/issues/170
Acked-by: Mark Rutland
Reviewed-by: Stephen Boyd
Tested-by: Stephen Boyd
Acked-by: Marc Zyngier
Signed-off-by: Robin Murphy
Signed-off-by: Daniel Lezcano
01 Oct, 2015
1 commit
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It is now absolutely trivial to convert the arch timer driver to
use ACPI probing, just like its DT counterpart.Let's enjoy another crapectomy.
Signed-off-by: Marc Zyngier
Acked-by: Catalin Marinas
Acked-by: Thomas Gleixner
Tested-by: Hanjun Guo
Signed-off-by: Rafael J. Wysocki
06 Aug, 2015
1 commit
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Migrate arm_arch_timer driver to the new 'set-state' interface provided
by the clockevents core, the earlier 'set-mode' interface is marked
obsolete now.This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.Cc: Marc Zyngier
Signed-off-by: Viresh Kumar
Signed-off-by: Daniel Lezcano
24 Apr, 2015
1 commit
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Pull initial ACPI support for arm64 from Will Deacon:
"This series introduces preliminary ACPI 5.1 support to the arm64
kernel using the "hardware reduced" profile. We don't support any
peripherals yet, so it's fairly limited in scope:- MEMORY init (UEFI)
- ACPI discovery (RSDP via UEFI)
- CPU init (FADT)
- GIC init (MADT)
- SMP boot (MADT + PSCI)
- ACPI Kconfig options (dependent on EXPERT)
ACPI for arm64 has been in development for a while now and hardware
has been available that can boot with either FDT or ACPI tables. This
has been made possible by both changes to the ACPI spec to cater for
ARM-based machines (known as "hardware-reduced" in ACPI parlance) but
also a Linaro-driven effort to get this supported on top of the Linux
kernel. This pull request is the result of that work.These changes allow us to initialise the CPUs, interrupt controller,
and timers via ACPI tables, with memory information and cmdline coming
from EFI. We don't support a hybrid ACPI/FDT scheme. Of course,
there is still plenty of work to do (a serial console would be nice!)
but I expect that to happen on a per-driver basis after this core
series has been merged.Anyway, the diff stat here is fairly horrible, but splitting this up
and merging it via all the different subsystems would have been
extremely painful. Instead, we've got all the relevant Acks in place
and I've not seen anything other than trivial (Kconfig) conflicts in
-next (for completeness, I've included my resolution below). Nearly
half of the insertions fall under Documentation/.So, we'll see how this goes. Right now, it all depends on EXPERT and
I fully expect people to use FDT by default for the immediate future"* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (31 commits)
ARM64 / ACPI: make acpi_map_gic_cpu_interface() as void function
ARM64 / ACPI: Ignore the return error value of acpi_map_gic_cpu_interface()
ARM64 / ACPI: fix usage of acpi_map_gic_cpu_interface
ARM64: kernel: acpi: honour acpi=force command line parameter
ARM64: kernel: acpi: refactor ACPI tables init and checks
ARM64: kernel: psci: let ACPI probe PSCI version
ARM64: kernel: psci: factor out probe function
ACPI: move arm64 GSI IRQ model to generic GSI IRQ layer
ARM64 / ACPI: Don't unflatten device tree if acpi=force is passed
ARM64 / ACPI: additions of ACPI documentation for arm64
Documentation: ACPI for ARM64
ARM64 / ACPI: Enable ARM64 in Kconfig
XEN / ACPI: Make XEN ACPI depend on X86
ARM64 / ACPI: Select ACPI_REDUCED_HARDWARE_ONLY if ACPI is enabled on ARM64
clocksource / arch_timer: Parse GTDT to initialize arch timer
irqchip: Add GICv2 specific ACPI boot support
ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and register device's gsi
ACPI / processor: Make it possible to get CPU hardware ID via GICC
ACPI / processor: Introduce phys_cpuid_t for CPU hardware ID
ARM64 / ACPI: Parse MADT for SMP initialization
...
31 Mar, 2015
1 commit
-
…needs_probing()' to reflect behaviour
The arch_timer_probed() function returns whether the given time
doesn't need to be probed. This can be the case when the timer
has been probed already, but also when it has no corresponding
enabled node in DT.Rename the function to arch_timer_needs_probing() and invert its
return value to better reflect the function's purpose and
behaviour.Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1427796746-373-1-git-send-email-daniel.lezcano@linaro.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
26 Mar, 2015
1 commit
-
Using the information presented by GTDT (Generic Timer Description Table)
to initialize the arch timer (not memory-mapped).CC: Daniel Lezcano
CC: Thomas Gleixner
Originally-by: Amit Daniel Kachhap
Tested-by: Suravee Suthikulpanit
Tested-by: Yijing Wang
Tested-by: Mark Langsdorf
Tested-by: Jon Masters
Tested-by: Timur Tabi
Tested-by: Robert Richter
Acked-by: Robert Richter
Acked-by: Daniel Lezcano
Reviewed-by: Grant Likely
Signed-off-by: Hanjun Guo
Signed-off-by: Will Deacon
07 Jan, 2015
2 commits
-
This driver makes use of the clocksource code. Previously it had only
included the proper header indirectly, but that chain was inadvertently
broken by 74d23cc "time: move the timecounter/cyclecounter code into its
own file."This patch fixes the issue by including clocksource.h directly.
Signed-off-by: Richard Cochran
Signed-off-by: David S. Miller
17 Dec, 2014
1 commit
-
Commit 0b46b8a718c6 (clocksource: arch_timer: Fix code to use physical
timers when requested) introduces the use of physical counters in the
ARM architected timer driver. However, he arm64 kernel uses CNTVCT in
VDSO. When booting in EL2, the kernel switches to the physical timers to
make things easier for KVM but it continues to use the virtual counter
both in user and kernel. While in such scenario CNTVCT == CNTPCT (since
CNTVOFF is initialised by the kernel to 0), we want to spot firmware
bugs corrupting CNTVOFF early (which would affect CNTVCT).Signed-off-by: Catalin Marinas
Tested-by: Yingjoe Chen
Cc: Daniel Lezcano
Signed-off-by: Arnd Bergmann
05 Dec, 2014
3 commits
-
* clocksource/physical-timers:
clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
clocksource: arch_timer: Fix code to use physical timers when requested -
Some 32-bit (ARMv7) systems are architected like this:
* The firmware doesn't know and doesn't care about hypervisor mode and
we don't want to add the complexity of hypervisor there.* The firmware isn't involved in SMP bringup or resume.
* The ARCH timer come up with an uninitialized offset (CNTVOFF)
between the virtual and physical counters. Each core gets a
different random offset.* The device boots in "Secure SVC" mode.
* Nothing has touched the reset value of CNTHCTL.PL1PCEN or
CNTHCTL.PL1PCTEN (both default to 1 at reset)On systems like the above, it doesn't make sense to use the virtual
counter. There's nobody managing the offset and each time a core goes
down and comes back up it will get reinitialized to some other random
value.This adds an optional property which can inform the kernel of this
situation, and firmware is free to remove the property if it is going
to initialize the CNTVOFF registers when each CPU comes out of reset.Currently, the best course of action in this case is to use the
physical timer, which is why it is important that CNTHCTL hasn't been
changed from its reset value and it's a reasonable assumption given
that the firmware has never entered HYP mode.Note that it's been said that on ARMv8 systems the firmware and
kernel really can't be architected as described above. That means
using the physical timer like this really only makes sense for ARMv7
systems.Signed-off-by: Doug Anderson
Signed-off-by: Sonny Rao
Reviewed-by: Mark Rutland
Acked-by: Daniel Lezcano
Acked-by: Catalin Marinas
Signed-off-by: Olof Johansson -
This is a bug fix for using physical arch timers when
the arch_timer_use_virtual boolean is false. It restores the
arch_counter_get_cntpct() function after removal in0d651e4e "clocksource: arch_timer: use virtual counters"
We need this on certain ARMv7 systems which are architected like this:
* The firmware doesn't know and doesn't care about hypervisor mode and
we don't want to add the complexity of hypervisor there.* The firmware isn't involved in SMP bringup or resume.
* The ARCH timer come up with an uninitialized offset between the
virtual and physical counters. Each core gets a different random
offset.* The device boots in "Secure SVC" mode.
* Nothing has touched the reset value of CNTHCTL.PL1PCEN or
CNTHCTL.PL1PCTEN (both default to 1 at reset)One example of such as system is RK3288 where it is much simpler to
use the physical counter since there's nobody managing the offset and
each time a core goes down and comes back up it will get reinitialized
to some other random value.Fixes: 0d651e4e65e9 ("clocksource: arch_timer: use virtual counters")
Cc: stable@vger.kernel.org
Signed-off-by: Sonny Rao
Acked-by: Catalin Marinas
Acked-by: Daniel Lezcano
Signed-off-by: Olof Johansson
27 Oct, 2014
1 commit
-
Commit c387f07e6205 (clocksource: arm_arch_timer: Discard unavailable
timers correctly) changed the way the driver makes sure both the memory
and system-register timers have been probed before finalizing the probing.There is a interesting flaw in this logic that leads to this final step
never to be executed. Things seems to work pretty well until something
actually needs the data that is produced during this final stage.For example, KVM explodes on the first run of a guest when executed on
a platform that has both memory and sysreg nodes (Juno, for example).Just fix the damned logic, and enjoy booting VMs again.
Tested on a Juno system.
Cc: Sudeep Holla
Cc: Stephen Boyd
Cc: Mark Rutland
Cc: Daniel Lezcano
Cc: Christoffer Dall
Reported-by: Riku Voipio
Acked-by: Mark Rutland
Acked-by: Sudeep Holla
Tested-by: Sudeep Holla
Signed-off-by: Marc Zyngier
Signed-off-by: Daniel Lezcano
29 Sep, 2014
4 commits
-
The arch_timer_evtstrm_enable hooks in arm and arm64 are substantially
similar, the only difference being a CONFIG_COMPAT-conditional section
which is relevant only for arm64. Copy the arm64 version to the
driver, removing the arch-specific hooks.Signed-off-by: Nathan Lynch
Signed-off-by: Daniel Lezcano
Acked-by: Will Deacon -
The only difference between arm and arm64's implementations of
arch_counter_set_user_access is that 32-bit ARM does not enable user
access to the virtual counter. We want to enable this access for the
32-bit ARM VDSO, so copy the arm64 version to the driver itself, and
remove the arch-specific implementations.Signed-off-by: Nathan Lynch
Signed-off-by: Daniel Lezcano
Acked-by: Will Deacon -
The arm and arm64 VDSOs need CP15 access to the architected counter.
If this is unavailable (which is allowed by ARM v7), indicate this by
changing the clocksource name to "arch_mem_counter" before registering
the clocksource.Suggested by Stephen Boyd.
Signed-off-by: Nathan Lynch
Reviewed-by: Stephen Boyd
Signed-off-by: Daniel Lezcano
Acked-by: Will Deacon -
Currently we wait until both cp15 and mem timers are probed if we
have both timer device nodes present in the device tree without
checking if the device is actually available. If one of the timer
device node present is disabled, the system locks up on the boot
as no timer gets registered.This patch adds the check for the availability of the timer device
so that unavailable timers are discarded correctly. It also adds
the missing of_node_put.Signed-off-by: Sudeep Holla
Reviewed-by: Stephen Boyd
Acked-by: Mark Rutland
Signed-off-by: Daniel Lezcano
29 Apr, 2014
1 commit
-
ARM arch timers are tightly coupled with the CPU logic and lose context
on platform implementing HW power management when cores are powered
down at run-time. Marking the arch timers as C3STOP regardless of power
management capabilities causes issues on platforms with no power management,
since in that case the arch timers cannot possibly enter states where the
timer loses context at runtime and therefore can always be used as a high
resolution clockevent device.In order to fix the C3STOP issue in a way compliant with how real HW
works, this patch adds a boolean property to the arch timer bindings
to define if the arch timer is managed by an always-on power domain.This power domain is present on all ARM platforms to date, and manages
HW that must not be turned off, whatever the state of other HW
components (eg power controller). On platforms with no power management
capabilities, it is the only power domain present, which encompasses
and manages power supply for all HW components in the system.If the timer is powered by the always-on power domain, the always-on
property must be present in the bindings which means that the timer cannot
be shutdown at runtime, so it is not a C3STOP clockevent device.
If the timer binding does not contain the always-on property, the timer is
assumed to be power-gateable, hence it must be defined as a C3STOP
clockevent device.Cc: Daniel Lezcano
Cc: Magnus Damm
Cc: Marc Carino
Cc: Mark Rutland
Acked-by: Marc Zyngier
Acked-by: Rob Herring
Signed-off-by: Lorenzo Pieralisi
Signed-off-by: Daniel Lezcano
12 Mar, 2014
1 commit
-
Set the CLOCK_EVT_FEAT_DYNIRQ flag on the memory mapped
clockevent so that we save power by waking up the CPU with the
next event when this timer is used in broadcast mode.Signed-off-by: Stephen Boyd
Signed-off-by: Daniel Lezcano
16 Oct, 2013
1 commit
-
Commit:
65cd4f6 ("arch_timer: Move to generic sched_clock framework")
added code to register the arch_sys_counter in arch_timer_register(),
but it is already registered in arch_counter_register().This results in the timer being added to the clocksource list twice,
therefore causing an infinite loop in the list.Remove the duplicate registration and register the scheduler
clock after the original registration instead.This fixes a hang during boot on Tegra114 (Cortex-A15).
[ While I've only tested this on Tegra114, I suspect the same hang
during boot happens for all processors that use this clock source. ]Signed-off-by: Thierry Reding
Acked-by: John Stultz
Cc: Stephen Boyd
Cc: Will Deacon
Cc: Stephen Warren
Cc: linux-arm-kernel@lists.infradead.org
Cc: Daniel Lezcano
Link: http://lkml.kernel.org/r/1381843911-31962-1-git-send-email-treding@nvidia.com
Signed-off-by: Ingo Molnar
10 Oct, 2013
2 commits
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Pull more timekeeping items for v3.13 from John Stultz:
* Small cleanup in the clocksource code.
* Fix for rtc-pl031 to let it work with alarmtimers.
* Move arm64 to using the generic sched_clock framework & resulting
cleanup in the generic sched_clock code.Signed-off-by: Ingo Molnar
-
Register with the generic sched_clock framework now that it
supports 64 bits. This fixes two problems with the current
sched_clock support for machines using the architected timers.
First off, we don't subtract the start value from subsequent
sched_clock calls so we can potentially start off with
sched_clock returning gigantic numbers. Second, there is no
support for suspend/resume handling so problems such as discussed
in 6a4dae5 (ARM: 7565/1: sched: stop sched_clock() during
suspend, 2012-10-23) can happen without this patch. Finally, it
allows us to move the sched_clock setup into drivers clocksource
out of the arch ports.Cc: Christopher Covington
Cc: Catalin Marinas
Acked-by: Will Deacon
Signed-off-by: Stephen Boyd
Signed-off-by: John Stultz
03 Oct, 2013
1 commit
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Adds support to configure the rate and enable the event stream for architected
timer. The event streams can be used to impose a timeout on a wfe, to safeguard
against any programming error in case an expected event is not generated or
even to implement wfe-based timeouts for userspace locking implementations.
This feature can be disabled(enabled by default).Since the timer control register is reset to zero on warm boot, CPU PM notifier
is added to save and restore the value.Signed-off-by: Daniel Lezcano
02 Oct, 2013
1 commit
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The ARM architected timers keep counting during suspend so we can
mark this clocksource with the CLOCK_SOURCE_SUSPEND_NONSTOP flag.
This flag will indicate that this clocksource can be used for
calculating suspend time and injecting sleep time into the
timekeeping core. This should be more accurate than using an
external RTC or architecture specific persistent clock.Cc: Mark Rutland
Signed-off-by: Stephen Boyd
Signed-off-by: Daniel Lezcano
26 Sep, 2013
2 commits
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Few control settings done in architected timer as part of initialisation
can be lost when CPU enters deeper power states. They need to be
restored when the CPU is (warm)reset again.This patch adds CPU PM notifiers to save the counter control register
when entering low power modes and restore it when CPU exits low power.Reviewed-by: Catalin Marinas
Reviewed-by: Lorenzo Pieralisi
Reviewed-by: Will Deacon
Acked-by: Olof Johansson
Signed-off-by: Sudeep KarkadaNagesha -
The ARM architected timer can generate events (used for waking up
CPUs executing the wfe instruction) at a frequency represented as a
power-of-2 divisor of the clock rate.An event stream might be used:
- To implement wfe-based timeouts for userspace locking implementations.
- To impose a timeout on a wfe for safeguarding against any programming
error in case an expected event is not generated.This patch computes the event stream frequency aiming for a period
of 100us between events. It uses ARM/ARM64 specific backends to configure
and enable the event stream.Cc: Lorenzo Pieralisi
Reviewed-by: Catalin Marinas
Acked-by: Olof Johansson
Signed-off-by: Will Deacon
[sudeep: moving ARM/ARM64 changes into separate patches
and adding Kconfig option]
Signed-off-by: Sudeep KarkadaNagesha
21 Aug, 2013
1 commit
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…lockevents into timers/core
* Support for memory mapped arch_timers
* Trivial fixes to the moxart timer code
* Documentation updatesTrivial conflicts in drivers/clocksource/arm_arch_timer.c. Fixed up
the newly added __cpuinit annotations as well.Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
