07 Sep, 2017

4 commits


31 Aug, 2017

2 commits


30 Aug, 2017

2 commits

  • g2d code has different parameter setting about stride parameter.
    For compatibility with all cases of using PxP, we need add this
    improved feature.

    Signed-off-by: Guoniu.Zhou
    Reviewed-by: Robby Cai
    Reviewed-by: Fancy Fang

    Guoniu.Zhou
     
  • If pxp use crop x/y valuse as the upper left coordinate in
    out buffer, pxp driver only need to write out buffer base
    address to pxp out_buf register. If pxp driver use zero as
    ps_ulc register value, pxp out_buf register need an offset
    added with out buffer base address.

    Signed-off-by: Guoniu.Zhou
    Reviewed-by: Robby Cai
    Reviewed-by: Fancy Fang

    Guoniu.Zhou
     

18 Aug, 2017

1 commit


25 Jul, 2017

1 commit

  • When do epdc colormap test, the epdc need pxp lut function. But
    if the data flow through mux0->mux1...or mux0->mux2..., the pxp
    can not trigger interrupt but mux0->mux3... can. This issue only
    occures on imx7d, so I set a constant data path when using lut function.

    Signed-off-by: Guoniu.Zhou
    (cherry picked from commit 8c8fc765c34f2e6fe31646a5f216f30e3391f2e6)

    Guoniu.Zhou
     

14 Jul, 2017

1 commit


12 Jul, 2017

2 commits


05 Jul, 2017

1 commit

  • This patch fixes build warning that 2 variables may be used uninitialized
    in the pxp_fetch_config() function in drivers/dma/pxp/pxp_dma_v3.c .

    The variables in_fmt and out_fmt are passed as parameters to
    pxp_fetch_shift_calc() only if shift_bypass is false. This flag cannot be
    false unless changed in a code block that also assigns in_fmt and out_fmt.

    Since the compiler cannot detect this flow, it shows a warning that in_fmt
    and out_fmt are not initialized. Fix this by changing the code flow such
    that in_fmt and out_fmt are sent as parameters in the same code block where
    they are assigned.

    Signed-off-by: Cristina Ciocan
    (cherry picked from commit e710b061ef292402045b30ccb56bcdcd343d43c5)

    Cristina Ciocan
     

30 Jun, 2017

1 commit

  • It is possible for an irq triggered by channel0 to be received later,
    after clks are disabled. If that happens then clearing them by writing
    to SDMA_H_INTR won't work and the system will hang processing infinite
    interrupts. Actually, don't need interrupt triggered on channel0 since
    it's pollling to know channel0 done rather than interrupt in current
    code, just clear BD setting to disable channel0 interrupt to avoid the
    above case.

    Reported-by: Leonard Crestez
    Signed-off-by: Robin Gong
    (cherry picked from commit ed3bbe18323565b0c07f836fbf53401ffa887bf2)

    Robin Gong
     

19 Jun, 2017

1 commit


09 Jun, 2017

24 commits