09 Jan, 2017
1 commit
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commit a0ebf519b8a2666438d999c62995618c710573e5 upstream.
Make sure to drop the reference taken by class_find_device() also on
allocation errors in open().Signed-off-by: Johan Hovold
Fixes: 7bd1d4093c2f ("stm class: Introduce an abstraction for...")
Signed-off-by: Alexander Shishkin
Signed-off-by: Greg Kroah-Hartman
09 Sep, 2016
2 commits
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We get a few warnings when building kernel with W=1:
drivers/hwtracing/coresight/coresight-tmc-etr.c:23:6: warning: no previous prototype for 'tmc_etr_enable_hw' [-Wmissing-prototypes]
drivers/hwtracing/coresight/coresight-tmc-etf.c:25:6: warning: no previous prototype for 'tmc_etb_enable_hw' [-Wmissing-prototypes]
drivers/hwtracing/coresight/coresight-tmc.c:250:9: warning: no previous prototype for ‘trigger_cntr_show’ [-Wmissing-prototypes]
...In fact, these functions are only used in the file in which they are
declared and don't need a declaration, but can be made static.
so this patch marks these functions with 'static'.Signed-off-by: Baoyou Xie
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
Function coresight_build_path() should return -ENOMEM when kzalloc
fails to allocated the requested memory. That way callers can deal
with the error condition in a similar way.Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman
31 Aug, 2016
28 commits
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With this patch we add start/stop filtering as specified on
the perf cmd line. When the IP matches the start address
trace generation gets triggered. The stop condition is
achieved when the IP matches the stop address.Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
This patch adds the capability to specify address ranges from
the perf cmd line using the --filter option. If the IP
falls within the range(s) program flow traces are generated.Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
The include/exclude function of a tracer is applicable to address
range and start/stop filters. To avoid duplication and reuse code
moving the include/exclude configuration to a function of its own.Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
Introducing a new function to do address range configuration
generic enough to work for any address range and any comparator.Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
The default filter configuration was hard to read and included
some redundancy. This patch attempts to stream line configuration
and improve readability.No change of functionality is included.
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
Splitting the steps involved in the configuration of a tracer.
The first part is generic and can be reused for both sysFS and
Perf methods.The second part pertains to the configuration of filters
themselves where the source of the information used to
configure the filters will vary depending on the access
methods.Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
This patch implements the required API needed to access
and retrieve range and start/stop filters from the perf core.Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
Both ETMv3 and ETMv4 drivers are declaring an 'enum etm_addr_type',
creating reduncancy.This patch removes the enumeration from the driver files and adds
it to a common header.Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
With this commit [1] address range filter information is now found
in the struct hw_perf_event::addr_filters. As such pass the event
itself to the coresight_source::enable/disable() functions so that
both event attribute and filter can be accessible for configuration.[1] 'commit 375637bc5249 ("perf/core: Introduce address range filtering")'
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
The ETM registers are classified into 2 categories: trace and management.
The core power domain contains most of the trace unit logic including
all(except TRCOSLAR and TRCOSLSR) the trace registers. The debug power
domain contains the external debugger interface including all management
registers.This patch adds coresight unit specific function coresight_simple_func
which can be used for ETM trace registers by providing a ETM specific
read function which does smp cross call to ensure the trace core is
powered up before the register is accessed.Cc: Mathieu Poirier
Signed-off-by: Sudeep Holla
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
The Coresight ETMv4 architecture provides a way to request to keep the
power to the trace unit. This might help to collect the traces without
the need to disable the CPU power management(entering/exiting deeper
idle states).Trace PowerDown Control Register provides powerup request bit which when
set requests the system to retain power to the trace unit and emulate
the powerdown request.Typically, a trace unit drives a signal to the power controller to
request that the trace unit core power domain is powered up. However,
if the trace unit and the CPU are in the same power domain then the
implementation might combine the trace unit power up status with a
signal from the CPU.This patch requests to retain power to the trace unit when active and
to remove when inactive. Note this change will only request but the
behaviour depends on the implementation. However, it matches the
exact behaviour expected when the external debugger is connected with
respect to CPU power states.Cc: Mathieu Poirier
Signed-off-by: Sudeep Holla
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
The kfree() function tests whether its argument is NULL and then
returns immediately. Thus the test around the call is not needed.This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
Remove duplicated include.
Signed-off-by: Wei Yongjun
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
Each coresight device prepares a description for coresight_register()
in struct coresight_desc. Once we register the device, the description is
useless and can be freed. The coresight_desc is small enough (48bytes on
64bit)i to be allocated on the stack. Hence use an automatic variable to
avoid a needless dynamic allocation and wasting the memory(which will only
be free'd when the device is destroyed).Cc: Mathieu Poirier
Cc: Pratik Patel
Signed-off-by: Suzuki K Poulose
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
of_node_put needs to be called when the device node which is got
from of_parse_phandle has finished using.Cc: linux-arm-kernel@lists.infradead.org
Cc: Mathieu Poirier
Signed-off-by: Peter Chen
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
Signed-off-by: Olivier Schonken
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
It is mandatory to enable a coresight block's power domain before
trying to access management registers. Otherwise the transaction
simply stalls, leading to a system hang.Signed-off-by: Mathieu Poirier
Reviewed-by: Sudeep Holla
Signed-off-by: Greg Kroah-Hartman -
Depending on when CoreSight device are discovered it is possible
that some IP block may be referencing devices that have not been
added to the bus yet. The end result is missing nodes in the
CoreSight topology even when the devices are present and properly
initialised.This patch solves the problem by asking the driver core to
try initialising the device at a later time when the children
of a CoreSight node are missing.Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
When we encounter a timeout waiting for a status change via
coresight_timeout, the caller always print the offset which
was tried. This is pretty much useless as it doesn't specify
the bit position we wait for. Also, one needs to lookup the
TRM to figure out, what was wrong. This patch changes all
such error messages to print something more meaningful.Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
Use the defined symbol rather than hardcoding the value to
check whether the TMC buffer is full.Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
This patch cleans up the peripheral id table for different ETMv4
implementations.As per Cortex-A53 TRM, the ETM has following id values:
Peripheral ID0 0x5D 0xFE0
Peripheral ID1 0xB9 0xFE4
Peripheral ID2 0x4B 0xFE8
Peripheral ID3 0x00 0xFECwhere, PID2: has the following format:
[7:4] Revision
[3] JEDEC 0b1 res1. Indicates a JEP106 identity code is used
[2:0] DES_1 0b011 ARM Limited. This is bits[6:4] of JEP106 ID codeThe existing table entry checks only the bits [1:0], which is not
sufficient enough. Fix it to match bits [3:0], just like the other
entries do. While at it, correct the comment for A57 and the A53 entry.Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
At present the ETF or ETR gives out the entire device
buffer, even if there is less or even no trace data
available. This patch limits the trace data given out to
the actual trace data collected.Cc: mathieu.poirier@linaro.org
Signed-off-by: Suzuki K Poulose
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
This is a cleanup patch.
coresight_device->conns holds an array to point to the devices
connected to the OUT ports of a component. Sinks, e.g ETR, do not
have an OUT port (nr_outport = 0), as it streams the trace to
memory via AXI.At coresight_register() we do :
conns = kcalloc(csdev->nr_outport, sizeof(*conns), GFP_KERNEL);
if (!conns) {
ret = -ENOMEM;
goto err_kzalloc_conns;
}For ETR, since the total size requested for kcalloc is zero, the return
value is, ZERO_SIZE_PTR ( != NULL). Hence, csdev->conns = ZERO_SIZE_PTR
which cannot be verified later to contain a valid pointer. The code which
accesses the csdev->conns is bounded by the csdev->nr_outport check,
hence we don't try to dereference the ZERO_SIZE_PTR. This patch cleans
up the csdev->conns initialisation to make sure we initialise it
properly(i.e, either NULL or valid conns array).Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
This patch cleans up the error handling path for tmc_probe
as a side effect of the removal of the spurious dma_free_coherent().Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
commit de5461970b3e9e194 ("coresight: tmc: allocating memory when needed")
removed the static allocation of buffer for the trace data in ETR mode in
tmc_probe. However it failed to remove the "devm_free_coherent" in
tmc_probe when the probe fails due to other reasons. This patch gets
rid of the incorrect dma_free_coherent() call.Fixes: commit de5461970b3e9e194 ("coresight: tmc: allocating memory when needed")
Cc: Mathieu Poirier
Signed-off-by: Suzuki K Poulose
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
etm4_trace_id is not guaranteed to be executed on the CPU whose ETM is
being accessed. This leads to exception similar to below one if the
CPU whose ETM is being accessed is in deeper idle states. So it must
be executed on the CPU whose ETM is being accessed.Unhandled fault: synchronous external abort (0x96000210) at 0xffff000008db4040
Internal error: : 96000210 [#1] PREEMPT SMP
Modules linked in:
CPU: 5 PID: 5979 Comm: etm.sh Not tainted 4.7.0-rc3 #159
Hardware name: ARM Juno development board (r2) (DT)
task: ffff80096dd34b00 ti: ffff80096dfe4000 task.ti: ffff80096dfe4000
PC is at etm4_trace_id+0x5c/0x90
LR is at etm4_trace_id+0x3c/0x90
Call trace:
etm4_trace_id+0x5c/0x90
coresight_id_match+0x78/0xa8
bus_for_each_dev+0x60/0xa0
coresight_enable+0xc0/0x1b8
enable_source_store+0x3c/0x70
dev_attr_store+0x18/0x28
sysfs_kf_write+0x48/0x58
kernfs_fop_write+0x14c/0x1e0
__vfs_write+0x1c/0x100
vfs_write+0xa0/0x1b8
SyS_write+0x44/0xa0
el0_svc_naked+0x24/0x28However, TRCTRACEIDR is not guaranteed to hold the previous programmed
trace id if it enters deeper idle states. Further, the trace id that is
computed in etm4_init_trace_id is programmed into TRCTRACEIDR only in
etm4_enable_hw which happens much later in the sequence after
coresight_id_match is executed from enable_source_store.This patch simplifies etm4_trace_id by returning the stashed trace id
value similar to etm4_cpu_id.Cc: Mathieu Poirier
Signed-off-by: Sudeep Holla
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
CoreSight STM device allows direct mapping of the channel regions to
userspace for zero-copy writing. To support this ability, the STM
framework has provided a hook 'mmio_addr', this patch just implemented
this hook for CoreSight STM.This patch also added an item into 'channel_space' to save the physical
base address of channel region which mmap operation needs to know.Signed-off-by: Chunyan Zhang
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman -
If the addition of the coresight devices get deferred, then there's a
window before child_name is populated by of_get_coresight_platform_data
from the respective component driver's probe and the attempted to access
the same from coresight_orphan_match resulting in kernel NULL pointer
dereference as below:Unable to handle kernel NULL pointer dereference at virtual address 0x0
Internal error: Oops: 96000004 [#1] PREEMPT SMP
Modules linked in:
CPU: 0 PID: 1038 Comm: kworker/0:1 Not tainted 4.7.0-rc3 #124
Hardware name: ARM Juno development board (r2) (DT)
Workqueue: events amba_deferred_retry_func
PC is at strcmp+0x1c/0x160
LR is at coresight_orphan_match+0x7c/0xd0
Call trace:
strcmp+0x1c/0x160
bus_for_each_dev+0x60/0xa0
coresight_register+0x264/0x2e0
tmc_probe+0x130/0x310
amba_probe+0xd4/0x1c8
driver_probe_device+0x22c/0x418
__device_attach_driver+0xbc/0x158
bus_for_each_drv+0x58/0x98
__device_attach+0xc4/0x160
device_initial_probe+0x10/0x18
bus_probe_device+0x94/0xa0
device_add+0x344/0x580
amba_device_try_add+0x194/0x238
amba_deferred_retry_func+0x48/0xd0
process_one_work+0x118/0x378
worker_thread+0x48/0x498
kthread+0xd0/0xe8
ret_from_fork+0x10/0x40This patch adds a check for non-NULL conn->child_name before accessing
the same.Cc: Mathieu Poirier
Signed-off-by: Sudeep Holla
Signed-off-by: Mathieu Poirier
Signed-off-by: Greg Kroah-Hartman
30 Jul, 2016
1 commit
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Pull smp hotplug updates from Thomas Gleixner:
"This is the next part of the hotplug rework.- Convert all notifiers with a priority assigned
- Convert all CPU_STARTING/DYING notifiers
The final removal of the STARTING/DYING infrastructure will happen
when the merge window closes.Another 700 hundred line of unpenetrable maze gone :)"
* 'smp-hotplug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (70 commits)
timers/core: Correct callback order during CPU hot plug
leds/trigger/cpu: Move from CPU_STARTING to ONLINE level
powerpc/numa: Convert to hotplug state machine
arm/perf: Fix hotplug state machine conversion
irqchip/armada: Avoid unused function warnings
ARC/time: Convert to hotplug state machine
clocksource/atlas7: Convert to hotplug state machine
clocksource/armada-370-xp: Convert to hotplug state machine
clocksource/exynos_mct: Convert to hotplug state machine
clocksource/arm_global_timer: Convert to hotplug state machine
rcu: Convert rcutree to hotplug state machine
KVM/arm/arm64/vgic-new: Convert to hotplug state machine
smp/cfd: Convert core to hotplug state machine
x86/x2apic: Convert to CPU hotplug state machine
profile: Convert to hotplug state machine
timers/core: Convert to hotplug state machine
hrtimer: Convert to hotplug state machine
x86/tboot: Convert to hotplug state machine
arm64/armv8 deprecated: Convert to hotplug state machine
hwtracing/coresight-etm4x: Convert to hotplug state machine
...
15 Jul, 2016
3 commits
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This driver has an asymmetry of ONLINE code without any corresponding tear
down code. Otherwise, this is a straightforward conversion.Signed-off-by: Sebastian Andrzej Siewior
Signed-off-by: Anna-Maria Gleixner
Acked-by: Mathieu Poirier
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: linux-arm-kernel@lists.infradead.org
Cc: rt@linutronix.de
Link: http://lkml.kernel.org/r/20160713153337.228918408@linutronix.de
Signed-off-by: Ingo Molnar -
This driver has an asymmetry of ONLINE code without any corresponding tear
down code. Otherwise, this is a straightforward conversion.Signed-off-by: Richard Cochran
Signed-off-by: Anna-Maria Gleixner
Reviewed-by: Sebastian Andrzej Siewior
Acked-by: Mathieu Poirier
Cc: Linus Torvalds
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Cc: linux-arm-kernel@lists.infradead.org
Cc: rt@linutronix.de
Link: http://lkml.kernel.org/r/20160713153337.147128995@linutronix.de
Signed-off-by: Ingo Molnar -
…it/ash/stm into char-misc-next
Alexander writes:
intel_th: Fixes -t://git.kernel.org/pub/scm/linux/kernel/git/ash/stm.git
tags/stm-for-greg-20160714
stableThese are:
* a fix for a modprobe time deadlock
* a new PCI ID for Kaby Lake PCH-H
14 Jul, 2016
3 commits
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This adds Intel(R) Trace Hub PCI ID for Kaby Lake PCH-H.
Signed-off-by: Alexander Shishkin
Cc: -
Driver initialization tries to request a hub (GTH) driver module from
its probe callback, resulting in a deadlock.This patch solves the problem by adding a deferred work for requesting
the hub module.Signed-off-by: Alexander Shishkin
Cc: # 4.4.x- -
…it/ash/stm into char-misc-testing
Alexander writes:
stm class/intel_th: Updates for 4.8
These are:
* runtime power management implementation for both intel_th and stm class
* semi-random kerneldoc fixes
01 Jul, 2016
2 commits
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'output' type device callbacks are missing from the kerneldoc description
of the 'intel_th_driver' structure. Fix this.Signed-off-by: Alexander Shishkin
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There's a kerneldoc comment that'd been derived from another one by way
of copying-and-pasting but hadn't been subsequently amended to reflect
the purpose of the function. Fix this.Signed-off-by: Alexander Shishkin