Eric Lee / smarc-fsl-linux-kernel

16 Sep, 2015

1 commit

  • bd0b9ac40   genirq: Remove irq argument from irq flow handlers ... Browse Code »

    Most interrupt flow handlers do not use the irq argument. Those few
    which use it can retrieve the irq number from the irq descriptor.

    Remove the argument.

    Search and replace was done with coccinelle and some extra helper
    scripts around it. Thanks to Julia for her help!

    Signed-off-by: Thomas Gleixner
    Cc: Julia Lawall
    Cc: Jiang Liu

    Thomas Gleixner
     

12 Jul, 2015

2 commits

  • 41a83e06e   irqchip: Prepare for local stub header removal ... Browse Code »

    The IRQCHIP_DECLARE macro moved to to 'include/linux/irqchip.h', so
    the local irqchip.h became an empty shell, which solely includes
    include/linux/irqchip.h

    Include the global header in all irqchip drivers instead of the local
    header, so we can remove it.

    Signed-off-by: Joel Porquet
    Cc: vgupta@synopsys.com
    Cc: monstr@monstr.eu
    Cc: ralf@linux-mips.org
    Cc: jason@lakedaemon.net
    Link: http://lkml.kernel.org/r/1882096.X39jVG8e0D@joel-zenbook
    Signed-off-by: Thomas Gleixner

    Joel Porquet
     
  • b66231183   irqchip/dw-apb-ictl: Fix generic domain chip wreckage ... Browse Code »

    The num_ct argument of irq_alloc_domain_generic_chips() tells the core
    code how many chip types (for different control flows,
    e.g. edge/level) should be allocated. It does not control how many
    generic chip instances are created because that's determined from the
    irq domain size and the number of interrupts per chip.

    The dw-apb init abuses the num_ct argument for allocating one or two
    chip types depending on the number of interrupts. That's completely
    wrong because the alternate type is never used.

    This code was obviously never tested on a system which has more than
    32 interrupts as that would have never worked due to the unitialized
    second generic chip instance.

    Hand in the proper num_ct=1 and fixup the chip initialization along
    with the interrupt handler.

    Signed-off-by: Thomas Gleixner
    Tested-by: Jisheng Zhang
    Cc: Sebastian Hesselbarth
    Cc: Mark Rutland
    Cc: Jason Cooper
    Link: http://lkml.kernel.org/r/20150706101543.373582262@linutronix.de

    Thomas Gleixner
     

27 Nov, 2014

3 commits

  • 1655b0530   irqchip: dw-apb-ictl: Add PM support ... Browse Code »

    This patch adds in support for S2R for dw-apb-ictl irqchip driver.

    We can used relaxed variants in the resume hook because there's no DMA
    at all here, the device type memory attribute can ensure the operations
    order and relaxed version imply compiler barrier.

    Signed-off-by: Jisheng Zhang
    Link: https://lkml.kernel.org/r/1415773374-4629-4-git-send-email-jszhang@marvell.com
    Signed-off-by: Jason Cooper

    Jisheng Zhang
     
  • a9d5fcc00   irqchip: dw-apb-ictl: Enable IRQ_GC_MASK_CACHE_PER_TYPE ... Browse Code »

    The irq_chip_type instances have separate mask registers, so we need to
    enable IRQ_GC_MASK_CACHE_PER_TYPE to actually handle separate mask registers.

    Signed-off-by: Jisheng Zhang
    Acked-by: Sebastian Hesselbarth
    Link: https://lkml.kernel.org/r/1415773374-4629-3-git-send-email-jszhang@marvell.com
    Signed-off-by: Jason Cooper

    Jisheng Zhang
     
  • 8876ce7d1   irqchip: dw-apb-ictl: Always use use {readl|writel}_relaxed ... Browse Code »

    There's no DMA at all, the device type memory attribute can ensure the
    operations order and relaxed version imply compiler barrier, so we are safe
    to use relaxed version to improve the performance a bit.

    Signed-off-by: Jisheng Zhang
    Acked-by: Sebastian Hesselbarth
    Link: https://lkml.kernel.org/r/1415773374-4629-2-git-send-email-jszhang@marvell.com
    Signed-off-by: Jason Cooper

    Jisheng Zhang
     

13 Dec, 2013

1 commit