03 Jun, 2016

1 commit


24 Jan, 2016

1 commit

  • This adds support for the interrupt controller present on PIC32 class
    devices. It handles all internal and external interrupts. This controller
    exists outside of the CPU core and is the arbitrator of all interrupts
    (including interrupts from the CPU itself) before they are presented to
    the CPU.

    The following features are supported:
    - DT properties for EVIC and for devices/peripherals that use interrupt lines
    - Persistent and non-persistent interrupt handling
    - irqdomain and generic chip support
    - Configuration of external interrupt edge polarity

    Signed-off-by: Cristian Birsan
    Signed-off-by: Joshua Henderson
    Acked-by: Thomas Gleixner
    Cc: Jason Cooper
    Cc: Marc Zyngier
    Cc: linux-kernel@vger.kernel.org
    Cc: linux-mips@linux-mips.org
    Patchwork: https://patchwork.linux-mips.org/patch/12092/
    Signed-off-by: Ralf Baechle

    Cristian Birsan