13 Jun, 2016
1 commit
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Fix warnings from sparse about casting to __iomem from non anotated
variable:drivers/irqchip/irq-sirfsoc.c:56:47: warning: incorrect type in initializer (different address spaces)
drivers/irqchip/irq-sirfsoc.c:56:47: expected void [noderef] *base
drivers/irqchip/irq-sirfsoc.c:56:47: got void *host_data
drivers/irqchip/irq-sirfsoc.c:97:47: warning: incorrect type in initializer (different address spaces)
drivers/irqchip/irq-sirfsoc.c:97:47: expected void [noderef] *base
drivers/irqchip/irq-sirfsoc.c:97:47: got void *host_data
drivers/irqchip/irq-sirfsoc.c:109:47: warning: incorrect type in initializer (different address spaces)
drivers/irqchip/irq-sirfsoc.c:109:47: expected void [noderef] *base
drivers/irqchip/irq-sirfsoc.c:109:47: got void *host_dataSigned-off-by: Ben Dooks
Link: https://lkml.kernel.org/r/1465301910-2308-1-git-send-email-ben.dooks@codethink.co.uk
Signed-off-by: Jason Cooper
12 Jul, 2015
2 commits
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The IRQCHIP_DECLARE macro moved to to 'include/linux/irqchip.h', so
the local irqchip.h became an empty shell, which solely includes
include/linux/irqchip.hInclude the global header in all irqchip drivers instead of the local
header, so we can remove it.Signed-off-by: Joel Porquet
Cc: vgupta@synopsys.com
Cc: monstr@monstr.eu
Cc: ralf@linux-mips.org
Cc: jason@lakedaemon.net
Link: http://lkml.kernel.org/r/1882096.X39jVG8e0D@joel-zenbook
Signed-off-by: Thomas Gleixner -
irq_alloc_domain_generic_chips() can only be called once for an
irqdomain. The sirfsoc init calls it twice and because the return
value is not checked it does not notice the wreckage.The code works by chance because the first call already allocates two
chips and therefor the second call to sirfsoc_alloc_gc() operates on
the proper generic chip instance.Use a single call and setup the two chips in the obvious correct way.
Signed-off-by: Thomas Gleixner
Cc: Jason Cooper
Cc: Barry Song
Cc: linux-arm-kernel@lists.infradead.org
Cc: Olof Johansson
Link: http://lkml.kernel.org/r/20150706101543.470696950@linutronix.de
03 Sep, 2014
1 commit
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Use the new handle_domain_irq method to handle interrupts.
Signed-off-by: Marc Zyngier
Link: https://lkml.kernel.org/r/1409047421-27649-13-git-send-email-marc.zyngier@arm.com
Signed-off-by: Jason Cooper
12 May, 2014
1 commit
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fix "line line over 80 characters" for the below:
static int __init sirfsoc_irq_init(struct device_node *np, struct device_node *parent)the users of the codes - key customers really care about that.
Signed-off-by: Bin Shi
Signed-off-by: Barry Song
12 Mar, 2014
1 commit
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LTO patches add __visible to the asmlinkage define, causing
compilation warnings like:drivers/irqchip/irq-gic.c:283:1: warning: 'externally_visible'
attribute have effect only on public objects [-Wattributes]Drop asmlinkage here to avoid such warnings.
Reported-by: Olof's autobuilder
Signed-off-by: Stephen Boyd
Cc: linux-arm-kernel@lists.infradead.org
Cc: khilman@linaro.org
Cc: Russell King
Cc: Josh Cartwright
Cc: Andi Kleen
Link: http://lkml.kernel.org/r/1393980030-17770-1-git-send-email-sboyd@codeaurora.org
Signed-off-by: Thomas Gleixner
09 Jan, 2014
1 commit
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SiRF internal interrupts are using level trigger. we need to tell the irq
core this information. otherwise, we might get some problems as below
1. disable_irq(n)
here irq core will mark the disabled flag but still keep the irq enabled
due to involved lazy-disable
2. doing someting after disable_irq(n)
in step 2, if one interrupt n comes, irq core will mark it as pending and
mask the HW interrupt really. we name the coming interrupt as "X".
3. enable_irq(n)
this will unmask the interrupt, so the level-trigger HW interrupt will come
again, irq_handler will enter as "E1". after that, irq core will also check
whether irq n is pending, if yes, and pending interrupt is not level-trigger,
irq core will execute the pending irq_handler.
so if we don't set the IRQ_LEVEL flag here, irq core will execute pending
X again as "E2", but actually the pending interrupt has been handled by "E1".
that makes a level-trigger HW interrupt is executed twice.here we fix the issue to avoid redundant interrupt overload.
Signed-off-by: Barry Song
Signed-off-by: Huayi Li
Signed-off-by: Olof Johansson
30 Aug, 2013
1 commit
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the series of patches for irqdomain core in 3.11 has broken sirf
irq which uses legacy mapping. all users fail in the new kernel
while setupping irq.this patch moves to linear irqdomain and drop old legacy irqdomain
codes since we don't need it any more, and at the same time, it
also fixes the broken interrupts of sirfsoc in 3.11.on the other hand, we actually only have 64 interrupt sources for
prima2 and atlas6, but there are 128 interrupt souces for marco
which uses GIC. in the legacy codes, sirf gpio also uses legacy
irqdomain, so to make gpio interrupt mapping not depend on the
prima2/atlas6/marco an use unified marco,we enlarge prima2/atlas6
interrupt number to 128. here we don't need this workaround any
more as sirf gpio also moved to linear mode before. so we move
SIRFSOC_NUM_IRQS back to 64 too.Signed-off-by: Barry Song
Signed-off-by: Olof Johansson
25 Mar, 2013
1 commit
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This updates the irqchip drier for prima2 to the current practices by
moving it into drivers/irqchip and integrating it into the irqchip_init
infrastructure. We also now use a linear irq domain as a preparation
for sparse IRQ suport.Signed-off-by: Arnd Bergmann
Cc: Thomas Gleixner
