31 Aug, 2016

1 commit

  • Added support for the bar descriptor. This type is used for FPGAs
    connect to the LPC or to a non PCI bus.

    The Bar descriptor could have a maximum of 6 BARs. Each of the
    devices within the FPGA could be mapped to a different BAR.
    The BAR descriptor is comparable to the PCI header.

    Signed-off-by: Andreas Werner
    [ free bar descriptor in the non-error case ]
    Signed-off-by: Johannes Thumshirn
    Signed-off-by: Greg Kroah-Hartman

    Andreas Werner
     

04 May, 2016

1 commit

  • Export information about the bus stored in the FPGA's header to userspace via
    sysfs, instead of hiding it in pr_debug()s from everyone.

    Signed-off-by: Johannes Thumshirn
    Reviewed-by: Andreas Werner
    Tested-by: Andreas Werner
    Signed-off-by: Greg Kroah-Hartman

    Johannes Thumshirn
     

10 Jan, 2015

1 commit

  • Currently it is not possible to have a kernel with built-in MCB attached
    devices. This results out of the fact that mcb-pci requests PCI BAR 0, then
    parses the chameleon table and calls the driver's probe function before
    releasing BAR 0 again. When building the kernel with modules this is not a
    problem (and therefore it wasn't detected by my tests yet).

    A solution is to only remap the 1st 0x200 bytes of a Chameleon PCI device.
    0x200 bytes is the maximum size of a Chameleon v2 Table.

    Also this patch stops disabling the PCI device on successful registration of MCB
    devices.

    Signed-off-by: Johannes Thumshirn
    Suggested-by: Bjorn Helgaas
    Reviewed-by: Bjorn Helgaas
    Signed-off-by: Greg Kroah-Hartman

    Johannes Thumshirn
     

01 Mar, 2014

2 commits