09 Jun, 2017
1 commit
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Add TPM PWM driver support i.MX7ULP.
Signed-off-by: Bai Ping
[Octavian: updated for 4.9 APIs]
Signed-off-by: Octavian Purdila
29 Nov, 2016
1 commit
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Make sure to drop the reference to the parent device taken by
class_find_device() after "unexporting" any children when deregistering
a PWM chip.Fixes: 0733424c9ba9 ("pwm: Unexport children before chip removal")
Signed-off-by: Johan Hovold
Signed-off-by: Thierry Reding
21 Oct, 2016
1 commit
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The driver uses the spin_lock but does not initialize it. Fix it.
Signed-off-by: Axel Lin
Acked-by: Neil Armstrong
Signed-off-by: Thierry Reding
08 Sep, 2016
15 commits
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When building with -Wmaybe-uninitialized, we get a couple of harmless
warnings about three functions in this new driver that don't look
safe to the compiler:drivers/pwm/pwm-meson.c: In function 'meson_pwm_get_state':
drivers/pwm/pwm-meson.c:355:26: error: 'mask' may be used uninitialized in this function [-Werror=maybe-uninitialized]
drivers/pwm/pwm-meson.c: In function 'meson_pwm_disable':
drivers/pwm/pwm-meson.c:263:13: error: 'enable' may be used uninitialized in this function [-Werror=maybe-uninitialized]
drivers/pwm/pwm-meson.c: In function 'meson_pwm_apply':
drivers/pwm/pwm-meson.c:231:13: error: 'clk_shift' may be used uninitialized in this function [-Werror=maybe-uninitialized]
drivers/pwm/pwm-meson.c:231:36: error: 'enable' may be used uninitialized in this function [-Werror=maybe-uninitialized]
drivers/pwm/pwm-meson.c:231:24: error: 'clk_enable' may be used uninitialized in this function [-Werror=maybe-uninitialized]Specifically, if we have a device with an ID other than 0 or 1,
this would result in undefined behavior. This is currently not
possible, but the compiler cannot be expected to know this.This patch adds a 'default' clause to let the compiler know
what to do instead, which shuts up the warning and makes the
code slightly more resiliant in case it gets extended to other
identifiers.Signed-off-by: Arnd Bergmann
Acked-by: Neil Armstrong
Signed-off-by: Thierry Reding -
This includes fixing some Coding Style issues and re-ordering and/or
simplifying a little code.Signed-off-by: Lee Jones
[thierry.reding@gmail.com: applied some bikeshedding>
Signed-off-by: Thierry Reding -
Setting up the STI PWM IP as capture only, with zero PWM output devices
is a perfectly valid configuration. It is no longer okay to assume that
there must be at least 1 PWM output device. In this patch we make the
default number of PWM output devices zero and only configure channels
explicitly requested.Reported-by: Peter Griffin
Signed-off-by: Lee Jones
Signed-off-by: Thierry Reding -
Once a PWM capture has been initiated, the capture call enables a rising
edge detection interrupt, then waits. Once each of the 3 phase changes
have been recorded the thread then wakes. The remaining part of the call
carries out the relevant calculations and returns a structure filled out
with the capture data.Signed-off-by: Lee Jones
Signed-off-by: Thierry Reding -
Here we're requesting the PWM capture IRQ and supplying the handler that
will be called in the event of an interrupt to handle it.Signed-off-by: Lee Jones
Signed-off-by: Thierry Reding -
Each PWM capture device is allocated a structure to hold its own state.
During a capture the device may be partaking in one of 3 phases. Initial
(rising) phase change, a subsequent (falling) phase change indicating
end of the duty-cycle phase and finally a final (rising) phase change
indicating the end of the period. The timer value snapshot each event is
held in a variable of the same name, and the phase number (0, 1, 2) is
contained in the index variable. Other device specific information, such
as GPIO pin, the IRQ wait queue and locking is also contained in the
structure. This patch initialises this structure for each of the
available devices.Signed-off-by: Lee Jones
Signed-off-by: Thierry Reding -
ST's PWM IP is supplied by 2 different clocks. One for PWM output and
the other for capture. This patch provides clock handling for the
latter.Signed-off-by: Lee Jones
Signed-off-by: Thierry Reding -
This is in preparation for subsequent patches that add support for PWM
capture to this driver.Signed-off-by: Lee Jones
Signed-off-by: Thierry Reding -
In the original code the clock rate was only obtained during
initialisation; however, the rate may change between then and
its use. This patch ensures the correct rate is acquired just
before use.Signed-off-by: Lee Jones
Signed-off-by: Thierry Reding -
Exciting functionality is on the way to this device. But
before we can add it, we need to do some basic housekeeping
so the additions can be added cleanly.Signed-off-by: Lee Jones
Signed-off-by: Thierry Reding -
This is to bring the terminology used in the STi PWM driver more
into line with the PWM subsystem.Signed-off-by: Lee Jones
Signed-off-by: Thierry Reding -
The lpc-18xx driver currently manipulates the pwm_device struct directly
rather than using the pwm_set_chip_data() function. While the current
method may save a clock cycle or two, using the explicit function call
makes it more obvious that data is set to the local chip data pointer.Signed-off-by: Olliver Schinagl
Reviewed-by: Ariel D'Alessandro
Signed-off-by: Thierry Reding -
H3 PWM controller has same register layout as sun4i driver, so it works
by adding H3 specific data.Cc: Thierry Reding
Cc: Rob Herring
Cc: Maxime Ripard
Cc: Alexandre Belloni
Cc: Chen-Yu Tsai
Cc: linux-pwm@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Milo Kim
Acked-by: Chen-Yu Tsai
Reviewed-by: Alexandre Belloni
Acked-by: Rob Herring
Signed-off-by: Thierry Reding -
Add support for the PWM controller found in the Amlogic SoCs. This
driver supports the Meson8b and GXBB SoCs.Signed-off-by: Neil Armstrong
Tested-by: Martin Blumenstingl
Tested-by: Jerome Brunet
Signed-off-by: Thierry Reding
06 Sep, 2016
5 commits
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From pwm_samsung_calc_tin(), there is routine to find the lowest divider
possible to generate lower frequency than requested one. But it is
always possible to generate requested frequency with large enough
modulation bits except on s3c24xx, so this patch fixes to use lowest div
for the case. This patch removes following UBSAN warning:UBSAN: Undefined behaviour in drivers/pwm/pwm-samsung.c:197:13
shift exponent 32 is too large for 32-bit type 'long unsigned int'
[...]
[] (ubsan_epilogue) from [] (__ubsan_handle_shift_out_of_bounds+0xd8/0x120)
[] (__ubsan_handle_shift_out_of_bounds) from [] (pwm_samsung_config+0x508/0x6a4)
[] (pwm_samsung_config) from [] (pwm_apply_state+0x174/0x40c)
[] (pwm_apply_state) from [] (pwm_fan_probe+0xc8/0x488)
[] (pwm_fan_probe) from [] (platform_drv_probe+0x70/0x150)
[...]Cc: Tomasz Figa
Signed-off-by: Seung-Woo Kim
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Thierry Reding -
Remove all pm_runtime_get_sync() and pm_runtime_put_sync() call as well
as the dummy pm_ops from the pwm-tipwmss driver. No registers are being
modified. The runtime PM still needs to be enabled, so that the runtime
PM framework can take care of enabling/disabling the PWMSS clock when
submodules of PWMSS (ECAP or EHRPWM) call runtime PM APIs. With this
change PWMSS clock goes to idle when none of the submodules are in use.Signed-off-by: Jyri Sarha
Signed-off-by: Vignesh R
Signed-off-by: Thierry Reding -
While the particular usage in question is likely safe (struct
cros_ec_command is 32-bit aligned, followed by
Reviewed-by: Dmitry Torokhov
Reviewed-by: Guenter Roeck
Signed-off-by: Thierry Reding -
Use the mtk_pwm_data struction to define different registers
and add MT2701 specific register operations, such as MT2701
doesn't have commit register, needs to disable double buffer
before writing register, and needs to select manual mode
and use PWM_PERIOD/PWM_HIGH_WIDTH.Signed-off-by: Weiqing Kong
[thierry.reding@gmail.com: use of_device_get_match_data()]
[thierry.reding@gmail.com: parameterize more consistently]
Signed-off-by: Thierry Reding -
This patch adds suspend-to-RAM support to the Berlin PWM driver.
Signed-off-by: Jisheng Zhang
Signed-off-by: Thierry Reding
05 Sep, 2016
2 commits
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Exported pwm channels aren't removed before the pwmchip and are
leaked. This results in invalid sysfs files. This fix removes
all exported pwm channels before chip removal.Signed-off-by: David Hsu
Fixes: 76abbdde2d95 ("pwm: Add sysfs interface")
Signed-off-by: Thierry Reding -
The current TWL6030 code for the TWL PWM driver does not reliably disable the
PWM output, as tested with LEDs. The previous commit to that driver introduced
that regression.However, it does make sense to disable the PWM clock after resetting the PWM,
but for some obscure reason, doing it all at once simply doesn't work.The TWL6030 datasheet mentions that PWMs have to be disabled in two distinct
steps. However, clearing the clock enable bit in a second step (after issuing a
reset first) does not work.The only approach that works is the one that was in place before the previous
commit to the driver. It consists in enabling the PWM clock after issuing a
reset. This is what TI kernel trees and production code seem to be using.However, adding an extra step to disable the PWM clock seems to work reliably,
despite looking quite odd.Signed-off-by: Paul Kocialkowski
Acked-by: Peter Ujfalusi
Signed-off-by: Thierry Reding
06 Aug, 2016
1 commit
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…erry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"This set of changes improve some aspects of the atomic API as well as
make use of this new API in the regulator framework to allow properly
dealing with critical regulators controlled by a PWM.Aside from that there's a bunch of updates and cleanups for existing
drivers, as well as the addition of new drivers for the Broadcom
iProc, STMPE and ChromeOS EC controllers"* tag 'pwm/for-4.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (44 commits)
regulator: pwm: Document pwm-dutycycle-unit and pwm-dutycycle-range
regulator: pwm: Support extra continuous mode cases
pwm: Add ChromeOS EC PWM driver
dt-bindings: pwm: Add binding for ChromeOS EC PWM
mfd: cros_ec: Add EC_PWM function definitions
mfd: cros_ec: Add cros_ec_cmd_xfer_status() helper
pwm: atmel: Use of_device_get_match_data()
pwm: atmel: Fix checkpatch warnings
pwm: atmel: Fix disabling of PWM channels
dt-bindings: pwm: Add R-Car H3 device tree bindings
pwm: rcar: Use ARCH_RENESAS
pwm: tegra: Add support for Tegra186
dt-bindings: pwm: tegra: Add compatible string for Tegra186
pwm: tegra: Avoid overflow when calculating duty cycle
pwm: tegra: Allow 100 % duty cycle
pwm: tegra: Add support for reset control
pwm: tegra: Rename mmio_base to regs
pwm: tegra: Remove useless padding
pwm: tegra: Drop NUM_PWM macro
pwm: lpc32xx: Set PWM_PIN_LEVEL bit to default value
...
02 Aug, 2016
1 commit
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Pull ARM SoC driver updates from Olof Johansson:
"Driver updates for ARM SoCs.A slew of changes this release cycle. The reset driver tree, that we
merge through arm-soc for historical reasons, is also sizable this
time around.Among the changes:
- clps711x: Treewide changes to compatible strings, merged here for simplicity.
- Qualcomm: SCM firmware driver cleanups, move to platform driver
- ux500: Major cleanups, removal of old mach-specific infrastructure.
- Atmel external bus memory driver
- Move of brcmstb platform to the rest of bcm
- PMC driver updates for tegra, various fixes and improvements
- Samsung platform driver updates to support 64-bit Exynos platforms
- Reset controller cleanups moving to devm_reset_controller_register() APIs
- Reset controller driver for Amlogic Meson
- Reset controller driver for Hisilicon hi6220
- ARM SCPI power domain support"* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (100 commits)
ARM: ux500: consolidate base platform files
ARM: ux500: move soc_id driver to drivers/soc
ARM: ux500: call ux500_setup_id later
ARM: ux500: consolidate soc_device code in id.c
ARM: ux500: remove cpu_is_u* helpers
ARM: ux500: use CLK_OF_DECLARE()
ARM: ux500: move l2x0 init to .init_irq
mfd: db8500 stop passing around platform data
ASoC: ab8500-codec: remove platform data based probe
ARM: ux500: move ab8500_regulator_plat_data into driver
ARM: ux500: remove unused regulator data
soc: raspberrypi-power: add CONFIG_OF dependency
firmware: scpi: add CONFIG_OF dependency
video: clps711x-fb: Changing the compatibility string to match with the smallest supported chip
input: clps711x-keypad: Changing the compatibility string to match with the smallest supported chip
pwm: clps711x: Changing the compatibility string to match with the smallest supported chip
serial: clps711x: Changing the compatibility string to match with the smallest supported chip
irqchip: clps711x: Changing the compatibility string to match with the smallest supported chip
clocksource: clps711x: Changing the compatibility string to match with the smallest supported chip
clk: clps711x: Changing the compatibility string to match with the smallest supported chip
...
25 Jul, 2016
3 commits
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Use the new ChromeOS EC EC_CMD_PWM_{GET,SET}_DUTY commands to control
one or more PWMs attached to the Embedded Controller. Because the EC
allows us to modify the duty cycle (as a percentage, where U16_MAX is
100%) but not the period, we assign the period a fixed value of
EC_PWM_MAX_DUTY and reject all attempts to change it.This driver supports only device tree at the moment, because that
provides a very flexible way of describing the relationship between PWMs
and their consumer devices (e.g., backlight). On a non-DT system, we'll
probably want to use the non-GENERIC addressing (i.e., we'll need to
make special device instances that will use EC_PWM_TYPE_KB_LIGHT or
EC_PWM_TYPE_DISPLAY_LIGHT), as well as the relatively inflexible
pwm_lookup infrastructure for matching devices. Defer that work for now.Signed-off-by: Brian Norris
Signed-off-by: Thierry Reding
11 Jul, 2016
10 commits
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Use of_device_get_match_data() instead of an open-coded variant.
Signed-off-by: Thierry Reding
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Avoid an overly long line by moving a comment around, and remove a use
of else-after-return.Signed-off-by: Thierry Reding
-
When disabling a PWM channel, the PWM clock was being stopped
immediately after writing to PWM_DIS. As a result, the disabling
of the PWM channel did not complete properly, and the PWM output
might be left at the wrong level.Fix this by waiting for the channel to be effectively disabled
(by checking the PWM_SR register) before disabling the clock.Signed-off-by: Guillermo Rodriguez
Acked-by: Alexandre Belloni
Signed-off-by: Thierry Reding -
Replace ARCH_RCAR_GEN{1,2} with ARCH_RENESAS in order to support R-Car Gen3.
Signed-off-by: Ryo Kodama
Signed-off-by: Harunobu Kurokawa
Signed-off-by: Ulrich Hecht
Acked-by: Geert Uytterhoeven
Acked-by: Simon Horman
Signed-off-by: Thierry Reding -
Tegra186 has multiple PWM controllers with only one output instead of
one controller with four outputs in earlier SoC generations.Add support for Tegra186 and detect the number of PWM outputs using
device tree match data.Signed-off-by: Laxman Dewangan
Reviewed-by: Alexandre Courbot
Signed-off-by: Thierry Reding -
duty_ns * (1 << PWM_DUTY_WIDTH) could overflow in integer calculation
when the PWM rate is low. Hence do all calculation on unsigned long long
to avoid overflow.Signed-off-by: Hyong Bin Kim
Signed-off-by: Laxman Dewangan
Signed-off-by: Thierry Reding -
To get 100 % duty cycle (always high), pulse width needs to be set to
256.Signed-off-by: Victor(Weiguo) Pan
Signed-off-by: Laxman Dewangan
Signed-off-by: Thierry Reding -
Add reset control of the PWM controller to reset it before
accessing the PWM register.Signed-off-by: Rohith Seelaboyina
Signed-off-by: Laxman Dewangan
Signed-off-by: Thierry Reding -
The former is much longer to type and is ambiguous because the value
stored in the field is not the (physical) base address of the memory-
mapped I/O registers, but the virtual address of those registers as
mapped through the MMU.Signed-off-by: Thierry Reding
-
Use single spaces to separate data type from field names in structure
definitions.Signed-off-by: Thierry Reding
